xref: /aosp_15_r20/external/XNNPACK/src/f16-raddstoreexpminusmax/gen/neonfp16arith-rr2-p2-x40.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/f16-raddstoreexpminusmax/neonfp16arith-rr2-p2.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16 
17 
xnn_f16_raddstoreexpminusmax_ukernel__neonfp16arith_rr2_p2_x40(size_t batch,const void * input,const void * max,void * output,void * sum,const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f16_raddstoreexpminusmax_ukernel__neonfp16arith_rr2_p2_x40(
19     size_t batch,
20     const void* input,
21     const void* max,
22     void* output,
23     void* sum,
24     const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26   assert(batch % sizeof(__fp16) == 0);
27 
28   const float16x8_t vi_max = vld1q_dup_f16(max);
29   const float16x8_t vlog2e = vreinterpretq_f16_u16(vld1q_dup_u16(&params->neonfp16arith_rr2_p2.log2e));
30   const float16x8_t vmagic_bias = vreinterpretq_f16_u16(vld1q_dup_u16(&params->neonfp16arith_rr2_p2.magic_bias));
31   const float16x8_t vminus_ln2_hi = vreinterpretq_f16_u16(vld1q_dup_u16(&params->neonfp16arith_rr2_p2.minus_ln2_hi));
32   const float16x8_t vminus_ln2_lo = vreinterpretq_f16_u16(vld1q_dup_u16(&params->neonfp16arith_rr2_p2.minus_ln2_lo));
33   const float16x8_t vc2 = vreinterpretq_f16_u16(vld1q_dup_u16(&params->neonfp16arith_rr2_p2.c2));
34   const float16x8_t vc1 = vreinterpretq_f16_u16(vld1q_dup_u16(&params->neonfp16arith_rr2_p2.c1));
35   const float16x8_t vdenorm_cutoff = vreinterpretq_f16_u16(vld1q_dup_u16(&params->neonfp16arith_rr2_p2.denorm_cutoff));
36 
37   const __fp16* i = (const __fp16*) input;
38   __fp16* o = (__fp16*) output;
39   float16x8_t vacc0 = vmovq_n_f16(0.0f);
40   for (; batch >= 40 * sizeof(__fp16); batch -= 40 * sizeof(__fp16)) {
41     const float16x8_t vi0 = vld1q_f16(i); i += 8;
42     const float16x8_t vi1 = vld1q_f16(i); i += 8;
43     const float16x8_t vi2 = vld1q_f16(i); i += 8;
44     const float16x8_t vi3 = vld1q_f16(i); i += 8;
45     const float16x8_t vi4 = vld1q_f16(i); i += 8;
46 
47     const float16x8_t vx0 = vsubq_f16(vi0, vi_max);
48     const float16x8_t vx1 = vsubq_f16(vi1, vi_max);
49     const float16x8_t vx2 = vsubq_f16(vi2, vi_max);
50     const float16x8_t vx3 = vsubq_f16(vi3, vi_max);
51     const float16x8_t vx4 = vsubq_f16(vi4, vi_max);
52 
53     float16x8_t vn0 = vfmaq_f16(vmagic_bias, vx0, vlog2e);
54     float16x8_t vn1 = vfmaq_f16(vmagic_bias, vx1, vlog2e);
55     float16x8_t vn2 = vfmaq_f16(vmagic_bias, vx2, vlog2e);
56     float16x8_t vn3 = vfmaq_f16(vmagic_bias, vx3, vlog2e);
57     float16x8_t vn4 = vfmaq_f16(vmagic_bias, vx4, vlog2e);
58 
59     const float16x8_t vs0 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn0), 10));
60     const float16x8_t vs1 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn1), 10));
61     const float16x8_t vs2 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn2), 10));
62     const float16x8_t vs3 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn3), 10));
63     const float16x8_t vs4 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn4), 10));
64 
65     vn0 = vsubq_f16(vn0, vmagic_bias);
66     vn1 = vsubq_f16(vn1, vmagic_bias);
67     vn2 = vsubq_f16(vn2, vmagic_bias);
68     vn3 = vsubq_f16(vn3, vmagic_bias);
69     vn4 = vsubq_f16(vn4, vmagic_bias);
70 
71     float16x8_t vt0 = vfmaq_f16(vx0, vn0, vminus_ln2_hi);
72     float16x8_t vt1 = vfmaq_f16(vx1, vn1, vminus_ln2_hi);
73     float16x8_t vt2 = vfmaq_f16(vx2, vn2, vminus_ln2_hi);
74     float16x8_t vt3 = vfmaq_f16(vx3, vn3, vminus_ln2_hi);
75     float16x8_t vt4 = vfmaq_f16(vx4, vn4, vminus_ln2_hi);
76 
77     vt0 = vfmaq_f16(vt0, vn0, vminus_ln2_lo);
78     vt1 = vfmaq_f16(vt1, vn1, vminus_ln2_lo);
79     vt2 = vfmaq_f16(vt2, vn2, vminus_ln2_lo);
80     vt3 = vfmaq_f16(vt3, vn3, vminus_ln2_lo);
81     vt4 = vfmaq_f16(vt4, vn4, vminus_ln2_lo);
82 
83     const float16x8_t vp0 = vfmaq_f16(vc1, vc2, vt0);
84     const float16x8_t vp1 = vfmaq_f16(vc1, vc2, vt1);
85     const float16x8_t vp2 = vfmaq_f16(vc1, vc2, vt2);
86     const float16x8_t vp3 = vfmaq_f16(vc1, vc2, vt3);
87     const float16x8_t vp4 = vfmaq_f16(vc1, vc2, vt4);
88 
89     vt0 = vmulq_f16(vt0, vs0);
90     vt1 = vmulq_f16(vt1, vs1);
91     vt2 = vmulq_f16(vt2, vs2);
92     vt3 = vmulq_f16(vt3, vs3);
93     vt4 = vmulq_f16(vt4, vs4);
94 
95     float16x8_t vf0 = vfmaq_f16(vs0, vp0, vt0);
96     const uint16x8_t vm0 = vcltq_f16(vx0, vdenorm_cutoff);
97     float16x8_t vf1 = vfmaq_f16(vs1, vp1, vt1);
98     const uint16x8_t vm1 = vcltq_f16(vx1, vdenorm_cutoff);
99     float16x8_t vf2 = vfmaq_f16(vs2, vp2, vt2);
100     const uint16x8_t vm2 = vcltq_f16(vx2, vdenorm_cutoff);
101     float16x8_t vf3 = vfmaq_f16(vs3, vp3, vt3);
102     const uint16x8_t vm3 = vcltq_f16(vx3, vdenorm_cutoff);
103     float16x8_t vf4 = vfmaq_f16(vs4, vp4, vt4);
104     const uint16x8_t vm4 = vcltq_f16(vx4, vdenorm_cutoff);
105 
106     vf0 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf0), vm0));
107     vf1 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf1), vm1));
108     vf2 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf2), vm2));
109     vf3 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf3), vm3));
110     vf4 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf4), vm4));
111 
112     vst1q_f16(o, vf0); o += 8;
113     vst1q_f16(o, vf1); o += 8;
114     vst1q_f16(o, vf2); o += 8;
115     vst1q_f16(o, vf3); o += 8;
116     vst1q_f16(o, vf4); o += 8;
117 
118     vacc0 = vaddq_f16(vacc0, vf0);
119     vacc0 = vaddq_f16(vacc0, vf1);
120     vacc0 = vaddq_f16(vacc0, vf2);
121     vacc0 = vaddq_f16(vacc0, vf3);
122     vacc0 = vaddq_f16(vacc0, vf4);
123   }
124 
125   float16x8_t vacc = vacc0;
126   for (; batch >= 8 * sizeof(__fp16); batch -= 8 * sizeof(__fp16)) {
127     const float16x8_t vi = vld1q_f16(i); i += 8;
128 
129     const float16x8_t vx = vsubq_f16(vi, vi_max);
130 
131     float16x8_t vn = vfmaq_f16(vmagic_bias, vx, vlog2e);
132     const float16x8_t vs = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn), 10));
133     vn = vsubq_f16(vn, vmagic_bias);
134 
135     float16x8_t vt = vfmaq_f16(vx, vn, vminus_ln2_hi);
136     vt = vfmaq_f16(vt, vn, vminus_ln2_lo);
137 
138     const float16x8_t vp = vfmaq_f16(vc1, vc2, vt);
139     vt = vmulq_f16(vt, vs);
140 
141     float16x8_t vf = vfmaq_f16(vs, vp, vt);
142     const uint16x8_t vm = vcltq_f16(vx, vdenorm_cutoff);
143     vf = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf), vm));
144 
145     vst1q_f16(o, vf); o += 8;
146 
147     vacc = vaddq_f16(vacc, vf);
148   }
149   float16x4_t vacc_lo = vadd_f16(vget_low_f16(vacc), vget_high_f16(vacc));
150   if (batch != 0) {
151     assert(batch >= 1 * sizeof(__fp16));
152     assert(batch <= 7 * sizeof(__fp16));
153     const float16x8_t vi = vld1q_f16(i);
154 
155     const float16x8_t vx = vsubq_f16(vi, vi_max);
156 
157     float16x8_t vn = vfmaq_f16(vmagic_bias, vx, vlog2e);
158     const float16x8_t vs = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn), 10));
159     vn = vsubq_f16(vn, vmagic_bias);
160 
161     float16x8_t vt = vfmaq_f16(vx, vn, vminus_ln2_hi);
162     vt = vfmaq_f16(vt, vn, vminus_ln2_lo);
163 
164     const float16x8_t vp = vfmaq_f16(vc1, vc2, vt);
165     vt = vmulq_f16(vt, vs);
166 
167     float16x8_t vf = vfmaq_f16(vs, vp, vt);
168     const uint16x8_t vm = vcltq_f16(vx, vdenorm_cutoff);
169     vf = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf), vm));
170 
171     float16x4_t vf_lo = vget_low_f16(vf);
172     if (batch & (4 * sizeof(__fp16))) {
173       vst1_f16(o, vf_lo); o += 4;
174       vacc_lo = vadd_f16(vacc_lo, vf_lo);
175       vf_lo = vget_high_f16(vf);
176     }
177     if (batch & (2 * sizeof(__fp16))) {
178       vst1_lane_u32((void*) o, vreinterpret_u32_f16(vf_lo), 0); o += 2;
179       vacc_lo = vadd_f16(vacc_lo, vreinterpret_f16_u64(vshl_n_u64(vreinterpret_u64_f16(vf_lo), 32)));
180       vf_lo = vext_f16(vf_lo, vf_lo, 2);
181     }
182     if (batch & (1 * sizeof(__fp16))) {
183       vst1_lane_f16(o, vf_lo, 0);
184       vacc_lo = vadd_f16(vacc_lo, vreinterpret_f16_u64(vshl_n_u64(vreinterpret_u64_f16(vf_lo), 48)));
185     }
186   }
187   vacc_lo = vpadd_f16(vacc_lo, vacc_lo);
188   *((__fp16*) sum) = vget_lane_f16(vacc_lo, 0) + vget_lane_f16(vacc_lo, 1);
189 }
190