1 // Auto-generated file. Do not edit!
2 // Template: src/f16-raddstoreexpminusmax/neonfp16arith-rr2-p2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f16_raddstoreexpminusmax_ukernel__neonfp16arith_rr2_p2_x32_acc4(size_t batch,const void * input,const void * max,void * output,void * sum,const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f16_raddstoreexpminusmax_ukernel__neonfp16arith_rr2_p2_x32_acc4(
19 size_t batch,
20 const void* input,
21 const void* max,
22 void* output,
23 void* sum,
24 const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26 assert(batch % sizeof(__fp16) == 0);
27
28 const float16x8_t vi_max = vld1q_dup_f16(max);
29 const float16x8_t vlog2e = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.log2e));
30 const float16x8_t vmagic_bias = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.magic_bias));
31 const float16x8_t vminus_ln2_hi = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.minus_ln2_hi));
32 const float16x8_t vminus_ln2_lo = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.minus_ln2_lo));
33 const float16x8_t vc2 = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.c2));
34 const float16x8_t vc1 = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.c1));
35 const float16x8_t vdenorm_cutoff = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.denorm_cutoff));
36
37 const __fp16* i = (const __fp16*) input;
38 __fp16* o = (__fp16*) output;
39 float16x8_t vacc0 = vmovq_n_f16(0.0f);
40 float16x8_t vacc1 = vmovq_n_f16(0.0f);
41 float16x8_t vacc2 = vmovq_n_f16(0.0f);
42 float16x8_t vacc3 = vmovq_n_f16(0.0f);
43 for (; batch >= 32 * sizeof(__fp16); batch -= 32 * sizeof(__fp16)) {
44 const float16x8_t vi0 = vld1q_f16(i); i += 8;
45 const float16x8_t vi1 = vld1q_f16(i); i += 8;
46 const float16x8_t vi2 = vld1q_f16(i); i += 8;
47 const float16x8_t vi3 = vld1q_f16(i); i += 8;
48
49 const float16x8_t vx0 = vsubq_f16(vi0, vi_max);
50 const float16x8_t vx1 = vsubq_f16(vi1, vi_max);
51 const float16x8_t vx2 = vsubq_f16(vi2, vi_max);
52 const float16x8_t vx3 = vsubq_f16(vi3, vi_max);
53
54 float16x8_t vn0 = vfmaq_f16(vmagic_bias, vx0, vlog2e);
55 float16x8_t vn1 = vfmaq_f16(vmagic_bias, vx1, vlog2e);
56 float16x8_t vn2 = vfmaq_f16(vmagic_bias, vx2, vlog2e);
57 float16x8_t vn3 = vfmaq_f16(vmagic_bias, vx3, vlog2e);
58
59 const float16x8_t vs0 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn0), 10));
60 const float16x8_t vs1 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn1), 10));
61 const float16x8_t vs2 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn2), 10));
62 const float16x8_t vs3 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn3), 10));
63
64 vn0 = vsubq_f16(vn0, vmagic_bias);
65 vn1 = vsubq_f16(vn1, vmagic_bias);
66 vn2 = vsubq_f16(vn2, vmagic_bias);
67 vn3 = vsubq_f16(vn3, vmagic_bias);
68
69 float16x8_t vt0 = vfmaq_f16(vx0, vn0, vminus_ln2_hi);
70 float16x8_t vt1 = vfmaq_f16(vx1, vn1, vminus_ln2_hi);
71 float16x8_t vt2 = vfmaq_f16(vx2, vn2, vminus_ln2_hi);
72 float16x8_t vt3 = vfmaq_f16(vx3, vn3, vminus_ln2_hi);
73
74 vt0 = vfmaq_f16(vt0, vn0, vminus_ln2_lo);
75 vt1 = vfmaq_f16(vt1, vn1, vminus_ln2_lo);
76 vt2 = vfmaq_f16(vt2, vn2, vminus_ln2_lo);
77 vt3 = vfmaq_f16(vt3, vn3, vminus_ln2_lo);
78
79 const float16x8_t vp0 = vfmaq_f16(vc1, vc2, vt0);
80 const float16x8_t vp1 = vfmaq_f16(vc1, vc2, vt1);
81 const float16x8_t vp2 = vfmaq_f16(vc1, vc2, vt2);
82 const float16x8_t vp3 = vfmaq_f16(vc1, vc2, vt3);
83
84 vt0 = vmulq_f16(vt0, vs0);
85 vt1 = vmulq_f16(vt1, vs1);
86 vt2 = vmulq_f16(vt2, vs2);
87 vt3 = vmulq_f16(vt3, vs3);
88
89 float16x8_t vf0 = vfmaq_f16(vs0, vp0, vt0);
90 const uint16x8_t vm0 = vcltq_f16(vx0, vdenorm_cutoff);
91 float16x8_t vf1 = vfmaq_f16(vs1, vp1, vt1);
92 const uint16x8_t vm1 = vcltq_f16(vx1, vdenorm_cutoff);
93 float16x8_t vf2 = vfmaq_f16(vs2, vp2, vt2);
94 const uint16x8_t vm2 = vcltq_f16(vx2, vdenorm_cutoff);
95 float16x8_t vf3 = vfmaq_f16(vs3, vp3, vt3);
96 const uint16x8_t vm3 = vcltq_f16(vx3, vdenorm_cutoff);
97
98 vf0 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf0), vm0));
99 vf1 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf1), vm1));
100 vf2 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf2), vm2));
101 vf3 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf3), vm3));
102
103 vst1q_f16(o, vf0); o += 8;
104 vst1q_f16(o, vf1); o += 8;
105 vst1q_f16(o, vf2); o += 8;
106 vst1q_f16(o, vf3); o += 8;
107
108 vacc0 = vaddq_f16(vacc0, vf0);
109 vacc1 = vaddq_f16(vacc1, vf1);
110 vacc2 = vaddq_f16(vacc2, vf2);
111 vacc3 = vaddq_f16(vacc3, vf3);
112 }
113 vacc0 = vaddq_f16(vacc0, vacc1);
114 vacc2 = vaddq_f16(vacc2, vacc3);
115 vacc0 = vaddq_f16(vacc0, vacc2);
116
117 float16x8_t vacc = vacc0;
118 for (; batch >= 8 * sizeof(__fp16); batch -= 8 * sizeof(__fp16)) {
119 const float16x8_t vi = vld1q_f16(i); i += 8;
120
121 const float16x8_t vx = vsubq_f16(vi, vi_max);
122
123 float16x8_t vn = vfmaq_f16(vmagic_bias, vx, vlog2e);
124 const float16x8_t vs = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn), 10));
125 vn = vsubq_f16(vn, vmagic_bias);
126
127 float16x8_t vt = vfmaq_f16(vx, vn, vminus_ln2_hi);
128 vt = vfmaq_f16(vt, vn, vminus_ln2_lo);
129
130 const float16x8_t vp = vfmaq_f16(vc1, vc2, vt);
131 vt = vmulq_f16(vt, vs);
132
133 float16x8_t vf = vfmaq_f16(vs, vp, vt);
134 const uint16x8_t vm = vcltq_f16(vx, vdenorm_cutoff);
135 vf = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf), vm));
136
137 vst1q_f16(o, vf); o += 8;
138
139 vacc = vaddq_f16(vacc, vf);
140 }
141 float16x4_t vacc_lo = vadd_f16(vget_low_f16(vacc), vget_high_f16(vacc));
142 if (batch != 0) {
143 assert(batch >= 1 * sizeof(__fp16));
144 assert(batch <= 7 * sizeof(__fp16));
145 const float16x8_t vi = vld1q_f16(i);
146
147 const float16x8_t vx = vsubq_f16(vi, vi_max);
148
149 float16x8_t vn = vfmaq_f16(vmagic_bias, vx, vlog2e);
150 const float16x8_t vs = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn), 10));
151 vn = vsubq_f16(vn, vmagic_bias);
152
153 float16x8_t vt = vfmaq_f16(vx, vn, vminus_ln2_hi);
154 vt = vfmaq_f16(vt, vn, vminus_ln2_lo);
155
156 const float16x8_t vp = vfmaq_f16(vc1, vc2, vt);
157 vt = vmulq_f16(vt, vs);
158
159 float16x8_t vf = vfmaq_f16(vs, vp, vt);
160 const uint16x8_t vm = vcltq_f16(vx, vdenorm_cutoff);
161 vf = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf), vm));
162
163 float16x4_t vf_lo = vget_low_f16(vf);
164 if (batch & (4 * sizeof(__fp16))) {
165 vst1_f16(o, vf_lo); o += 4;
166 vacc_lo = vadd_f16(vacc_lo, vf_lo);
167 vf_lo = vget_high_f16(vf);
168 }
169 if (batch & (2 * sizeof(__fp16))) {
170 vst1_lane_u32((void*) o, vreinterpret_u32_f16(vf_lo), 0); o += 2;
171 vacc_lo = vadd_f16(vacc_lo, vreinterpret_f16_u64(vshl_n_u64(vreinterpret_u64_f16(vf_lo), 32)));
172 vf_lo = vext_f16(vf_lo, vf_lo, 2);
173 }
174 if (batch & (1 * sizeof(__fp16))) {
175 vst1_lane_f16(o, vf_lo, 0);
176 vacc_lo = vadd_f16(vacc_lo, vreinterpret_f16_u64(vshl_n_u64(vreinterpret_u64_f16(vf_lo), 48)));
177 }
178 }
179 vacc_lo = vpadd_f16(vacc_lo, vacc_lo);
180 *((__fp16*) sum) = vget_lane_f16(vacc_lo, 0) + vget_lane_f16(vacc_lo, 1);
181 }
182