1 // Auto-generated file. Do not edit!
2 // Template: src/f16-raddstoreexpminusmax/neonfp16arith-rr2-p2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f16_raddstoreexpminusmax_ukernel__neonfp16arith_rr2_p2_x32_acc2(size_t batch,const void * input,const void * max,void * output,void * sum,const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f16_raddstoreexpminusmax_ukernel__neonfp16arith_rr2_p2_x32_acc2(
19 size_t batch,
20 const void* input,
21 const void* max,
22 void* output,
23 void* sum,
24 const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26 assert(batch % sizeof(__fp16) == 0);
27
28 const float16x8_t vi_max = vld1q_dup_f16(max);
29 const float16x8_t vlog2e = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.log2e));
30 const float16x8_t vmagic_bias = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.magic_bias));
31 const float16x8_t vminus_ln2_hi = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.minus_ln2_hi));
32 const float16x8_t vminus_ln2_lo = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.minus_ln2_lo));
33 const float16x8_t vc2 = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.c2));
34 const float16x8_t vc1 = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.c1));
35 const float16x8_t vdenorm_cutoff = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->neonfp16arith_rr2_p2.denorm_cutoff));
36
37 const __fp16* i = (const __fp16*) input;
38 __fp16* o = (__fp16*) output;
39 float16x8_t vacc0 = vmovq_n_f16(0.0f);
40 float16x8_t vacc1 = vmovq_n_f16(0.0f);
41 for (; batch >= 32 * sizeof(__fp16); batch -= 32 * sizeof(__fp16)) {
42 const float16x8_t vi0 = vld1q_f16(i); i += 8;
43 const float16x8_t vi1 = vld1q_f16(i); i += 8;
44 const float16x8_t vi2 = vld1q_f16(i); i += 8;
45 const float16x8_t vi3 = vld1q_f16(i); i += 8;
46
47 const float16x8_t vx0 = vsubq_f16(vi0, vi_max);
48 const float16x8_t vx1 = vsubq_f16(vi1, vi_max);
49 const float16x8_t vx2 = vsubq_f16(vi2, vi_max);
50 const float16x8_t vx3 = vsubq_f16(vi3, vi_max);
51
52 float16x8_t vn0 = vfmaq_f16(vmagic_bias, vx0, vlog2e);
53 float16x8_t vn1 = vfmaq_f16(vmagic_bias, vx1, vlog2e);
54 float16x8_t vn2 = vfmaq_f16(vmagic_bias, vx2, vlog2e);
55 float16x8_t vn3 = vfmaq_f16(vmagic_bias, vx3, vlog2e);
56
57 const float16x8_t vs0 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn0), 10));
58 const float16x8_t vs1 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn1), 10));
59 const float16x8_t vs2 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn2), 10));
60 const float16x8_t vs3 = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn3), 10));
61
62 vn0 = vsubq_f16(vn0, vmagic_bias);
63 vn1 = vsubq_f16(vn1, vmagic_bias);
64 vn2 = vsubq_f16(vn2, vmagic_bias);
65 vn3 = vsubq_f16(vn3, vmagic_bias);
66
67 float16x8_t vt0 = vfmaq_f16(vx0, vn0, vminus_ln2_hi);
68 float16x8_t vt1 = vfmaq_f16(vx1, vn1, vminus_ln2_hi);
69 float16x8_t vt2 = vfmaq_f16(vx2, vn2, vminus_ln2_hi);
70 float16x8_t vt3 = vfmaq_f16(vx3, vn3, vminus_ln2_hi);
71
72 vt0 = vfmaq_f16(vt0, vn0, vminus_ln2_lo);
73 vt1 = vfmaq_f16(vt1, vn1, vminus_ln2_lo);
74 vt2 = vfmaq_f16(vt2, vn2, vminus_ln2_lo);
75 vt3 = vfmaq_f16(vt3, vn3, vminus_ln2_lo);
76
77 const float16x8_t vp0 = vfmaq_f16(vc1, vc2, vt0);
78 const float16x8_t vp1 = vfmaq_f16(vc1, vc2, vt1);
79 const float16x8_t vp2 = vfmaq_f16(vc1, vc2, vt2);
80 const float16x8_t vp3 = vfmaq_f16(vc1, vc2, vt3);
81
82 vt0 = vmulq_f16(vt0, vs0);
83 vt1 = vmulq_f16(vt1, vs1);
84 vt2 = vmulq_f16(vt2, vs2);
85 vt3 = vmulq_f16(vt3, vs3);
86
87 float16x8_t vf0 = vfmaq_f16(vs0, vp0, vt0);
88 const uint16x8_t vm0 = vcltq_f16(vx0, vdenorm_cutoff);
89 float16x8_t vf1 = vfmaq_f16(vs1, vp1, vt1);
90 const uint16x8_t vm1 = vcltq_f16(vx1, vdenorm_cutoff);
91 float16x8_t vf2 = vfmaq_f16(vs2, vp2, vt2);
92 const uint16x8_t vm2 = vcltq_f16(vx2, vdenorm_cutoff);
93 float16x8_t vf3 = vfmaq_f16(vs3, vp3, vt3);
94 const uint16x8_t vm3 = vcltq_f16(vx3, vdenorm_cutoff);
95
96 vf0 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf0), vm0));
97 vf1 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf1), vm1));
98 vf2 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf2), vm2));
99 vf3 = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf3), vm3));
100
101 vst1q_f16(o, vf0); o += 8;
102 vst1q_f16(o, vf1); o += 8;
103 vst1q_f16(o, vf2); o += 8;
104 vst1q_f16(o, vf3); o += 8;
105
106 vacc0 = vaddq_f16(vacc0, vf0);
107 vacc1 = vaddq_f16(vacc1, vf1);
108 vacc0 = vaddq_f16(vacc0, vf2);
109 vacc1 = vaddq_f16(vacc1, vf3);
110 }
111 vacc0 = vaddq_f16(vacc0, vacc1);
112
113 float16x8_t vacc = vacc0;
114 for (; batch >= 8 * sizeof(__fp16); batch -= 8 * sizeof(__fp16)) {
115 const float16x8_t vi = vld1q_f16(i); i += 8;
116
117 const float16x8_t vx = vsubq_f16(vi, vi_max);
118
119 float16x8_t vn = vfmaq_f16(vmagic_bias, vx, vlog2e);
120 const float16x8_t vs = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn), 10));
121 vn = vsubq_f16(vn, vmagic_bias);
122
123 float16x8_t vt = vfmaq_f16(vx, vn, vminus_ln2_hi);
124 vt = vfmaq_f16(vt, vn, vminus_ln2_lo);
125
126 const float16x8_t vp = vfmaq_f16(vc1, vc2, vt);
127 vt = vmulq_f16(vt, vs);
128
129 float16x8_t vf = vfmaq_f16(vs, vp, vt);
130 const uint16x8_t vm = vcltq_f16(vx, vdenorm_cutoff);
131 vf = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf), vm));
132
133 vst1q_f16(o, vf); o += 8;
134
135 vacc = vaddq_f16(vacc, vf);
136 }
137 float16x4_t vacc_lo = vadd_f16(vget_low_f16(vacc), vget_high_f16(vacc));
138 if (batch != 0) {
139 assert(batch >= 1 * sizeof(__fp16));
140 assert(batch <= 7 * sizeof(__fp16));
141 const float16x8_t vi = vld1q_f16(i);
142
143 const float16x8_t vx = vsubq_f16(vi, vi_max);
144
145 float16x8_t vn = vfmaq_f16(vmagic_bias, vx, vlog2e);
146 const float16x8_t vs = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn), 10));
147 vn = vsubq_f16(vn, vmagic_bias);
148
149 float16x8_t vt = vfmaq_f16(vx, vn, vminus_ln2_hi);
150 vt = vfmaq_f16(vt, vn, vminus_ln2_lo);
151
152 const float16x8_t vp = vfmaq_f16(vc1, vc2, vt);
153 vt = vmulq_f16(vt, vs);
154
155 float16x8_t vf = vfmaq_f16(vs, vp, vt);
156 const uint16x8_t vm = vcltq_f16(vx, vdenorm_cutoff);
157 vf = vreinterpretq_f16_u16(vbicq_u16(vreinterpretq_u16_f16(vf), vm));
158
159 float16x4_t vf_lo = vget_low_f16(vf);
160 if (batch & (4 * sizeof(__fp16))) {
161 vst1_f16(o, vf_lo); o += 4;
162 vacc_lo = vadd_f16(vacc_lo, vf_lo);
163 vf_lo = vget_high_f16(vf);
164 }
165 if (batch & (2 * sizeof(__fp16))) {
166 vst1_lane_u32((void*) o, vreinterpret_u32_f16(vf_lo), 0); o += 2;
167 vacc_lo = vadd_f16(vacc_lo, vreinterpret_f16_u64(vshl_n_u64(vreinterpret_u64_f16(vf_lo), 32)));
168 vf_lo = vext_f16(vf_lo, vf_lo, 2);
169 }
170 if (batch & (1 * sizeof(__fp16))) {
171 vst1_lane_f16(o, vf_lo, 0);
172 vacc_lo = vadd_f16(vacc_lo, vreinterpret_f16_u64(vshl_n_u64(vreinterpret_u64_f16(vf_lo), 48)));
173 }
174 }
175 vacc_lo = vpadd_f16(vacc_lo, vacc_lo);
176 *((__fp16*) sum) = vget_lane_f16(vacc_lo, 0) + vget_lane_f16(vacc_lo, 1);
177 }
178