1 // Auto-generated file. Do not edit!
2 // Template: src/f16-raddstoreexpminusmax/avx2-rr1-p2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/intrinsics-polyfill.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f16_raddstoreexpminusmax_ukernel__avx2_rr1_p2_x96_acc2(size_t batch,const void * input,const void * max,void * output,void * sum,const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f16_raddstoreexpminusmax_ukernel__avx2_rr1_p2_x96_acc2(
19 size_t batch,
20 const void* input,
21 const void* max,
22 void* output,
23 void* sum,
24 const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26 assert(batch % sizeof(uint16_t) == 0);
27
28 const __m256 vi_max = _mm256_cvtph_ps(_mm_set1_epi16((short) *((const uint16_t*) max)));
29 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p2.log2e);
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p2.magic_bias);
31 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2);
32 const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p2.c2);
33 const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p2.c1);
34 const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p2.denorm_cutoff);
35
36 const uint16_t* i = (const uint16_t*) input;
37 uint16_t* o = (uint16_t*) output;
38 __m256 vacc0 = _mm256_setzero_ps();
39 __m256 vacc1 = _mm256_setzero_ps();
40 for (; batch >= 96 * sizeof(uint16_t); batch -= 96 * sizeof(uint16_t)) {
41 const __m256 vi0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
42 const __m256 vi1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 8)));
43 const __m256 vi2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 16)));
44 const __m256 vi3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 24)));
45 const __m256 vi4 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 32)));
46 const __m256 vi5 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 40)));
47 const __m256 vi6 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 48)));
48 const __m256 vi7 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 56)));
49 const __m256 vi8 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 64)));
50 const __m256 vi9 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 72)));
51 const __m256 viA = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 80)));
52 const __m256 viB = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 88)));
53 i += 96;
54
55 const __m256 vx0 = _mm256_sub_ps(vi0, vi_max);
56 const __m256 vx1 = _mm256_sub_ps(vi1, vi_max);
57 const __m256 vx2 = _mm256_sub_ps(vi2, vi_max);
58 const __m256 vx3 = _mm256_sub_ps(vi3, vi_max);
59 const __m256 vx4 = _mm256_sub_ps(vi4, vi_max);
60 const __m256 vx5 = _mm256_sub_ps(vi5, vi_max);
61 const __m256 vx6 = _mm256_sub_ps(vi6, vi_max);
62 const __m256 vx7 = _mm256_sub_ps(vi7, vi_max);
63 const __m256 vx8 = _mm256_sub_ps(vi8, vi_max);
64 const __m256 vx9 = _mm256_sub_ps(vi9, vi_max);
65 const __m256 vxA = _mm256_sub_ps(viA, vi_max);
66 const __m256 vxB = _mm256_sub_ps(viB, vi_max);
67
68 __m256 vn0 = _mm256_fmadd_ps(vx0, vlog2e, vmagic_bias);
69 __m256 vn1 = _mm256_fmadd_ps(vx1, vlog2e, vmagic_bias);
70 __m256 vn2 = _mm256_fmadd_ps(vx2, vlog2e, vmagic_bias);
71 __m256 vn3 = _mm256_fmadd_ps(vx3, vlog2e, vmagic_bias);
72 __m256 vn4 = _mm256_fmadd_ps(vx4, vlog2e, vmagic_bias);
73 __m256 vn5 = _mm256_fmadd_ps(vx5, vlog2e, vmagic_bias);
74 __m256 vn6 = _mm256_fmadd_ps(vx6, vlog2e, vmagic_bias);
75 __m256 vn7 = _mm256_fmadd_ps(vx7, vlog2e, vmagic_bias);
76 __m256 vn8 = _mm256_fmadd_ps(vx8, vlog2e, vmagic_bias);
77 __m256 vn9 = _mm256_fmadd_ps(vx9, vlog2e, vmagic_bias);
78 __m256 vnA = _mm256_fmadd_ps(vxA, vlog2e, vmagic_bias);
79 __m256 vnB = _mm256_fmadd_ps(vxB, vlog2e, vmagic_bias);
80
81 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
82 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
83 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
84 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
85 const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
86 const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23));
87 const __m256 vs6 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn6), 23));
88 const __m256 vs7 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn7), 23));
89 const __m256 vs8 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn8), 23));
90 const __m256 vs9 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn9), 23));
91 const __m256 vsA = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vnA), 23));
92 const __m256 vsB = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vnB), 23));
93
94 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
95 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
96 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
97 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
98 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
99 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
100 vn6 = _mm256_sub_ps(vn6, vmagic_bias);
101 vn7 = _mm256_sub_ps(vn7, vmagic_bias);
102 vn8 = _mm256_sub_ps(vn8, vmagic_bias);
103 vn9 = _mm256_sub_ps(vn9, vmagic_bias);
104 vnA = _mm256_sub_ps(vnA, vmagic_bias);
105 vnB = _mm256_sub_ps(vnB, vmagic_bias);
106
107 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vx0);
108 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vx1);
109 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vx2);
110 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vx3);
111 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vx4);
112 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vx5);
113 __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2, vx6);
114 __m256 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2, vx7);
115 __m256 vt8 = _mm256_fmadd_ps(vn8, vminus_ln2, vx8);
116 __m256 vt9 = _mm256_fmadd_ps(vn9, vminus_ln2, vx9);
117 __m256 vtA = _mm256_fmadd_ps(vnA, vminus_ln2, vxA);
118 __m256 vtB = _mm256_fmadd_ps(vnB, vminus_ln2, vxB);
119
120 const __m256 vp0 = _mm256_fmadd_ps(vc2, vt0, vc1);
121 const __m256 vp1 = _mm256_fmadd_ps(vc2, vt1, vc1);
122 const __m256 vp2 = _mm256_fmadd_ps(vc2, vt2, vc1);
123 const __m256 vp3 = _mm256_fmadd_ps(vc2, vt3, vc1);
124 const __m256 vp4 = _mm256_fmadd_ps(vc2, vt4, vc1);
125 const __m256 vp5 = _mm256_fmadd_ps(vc2, vt5, vc1);
126 const __m256 vp6 = _mm256_fmadd_ps(vc2, vt6, vc1);
127 const __m256 vp7 = _mm256_fmadd_ps(vc2, vt7, vc1);
128 const __m256 vp8 = _mm256_fmadd_ps(vc2, vt8, vc1);
129 const __m256 vp9 = _mm256_fmadd_ps(vc2, vt9, vc1);
130 const __m256 vpA = _mm256_fmadd_ps(vc2, vtA, vc1);
131 const __m256 vpB = _mm256_fmadd_ps(vc2, vtB, vc1);
132
133 vt0 = _mm256_mul_ps(vt0, vs0);
134 vt1 = _mm256_mul_ps(vt1, vs1);
135 vt2 = _mm256_mul_ps(vt2, vs2);
136 vt3 = _mm256_mul_ps(vt3, vs3);
137 vt4 = _mm256_mul_ps(vt4, vs4);
138 vt5 = _mm256_mul_ps(vt5, vs5);
139 vt6 = _mm256_mul_ps(vt6, vs6);
140 vt7 = _mm256_mul_ps(vt7, vs7);
141 vt8 = _mm256_mul_ps(vt8, vs8);
142 vt9 = _mm256_mul_ps(vt9, vs9);
143 vtA = _mm256_mul_ps(vtA, vsA);
144 vtB = _mm256_mul_ps(vtB, vsB);
145
146 __m256 vf0 = _mm256_fmadd_ps(vt0, vp0, vs0);
147 __m256 vf1 = _mm256_fmadd_ps(vt1, vp1, vs1);
148 __m256 vf2 = _mm256_fmadd_ps(vt2, vp2, vs2);
149 __m256 vf3 = _mm256_fmadd_ps(vt3, vp3, vs3);
150 __m256 vf4 = _mm256_fmadd_ps(vt4, vp4, vs4);
151 __m256 vf5 = _mm256_fmadd_ps(vt5, vp5, vs5);
152 __m256 vf6 = _mm256_fmadd_ps(vt6, vp6, vs6);
153 __m256 vf7 = _mm256_fmadd_ps(vt7, vp7, vs7);
154 __m256 vf8 = _mm256_fmadd_ps(vt8, vp8, vs8);
155 __m256 vf9 = _mm256_fmadd_ps(vt9, vp9, vs9);
156 __m256 vfA = _mm256_fmadd_ps(vtA, vpA, vsA);
157 __m256 vfB = _mm256_fmadd_ps(vtB, vpB, vsB);
158
159 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vx0, vdenorm_cutoff, _CMP_LT_OS), vf0);
160 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vx1, vdenorm_cutoff, _CMP_LT_OS), vf1);
161 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vx2, vdenorm_cutoff, _CMP_LT_OS), vf2);
162 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vx3, vdenorm_cutoff, _CMP_LT_OS), vf3);
163 vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vx4, vdenorm_cutoff, _CMP_LT_OS), vf4);
164 vf5 = _mm256_andnot_ps(_mm256_cmp_ps(vx5, vdenorm_cutoff, _CMP_LT_OS), vf5);
165 vf6 = _mm256_andnot_ps(_mm256_cmp_ps(vx6, vdenorm_cutoff, _CMP_LT_OS), vf6);
166 vf7 = _mm256_andnot_ps(_mm256_cmp_ps(vx7, vdenorm_cutoff, _CMP_LT_OS), vf7);
167 vf8 = _mm256_andnot_ps(_mm256_cmp_ps(vx8, vdenorm_cutoff, _CMP_LT_OS), vf8);
168 vf9 = _mm256_andnot_ps(_mm256_cmp_ps(vx9, vdenorm_cutoff, _CMP_LT_OS), vf9);
169 vfA = _mm256_andnot_ps(_mm256_cmp_ps(vxA, vdenorm_cutoff, _CMP_LT_OS), vfA);
170 vfB = _mm256_andnot_ps(_mm256_cmp_ps(vxB, vdenorm_cutoff, _CMP_LT_OS), vfB);
171
172 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf0, _MM_FROUND_NO_EXC));
173 _mm_storeu_si128((__m128i*) (o + 8), _mm256_cvtps_ph(vf1, _MM_FROUND_NO_EXC));
174 _mm_storeu_si128((__m128i*) (o + 16), _mm256_cvtps_ph(vf2, _MM_FROUND_NO_EXC));
175 _mm_storeu_si128((__m128i*) (o + 24), _mm256_cvtps_ph(vf3, _MM_FROUND_NO_EXC));
176 _mm_storeu_si128((__m128i*) (o + 32), _mm256_cvtps_ph(vf4, _MM_FROUND_NO_EXC));
177 _mm_storeu_si128((__m128i*) (o + 40), _mm256_cvtps_ph(vf5, _MM_FROUND_NO_EXC));
178 _mm_storeu_si128((__m128i*) (o + 48), _mm256_cvtps_ph(vf6, _MM_FROUND_NO_EXC));
179 _mm_storeu_si128((__m128i*) (o + 56), _mm256_cvtps_ph(vf7, _MM_FROUND_NO_EXC));
180 _mm_storeu_si128((__m128i*) (o + 64), _mm256_cvtps_ph(vf8, _MM_FROUND_NO_EXC));
181 _mm_storeu_si128((__m128i*) (o + 72), _mm256_cvtps_ph(vf9, _MM_FROUND_NO_EXC));
182 _mm_storeu_si128((__m128i*) (o + 80), _mm256_cvtps_ph(vfA, _MM_FROUND_NO_EXC));
183 _mm_storeu_si128((__m128i*) (o + 88), _mm256_cvtps_ph(vfB, _MM_FROUND_NO_EXC));
184 o += 96;
185
186 vacc0 = _mm256_add_ps(vacc0, vf0);
187 vacc1 = _mm256_add_ps(vacc1, vf1);
188 vacc0 = _mm256_add_ps(vacc0, vf2);
189 vacc1 = _mm256_add_ps(vacc1, vf3);
190 vacc0 = _mm256_add_ps(vacc0, vf4);
191 vacc1 = _mm256_add_ps(vacc1, vf5);
192 vacc0 = _mm256_add_ps(vacc0, vf6);
193 vacc1 = _mm256_add_ps(vacc1, vf7);
194 vacc0 = _mm256_add_ps(vacc0, vf8);
195 vacc1 = _mm256_add_ps(vacc1, vf9);
196 vacc0 = _mm256_add_ps(vacc0, vfA);
197 vacc1 = _mm256_add_ps(vacc1, vfB);
198 }
199 vacc0 = _mm256_add_ps(vacc0, vacc1);
200
201 __m256 vacc = vacc0;
202 for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) {
203 const __m256 vi = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
204 i += 8;
205
206 const __m256 vx = _mm256_sub_ps(vi, vi_max);
207
208 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
209
210 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
211
212 vn = _mm256_sub_ps(vn, vmagic_bias);
213
214 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vx);
215
216 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
217 vt = _mm256_mul_ps(vt, vs);
218 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
219 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
220
221 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC));
222 o += 8;
223
224 vacc = _mm256_add_ps(vacc, vf);
225 }
226 __m128 vacc_lo = _mm_add_ps(_mm256_castps256_ps128(vacc), _mm256_extractf128_ps(vacc, 1));
227 if (batch != 0) {
228 assert(batch >= 1 * sizeof(uint16_t));
229 assert(batch <= 7 * sizeof(uint16_t));
230
231 const __m256 vi = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
232
233 const __m256 vx = _mm256_sub_ps(vi, vi_max);
234
235 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
236
237 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
238
239 vn = _mm256_sub_ps(vn, vmagic_bias);
240
241 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vx);
242
243 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
244 vt = _mm256_mul_ps(vt, vs);
245 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
246 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
247
248 __m128i vh = _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC);
249 __m128 vf_lo = _mm256_castps256_ps128(vf);
250 if (batch & (4 * sizeof(uint16_t))) {
251 _mm_storel_epi64((__m128i*) o, vh);
252 vh = _mm_unpackhi_epi64(vh, vh);
253 vacc_lo = _mm_add_ps(vacc_lo, vf_lo);
254 vf_lo = _mm256_extractf128_ps(vf, 1);
255 o += 4;
256 }
257 if (batch & (2 * sizeof(uint16_t))) {
258 _mm_storeu_si32(o, vh);
259 vh = _mm_srli_epi64(vh, 32);
260 vacc_lo = _mm_blend_ps(_mm_add_ps(vacc_lo, vf_lo), vacc_lo, 0xC);
261 vf_lo = _mm_movehl_ps(vf_lo, vf_lo);
262 o += 2;
263 }
264 if (batch & (1 * sizeof(uint16_t))) {
265 *o = (uint16_t) _mm_extract_epi16(vh, 0);
266 vacc_lo = _mm_add_ss(vacc_lo, vf_lo);
267 }
268 }
269 vacc_lo = _mm_add_ps(vacc_lo, _mm_movehl_ps(vacc_lo, vacc_lo));
270 vacc_lo = _mm_add_ss(vacc_lo, _mm_movehdup_ps(vacc_lo));
271 *((uint16_t*) sum) = (uint16_t) _mm_extract_epi16(_mm_cvtps_ph(vacc_lo, _MM_FROUND_NO_EXC), 0);
272 _mm256_zeroupper();
273 }
274