1 // Auto-generated file. Do not edit!
2 // Template: src/f16-raddstoreexpminusmax/avx2-rr1-p2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/intrinsics-polyfill.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f16_raddstoreexpminusmax_ukernel__avx2_rr1_p2_x80_acc2(size_t batch,const void * input,const void * max,void * output,void * sum,const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f16_raddstoreexpminusmax_ukernel__avx2_rr1_p2_x80_acc2(
19 size_t batch,
20 const void* input,
21 const void* max,
22 void* output,
23 void* sum,
24 const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26 assert(batch % sizeof(uint16_t) == 0);
27
28 const __m256 vi_max = _mm256_cvtph_ps(_mm_set1_epi16((short) *((const uint16_t*) max)));
29 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p2.log2e);
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p2.magic_bias);
31 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2);
32 const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p2.c2);
33 const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p2.c1);
34 const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p2.denorm_cutoff);
35
36 const uint16_t* i = (const uint16_t*) input;
37 uint16_t* o = (uint16_t*) output;
38 __m256 vacc0 = _mm256_setzero_ps();
39 __m256 vacc1 = _mm256_setzero_ps();
40 for (; batch >= 80 * sizeof(uint16_t); batch -= 80 * sizeof(uint16_t)) {
41 const __m256 vi0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
42 const __m256 vi1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 8)));
43 const __m256 vi2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 16)));
44 const __m256 vi3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 24)));
45 const __m256 vi4 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 32)));
46 const __m256 vi5 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 40)));
47 const __m256 vi6 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 48)));
48 const __m256 vi7 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 56)));
49 const __m256 vi8 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 64)));
50 const __m256 vi9 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 72)));
51 i += 80;
52
53 const __m256 vx0 = _mm256_sub_ps(vi0, vi_max);
54 const __m256 vx1 = _mm256_sub_ps(vi1, vi_max);
55 const __m256 vx2 = _mm256_sub_ps(vi2, vi_max);
56 const __m256 vx3 = _mm256_sub_ps(vi3, vi_max);
57 const __m256 vx4 = _mm256_sub_ps(vi4, vi_max);
58 const __m256 vx5 = _mm256_sub_ps(vi5, vi_max);
59 const __m256 vx6 = _mm256_sub_ps(vi6, vi_max);
60 const __m256 vx7 = _mm256_sub_ps(vi7, vi_max);
61 const __m256 vx8 = _mm256_sub_ps(vi8, vi_max);
62 const __m256 vx9 = _mm256_sub_ps(vi9, vi_max);
63
64 __m256 vn0 = _mm256_fmadd_ps(vx0, vlog2e, vmagic_bias);
65 __m256 vn1 = _mm256_fmadd_ps(vx1, vlog2e, vmagic_bias);
66 __m256 vn2 = _mm256_fmadd_ps(vx2, vlog2e, vmagic_bias);
67 __m256 vn3 = _mm256_fmadd_ps(vx3, vlog2e, vmagic_bias);
68 __m256 vn4 = _mm256_fmadd_ps(vx4, vlog2e, vmagic_bias);
69 __m256 vn5 = _mm256_fmadd_ps(vx5, vlog2e, vmagic_bias);
70 __m256 vn6 = _mm256_fmadd_ps(vx6, vlog2e, vmagic_bias);
71 __m256 vn7 = _mm256_fmadd_ps(vx7, vlog2e, vmagic_bias);
72 __m256 vn8 = _mm256_fmadd_ps(vx8, vlog2e, vmagic_bias);
73 __m256 vn9 = _mm256_fmadd_ps(vx9, vlog2e, vmagic_bias);
74
75 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
76 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
77 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
78 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
79 const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
80 const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23));
81 const __m256 vs6 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn6), 23));
82 const __m256 vs7 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn7), 23));
83 const __m256 vs8 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn8), 23));
84 const __m256 vs9 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn9), 23));
85
86 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
87 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
88 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
89 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
90 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
91 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
92 vn6 = _mm256_sub_ps(vn6, vmagic_bias);
93 vn7 = _mm256_sub_ps(vn7, vmagic_bias);
94 vn8 = _mm256_sub_ps(vn8, vmagic_bias);
95 vn9 = _mm256_sub_ps(vn9, vmagic_bias);
96
97 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vx0);
98 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vx1);
99 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vx2);
100 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vx3);
101 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vx4);
102 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2, vx5);
103 __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2, vx6);
104 __m256 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2, vx7);
105 __m256 vt8 = _mm256_fmadd_ps(vn8, vminus_ln2, vx8);
106 __m256 vt9 = _mm256_fmadd_ps(vn9, vminus_ln2, vx9);
107
108 const __m256 vp0 = _mm256_fmadd_ps(vc2, vt0, vc1);
109 const __m256 vp1 = _mm256_fmadd_ps(vc2, vt1, vc1);
110 const __m256 vp2 = _mm256_fmadd_ps(vc2, vt2, vc1);
111 const __m256 vp3 = _mm256_fmadd_ps(vc2, vt3, vc1);
112 const __m256 vp4 = _mm256_fmadd_ps(vc2, vt4, vc1);
113 const __m256 vp5 = _mm256_fmadd_ps(vc2, vt5, vc1);
114 const __m256 vp6 = _mm256_fmadd_ps(vc2, vt6, vc1);
115 const __m256 vp7 = _mm256_fmadd_ps(vc2, vt7, vc1);
116 const __m256 vp8 = _mm256_fmadd_ps(vc2, vt8, vc1);
117 const __m256 vp9 = _mm256_fmadd_ps(vc2, vt9, vc1);
118
119 vt0 = _mm256_mul_ps(vt0, vs0);
120 vt1 = _mm256_mul_ps(vt1, vs1);
121 vt2 = _mm256_mul_ps(vt2, vs2);
122 vt3 = _mm256_mul_ps(vt3, vs3);
123 vt4 = _mm256_mul_ps(vt4, vs4);
124 vt5 = _mm256_mul_ps(vt5, vs5);
125 vt6 = _mm256_mul_ps(vt6, vs6);
126 vt7 = _mm256_mul_ps(vt7, vs7);
127 vt8 = _mm256_mul_ps(vt8, vs8);
128 vt9 = _mm256_mul_ps(vt9, vs9);
129
130 __m256 vf0 = _mm256_fmadd_ps(vt0, vp0, vs0);
131 __m256 vf1 = _mm256_fmadd_ps(vt1, vp1, vs1);
132 __m256 vf2 = _mm256_fmadd_ps(vt2, vp2, vs2);
133 __m256 vf3 = _mm256_fmadd_ps(vt3, vp3, vs3);
134 __m256 vf4 = _mm256_fmadd_ps(vt4, vp4, vs4);
135 __m256 vf5 = _mm256_fmadd_ps(vt5, vp5, vs5);
136 __m256 vf6 = _mm256_fmadd_ps(vt6, vp6, vs6);
137 __m256 vf7 = _mm256_fmadd_ps(vt7, vp7, vs7);
138 __m256 vf8 = _mm256_fmadd_ps(vt8, vp8, vs8);
139 __m256 vf9 = _mm256_fmadd_ps(vt9, vp9, vs9);
140
141 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vx0, vdenorm_cutoff, _CMP_LT_OS), vf0);
142 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vx1, vdenorm_cutoff, _CMP_LT_OS), vf1);
143 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vx2, vdenorm_cutoff, _CMP_LT_OS), vf2);
144 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vx3, vdenorm_cutoff, _CMP_LT_OS), vf3);
145 vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vx4, vdenorm_cutoff, _CMP_LT_OS), vf4);
146 vf5 = _mm256_andnot_ps(_mm256_cmp_ps(vx5, vdenorm_cutoff, _CMP_LT_OS), vf5);
147 vf6 = _mm256_andnot_ps(_mm256_cmp_ps(vx6, vdenorm_cutoff, _CMP_LT_OS), vf6);
148 vf7 = _mm256_andnot_ps(_mm256_cmp_ps(vx7, vdenorm_cutoff, _CMP_LT_OS), vf7);
149 vf8 = _mm256_andnot_ps(_mm256_cmp_ps(vx8, vdenorm_cutoff, _CMP_LT_OS), vf8);
150 vf9 = _mm256_andnot_ps(_mm256_cmp_ps(vx9, vdenorm_cutoff, _CMP_LT_OS), vf9);
151
152 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf0, _MM_FROUND_NO_EXC));
153 _mm_storeu_si128((__m128i*) (o + 8), _mm256_cvtps_ph(vf1, _MM_FROUND_NO_EXC));
154 _mm_storeu_si128((__m128i*) (o + 16), _mm256_cvtps_ph(vf2, _MM_FROUND_NO_EXC));
155 _mm_storeu_si128((__m128i*) (o + 24), _mm256_cvtps_ph(vf3, _MM_FROUND_NO_EXC));
156 _mm_storeu_si128((__m128i*) (o + 32), _mm256_cvtps_ph(vf4, _MM_FROUND_NO_EXC));
157 _mm_storeu_si128((__m128i*) (o + 40), _mm256_cvtps_ph(vf5, _MM_FROUND_NO_EXC));
158 _mm_storeu_si128((__m128i*) (o + 48), _mm256_cvtps_ph(vf6, _MM_FROUND_NO_EXC));
159 _mm_storeu_si128((__m128i*) (o + 56), _mm256_cvtps_ph(vf7, _MM_FROUND_NO_EXC));
160 _mm_storeu_si128((__m128i*) (o + 64), _mm256_cvtps_ph(vf8, _MM_FROUND_NO_EXC));
161 _mm_storeu_si128((__m128i*) (o + 72), _mm256_cvtps_ph(vf9, _MM_FROUND_NO_EXC));
162 o += 80;
163
164 vacc0 = _mm256_add_ps(vacc0, vf0);
165 vacc1 = _mm256_add_ps(vacc1, vf1);
166 vacc0 = _mm256_add_ps(vacc0, vf2);
167 vacc1 = _mm256_add_ps(vacc1, vf3);
168 vacc0 = _mm256_add_ps(vacc0, vf4);
169 vacc1 = _mm256_add_ps(vacc1, vf5);
170 vacc0 = _mm256_add_ps(vacc0, vf6);
171 vacc1 = _mm256_add_ps(vacc1, vf7);
172 vacc0 = _mm256_add_ps(vacc0, vf8);
173 vacc1 = _mm256_add_ps(vacc1, vf9);
174 }
175 vacc0 = _mm256_add_ps(vacc0, vacc1);
176
177 __m256 vacc = vacc0;
178 for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) {
179 const __m256 vi = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
180 i += 8;
181
182 const __m256 vx = _mm256_sub_ps(vi, vi_max);
183
184 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
185
186 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
187
188 vn = _mm256_sub_ps(vn, vmagic_bias);
189
190 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vx);
191
192 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
193 vt = _mm256_mul_ps(vt, vs);
194 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
195 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
196
197 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC));
198 o += 8;
199
200 vacc = _mm256_add_ps(vacc, vf);
201 }
202 __m128 vacc_lo = _mm_add_ps(_mm256_castps256_ps128(vacc), _mm256_extractf128_ps(vacc, 1));
203 if (batch != 0) {
204 assert(batch >= 1 * sizeof(uint16_t));
205 assert(batch <= 7 * sizeof(uint16_t));
206
207 const __m256 vi = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
208
209 const __m256 vx = _mm256_sub_ps(vi, vi_max);
210
211 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
212
213 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
214
215 vn = _mm256_sub_ps(vn, vmagic_bias);
216
217 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vx);
218
219 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
220 vt = _mm256_mul_ps(vt, vs);
221 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
222 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
223
224 __m128i vh = _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC);
225 __m128 vf_lo = _mm256_castps256_ps128(vf);
226 if (batch & (4 * sizeof(uint16_t))) {
227 _mm_storel_epi64((__m128i*) o, vh);
228 vh = _mm_unpackhi_epi64(vh, vh);
229 vacc_lo = _mm_add_ps(vacc_lo, vf_lo);
230 vf_lo = _mm256_extractf128_ps(vf, 1);
231 o += 4;
232 }
233 if (batch & (2 * sizeof(uint16_t))) {
234 _mm_storeu_si32(o, vh);
235 vh = _mm_srli_epi64(vh, 32);
236 vacc_lo = _mm_blend_ps(_mm_add_ps(vacc_lo, vf_lo), vacc_lo, 0xC);
237 vf_lo = _mm_movehl_ps(vf_lo, vf_lo);
238 o += 2;
239 }
240 if (batch & (1 * sizeof(uint16_t))) {
241 *o = (uint16_t) _mm_extract_epi16(vh, 0);
242 vacc_lo = _mm_add_ss(vacc_lo, vf_lo);
243 }
244 }
245 vacc_lo = _mm_add_ps(vacc_lo, _mm_movehl_ps(vacc_lo, vacc_lo));
246 vacc_lo = _mm_add_ss(vacc_lo, _mm_movehdup_ps(vacc_lo));
247 *((uint16_t*) sum) = (uint16_t) _mm_extract_epi16(_mm_cvtps_ph(vacc_lo, _MM_FROUND_NO_EXC), 0);
248 _mm256_zeroupper();
249 }
250