1 // Auto-generated file. Do not edit!
2 // Template: src/f16-raddstoreexpminusmax/avx2-rr1-p2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/intrinsics-polyfill.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f16_raddstoreexpminusmax_ukernel__avx2_rr1_p2_x32_acc2(size_t batch,const void * input,const void * max,void * output,void * sum,const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f16_raddstoreexpminusmax_ukernel__avx2_rr1_p2_x32_acc2(
19 size_t batch,
20 const void* input,
21 const void* max,
22 void* output,
23 void* sum,
24 const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26 assert(batch % sizeof(uint16_t) == 0);
27
28 const __m256 vi_max = _mm256_cvtph_ps(_mm_set1_epi16((short) *((const uint16_t*) max)));
29 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p2.log2e);
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p2.magic_bias);
31 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2);
32 const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p2.c2);
33 const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p2.c1);
34 const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p2.denorm_cutoff);
35
36 const uint16_t* i = (const uint16_t*) input;
37 uint16_t* o = (uint16_t*) output;
38 __m256 vacc0 = _mm256_setzero_ps();
39 __m256 vacc1 = _mm256_setzero_ps();
40 for (; batch >= 32 * sizeof(uint16_t); batch -= 32 * sizeof(uint16_t)) {
41 const __m256 vi0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
42 const __m256 vi1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 8)));
43 const __m256 vi2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 16)));
44 const __m256 vi3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 24)));
45 i += 32;
46
47 const __m256 vx0 = _mm256_sub_ps(vi0, vi_max);
48 const __m256 vx1 = _mm256_sub_ps(vi1, vi_max);
49 const __m256 vx2 = _mm256_sub_ps(vi2, vi_max);
50 const __m256 vx3 = _mm256_sub_ps(vi3, vi_max);
51
52 __m256 vn0 = _mm256_fmadd_ps(vx0, vlog2e, vmagic_bias);
53 __m256 vn1 = _mm256_fmadd_ps(vx1, vlog2e, vmagic_bias);
54 __m256 vn2 = _mm256_fmadd_ps(vx2, vlog2e, vmagic_bias);
55 __m256 vn3 = _mm256_fmadd_ps(vx3, vlog2e, vmagic_bias);
56
57 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
58 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
59 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
60 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
61
62 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
63 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
64 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
65 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
66
67 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vx0);
68 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vx1);
69 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vx2);
70 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vx3);
71
72 const __m256 vp0 = _mm256_fmadd_ps(vc2, vt0, vc1);
73 const __m256 vp1 = _mm256_fmadd_ps(vc2, vt1, vc1);
74 const __m256 vp2 = _mm256_fmadd_ps(vc2, vt2, vc1);
75 const __m256 vp3 = _mm256_fmadd_ps(vc2, vt3, vc1);
76
77 vt0 = _mm256_mul_ps(vt0, vs0);
78 vt1 = _mm256_mul_ps(vt1, vs1);
79 vt2 = _mm256_mul_ps(vt2, vs2);
80 vt3 = _mm256_mul_ps(vt3, vs3);
81
82 __m256 vf0 = _mm256_fmadd_ps(vt0, vp0, vs0);
83 __m256 vf1 = _mm256_fmadd_ps(vt1, vp1, vs1);
84 __m256 vf2 = _mm256_fmadd_ps(vt2, vp2, vs2);
85 __m256 vf3 = _mm256_fmadd_ps(vt3, vp3, vs3);
86
87 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vx0, vdenorm_cutoff, _CMP_LT_OS), vf0);
88 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vx1, vdenorm_cutoff, _CMP_LT_OS), vf1);
89 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vx2, vdenorm_cutoff, _CMP_LT_OS), vf2);
90 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vx3, vdenorm_cutoff, _CMP_LT_OS), vf3);
91
92 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf0, _MM_FROUND_NO_EXC));
93 _mm_storeu_si128((__m128i*) (o + 8), _mm256_cvtps_ph(vf1, _MM_FROUND_NO_EXC));
94 _mm_storeu_si128((__m128i*) (o + 16), _mm256_cvtps_ph(vf2, _MM_FROUND_NO_EXC));
95 _mm_storeu_si128((__m128i*) (o + 24), _mm256_cvtps_ph(vf3, _MM_FROUND_NO_EXC));
96 o += 32;
97
98 vacc0 = _mm256_add_ps(vacc0, vf0);
99 vacc1 = _mm256_add_ps(vacc1, vf1);
100 vacc0 = _mm256_add_ps(vacc0, vf2);
101 vacc1 = _mm256_add_ps(vacc1, vf3);
102 }
103 vacc0 = _mm256_add_ps(vacc0, vacc1);
104
105 __m256 vacc = vacc0;
106 for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) {
107 const __m256 vi = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
108 i += 8;
109
110 const __m256 vx = _mm256_sub_ps(vi, vi_max);
111
112 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
113
114 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
115
116 vn = _mm256_sub_ps(vn, vmagic_bias);
117
118 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vx);
119
120 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
121 vt = _mm256_mul_ps(vt, vs);
122 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
123 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
124
125 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC));
126 o += 8;
127
128 vacc = _mm256_add_ps(vacc, vf);
129 }
130 __m128 vacc_lo = _mm_add_ps(_mm256_castps256_ps128(vacc), _mm256_extractf128_ps(vacc, 1));
131 if (batch != 0) {
132 assert(batch >= 1 * sizeof(uint16_t));
133 assert(batch <= 7 * sizeof(uint16_t));
134
135 const __m256 vi = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
136
137 const __m256 vx = _mm256_sub_ps(vi, vi_max);
138
139 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
140
141 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
142
143 vn = _mm256_sub_ps(vn, vmagic_bias);
144
145 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vx);
146
147 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
148 vt = _mm256_mul_ps(vt, vs);
149 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
150 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
151
152 __m128i vh = _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC);
153 __m128 vf_lo = _mm256_castps256_ps128(vf);
154 if (batch & (4 * sizeof(uint16_t))) {
155 _mm_storel_epi64((__m128i*) o, vh);
156 vh = _mm_unpackhi_epi64(vh, vh);
157 vacc_lo = _mm_add_ps(vacc_lo, vf_lo);
158 vf_lo = _mm256_extractf128_ps(vf, 1);
159 o += 4;
160 }
161 if (batch & (2 * sizeof(uint16_t))) {
162 _mm_storeu_si32(o, vh);
163 vh = _mm_srli_epi64(vh, 32);
164 vacc_lo = _mm_blend_ps(_mm_add_ps(vacc_lo, vf_lo), vacc_lo, 0xC);
165 vf_lo = _mm_movehl_ps(vf_lo, vf_lo);
166 o += 2;
167 }
168 if (batch & (1 * sizeof(uint16_t))) {
169 *o = (uint16_t) _mm_extract_epi16(vh, 0);
170 vacc_lo = _mm_add_ss(vacc_lo, vf_lo);
171 }
172 }
173 vacc_lo = _mm_add_ps(vacc_lo, _mm_movehl_ps(vacc_lo, vacc_lo));
174 vacc_lo = _mm_add_ss(vacc_lo, _mm_movehdup_ps(vacc_lo));
175 *((uint16_t*) sum) = (uint16_t) _mm_extract_epi16(_mm_cvtps_ph(vacc_lo, _MM_FROUND_NO_EXC), 0);
176 _mm256_zeroupper();
177 }
178