xref: /aosp_15_r20/external/XNNPACK/src/f16-f32-vcvt/gen/vcvt-neon-int32-x8.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/f16-f32-vcvt/neon-int32.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2021 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/vcvt.h>
16 
17 
xnn_f16_f32_vcvt_ukernel__neon_int32_x8(size_t n,const void * input,float * output,const union xnn_f16_f32_cvt_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f16_f32_vcvt_ukernel__neon_int32_x8(
19     size_t n,
20     const void* input,
21     float* output,
22     const union xnn_f16_f32_cvt_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
23 {
24   assert(n != 0);
25   assert(n % sizeof(uint16_t) == 0);
26   assert(input != NULL);
27   assert(output != NULL);
28 
29   const uint32x4_t vsign_mask = vmovq_n_u32(0x80000000);
30   const uint32x4_t vexp_offset = vmovq_n_u32(0x70000000);
31   const float32x4_t vexp_scale = vld1q_dup_f32(&params->neon.exp_scale);
32   const uint32x4_t vmagic_bias = vmovq_n_u32(0x3F000000);
33   const uint32x4_t vdenorm_cutoff = vmovq_n_u32(0x04000000);
34 
35   const uint16_t* i = (const uint16_t*) input;
36   for (; n >= 8 * sizeof(uint16_t); n -= 8 * sizeof(uint16_t)) {
37     const uint16x8_t vh = vld1q_u16(i); i += 8;
38 
39     const uint32x4_t vw_lo = vshll_n_u16(vget_low_u16(vh), 16);
40     const uint32x4_t vw_hi = vshll_n_u16(vget_high_u16(vh), 16);
41 
42     const uint32x4_t vsign_lo = vandq_u32(vw_lo, vsign_mask);
43     const uint32x4_t vsign_hi = vandq_u32(vw_hi, vsign_mask);
44 
45     const uint32x4_t vnonsign_lo = veorq_u32(vw_lo, vsign_lo);
46     const uint32x4_t vnonsign_hi = veorq_u32(vw_hi, vsign_hi);
47 
48     const float32x4_t vnorm_lo = vmulq_f32(vreinterpretq_f32_u32(vsraq_n_u32(vexp_offset, vnonsign_lo, 3)), vexp_scale);
49     const float32x4_t vnorm_hi = vmulq_f32(vreinterpretq_f32_u32(vsraq_n_u32(vexp_offset, vnonsign_hi, 3)), vexp_scale);
50 
51     const float32x4_t vdenorm_lo = vsubq_f32(vreinterpretq_f32_u32(vsriq_n_u32(vmagic_bias, vnonsign_lo, 16)), vreinterpretq_f32_u32(vmagic_bias));
52     const float32x4_t vdenorm_hi = vsubq_f32(vreinterpretq_f32_u32(vsriq_n_u32(vmagic_bias, vnonsign_hi, 16)), vreinterpretq_f32_u32(vmagic_bias));
53 
54     const uint32x4_t vxmask_lo = vcgtq_u32(vnonsign_lo, vdenorm_cutoff);
55     const uint32x4_t vf_lo = vorrq_u32(vsign_lo, vreinterpretq_u32_f32(vbslq_f32(vxmask_lo, vnorm_lo, vdenorm_lo)));
56 
57     const uint32x4_t vxmask_hi = vcgtq_u32(vnonsign_hi, vdenorm_cutoff);
58     const uint32x4_t vf_hi = vorrq_u32(vsign_hi, vreinterpretq_u32_f32(vbslq_f32(vxmask_hi, vnorm_hi, vdenorm_hi)));
59 
60     vst1q_f32(output, vreinterpretq_f32_u32(vf_lo)); output += 4;
61     vst1q_f32(output, vreinterpretq_f32_u32(vf_hi)); output += 4;
62   }
63   if XNN_UNPREDICTABLE(n != 0) {
64     const uint16x8_t vh = vld1q_u16(i); i += 8;
65 
66     const uint32x4_t vw_lo = vshll_n_u16(vget_low_u16(vh), 16);
67     const uint32x4_t vw_hi = vshll_n_u16(vget_high_u16(vh), 16);
68 
69     const uint32x4_t vsign_lo = vandq_u32(vw_lo, vsign_mask);
70     const uint32x4_t vsign_hi = vandq_u32(vw_hi, vsign_mask);
71 
72     const uint32x4_t vnonsign_lo = veorq_u32(vw_lo, vsign_lo);
73     const uint32x4_t vnonsign_hi = veorq_u32(vw_hi, vsign_hi);
74 
75     const float32x4_t vnorm_lo = vmulq_f32(vreinterpretq_f32_u32(vsraq_n_u32(vexp_offset, vnonsign_lo, 3)), vexp_scale);
76     const float32x4_t vnorm_hi = vmulq_f32(vreinterpretq_f32_u32(vsraq_n_u32(vexp_offset, vnonsign_hi, 3)), vexp_scale);
77 
78     const float32x4_t vdenorm_lo = vsubq_f32(vreinterpretq_f32_u32(vsriq_n_u32(vmagic_bias, vnonsign_lo, 16)), vreinterpretq_f32_u32(vmagic_bias));
79     const float32x4_t vdenorm_hi = vsubq_f32(vreinterpretq_f32_u32(vsriq_n_u32(vmagic_bias, vnonsign_hi, 16)), vreinterpretq_f32_u32(vmagic_bias));
80 
81     const uint32x4_t vxmask_lo = vcgtq_u32(vnonsign_lo, vdenorm_cutoff);
82     uint32x4_t vf = vorrq_u32(vsign_lo, vreinterpretq_u32_f32(vbslq_f32(vxmask_lo, vnorm_lo, vdenorm_lo)));
83 
84     if (n & (4 * sizeof(uint16_t))) {
85       vst1q_f32(output, vreinterpretq_f32_u32(vf)); output += 4;
86 
87       const uint32x4_t vxmask_hi = vcgtq_u32(vnonsign_hi, vdenorm_cutoff);
88       vf = vorrq_u32(vsign_hi, vreinterpretq_u32_f32(vbslq_f32(vxmask_hi, vnorm_hi, vdenorm_hi)));
89     }
90     uint32x2_t vf_lo = vget_low_u32(vf);
91     if (n & (2 * sizeof(uint16_t))) {
92       vst1_f32(output, vreinterpret_f32_u32(vf_lo)); output += 2;
93       vf_lo = vget_high_u32(vf);
94     }
95     if (n & (1 * sizeof(uint16_t))) {
96       vst1_lane_f32(output, vreinterpret_f32_u32(vf_lo), 0);
97     }
98   }
99 }
100