1 /*
2 * Copyright (c) 2022-2023 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "arm_compute/dynamic_fusion/sketch/gpu/operators/GpuConv2d.h"
25
26 #include "arm_compute/core/KernelDescriptors.h"
27 #include "arm_compute/core/Validate.h"
28 #include "arm_compute/core/utils/misc/ShapeCalculator.h"
29 #include "arm_compute/runtime/CL/CLScheduler.h"
30
31 #include "src/common/utils/Log.h"
32 #include "src/core/helpers/AutoConfiguration.h"
33 #include "src/dynamic_fusion/sketch/ArgumentPack.h"
34 #include "src/dynamic_fusion/sketch/gpu/GpuWorkloadSketchImpl.h"
35 #include "src/dynamic_fusion/sketch/gpu/components/cl/ClComponentDirectConv2d.h"
36 #include "src/gpu/cl/kernels/gemm/ClGemmHelpers.h"
37 #include "src/runtime/heuristics/direct_conv/ClDirectConvKernelConfig.h"
38 #include "src/runtime/heuristics/direct_conv/IClDirectConvKernelConfig.h"
39
40 namespace arm_compute
41 {
42 namespace experimental
43 {
44 namespace dynamic_fusion
45 {
46 namespace
47 {
export_to_cl_image_support(const ITensorInfo * tensor,GPUTarget gpu_target,const cl::Device & device,DataLayout data_layout)48 bool export_to_cl_image_support(const ITensorInfo *tensor, GPUTarget gpu_target, const cl::Device &device, DataLayout data_layout)
49 {
50 if(tensor->tensor_shape()[0] % 4 || (data_layout != DataLayout::NHWC))
51 {
52 return false;
53 }
54
55 // If not floating point
56 if(!is_data_type_float(tensor->data_type()))
57 {
58 return false;
59 }
60
61 if(gpu_target == GPUTarget::G71 || get_arch_from_target(gpu_target) == GPUTarget::MIDGARD)
62 {
63 return false;
64 }
65
66 // Check if the cl_khr_image2d_from_buffer extension is supported on the target platform
67 if(!image2d_from_buffer_supported(device))
68 {
69 return false;
70 }
71
72 // Check cl image pitch alignment
73 if(get_cl_image_pitch_alignment(device) == 0)
74 {
75 return false;
76 }
77
78 const size_t image_w = tensor->tensor_shape()[0] / 4;
79 const size_t image_h = tensor->tensor_shape()[1] * tensor->tensor_shape()[2] * tensor->tensor_shape()[3];
80 const size_t max_image_w = device.getInfo<CL_DEVICE_IMAGE2D_MAX_WIDTH>();
81 const size_t max_image_h = device.getInfo<CL_DEVICE_IMAGE2D_MAX_HEIGHT>();
82
83 if(image_w > max_image_w || image_h > max_image_h)
84 {
85 return false;
86 }
87
88 return true;
89 }
90
config_direct_convolution_nhwc(const ITensorInfo * src,const ITensorInfo * weights,const PadStrideInfo & conv_info)91 DirectConvComputeKernelInfo config_direct_convolution_nhwc(const ITensorInfo *src, const ITensorInfo *weights, const PadStrideInfo &conv_info)
92 {
93 // Get GPU target
94 GPUTarget gpu_target = CLScheduler::get().target();
95
96 std::unique_ptr<arm_compute::cl_direct_conv::IClDirectConvKernelConfig> t = arm_compute::cl_direct_conv::ClDirectConvKernelConfigurationFactory::create(gpu_target);
97
98 return t->configure(src, weights, conv_info);
99 }
100
calculate_and_init_dst_if_empty(ITensorInfo * dst,const ITensorInfo * src,const ITensorInfo * wei,const Conv2dAttributes & attributes)101 void calculate_and_init_dst_if_empty(ITensorInfo *dst, const ITensorInfo *src, const ITensorInfo *wei, const Conv2dAttributes &attributes)
102 {
103 if(dst->total_size() == 0U)
104 {
105 const auto shape = misc::shape_calculator::compute_deep_convolution_shape(src->tensor_shape(), src->data_layout(), wei->tensor_shape(),
106 PadStrideInfo(attributes.stride().x(), attributes.stride().y(), attributes.pad().left,
107 attributes.pad().right,
108 attributes.pad().top, attributes.pad().bottom, DimensionRoundingType::FLOOR)); // use the default DimensionRoundingType
109
110 auto_init_if_empty(*dst, src->clone()->set_tensor_shape(shape));
111 }
112 }
113
114 /* A helper method to reduce the duplication in dst tensor initialization
115 * when calling validate()
116 */
is_supported_op_helper(const GpuWorkloadContext & context,const ITensorInfo * src,const ITensorInfo * wei,const ITensorInfo * bia,const ITensorInfo * dst,const Conv2dAttributes & attributes)117 Status is_supported_op_helper(const GpuWorkloadContext &context,
118 const ITensorInfo *src,
119 const ITensorInfo *wei,
120 const ITensorInfo *bia,
121 const ITensorInfo *dst,
122 const Conv2dAttributes &attributes)
123 {
124 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, wei);
125
126 TensorInfo dst_info_to_validate;
127 const ITensorInfo *dst_info_to_validate_ptr = &dst_info_to_validate;
128
129 const DataLayout data_layout = src->data_layout();
130 if(dst != nullptr)
131 {
132 dst_info_to_validate_ptr = dst;
133 }
134
135 calculate_and_init_dst_if_empty(&dst_info_to_validate, src, wei, attributes);
136
137 // Check support level
138 // Data type
139 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src, 1, DataType::F16, DataType::F32);
140 // Data layout
141 ARM_COMPUTE_RETURN_ERROR_ON_DATA_LAYOUT_NOT_IN(src, DataLayout::NHWC);
142
143 // Check components
144 const auto gpu_target = context.gpu_target();
145 if(context.gpu_language() == GpuLanguage::OpenCL)
146 {
147 const auto cl_compile_ctx = context.cl_compile_context();
148 ARM_COMPUTE_RETURN_ERROR_ON(cl_compile_ctx == nullptr);
149 // Validate Direct Conv2d Component
150 {
151 const auto properties = IGpuKernelComponent::Properties().stage(UnitWorkloadStage{ UnitWorkloadStage::Stage::Run });
152 auto settings = ClComponentDirectConv2d::Settings();
153
154 settings.export_to_cl_image(
155 export_to_cl_image_support(src, gpu_target, cl_compile_ctx->get_device(), data_layout));
156
157 settings.fast_relaxed_math(
158 (gpu_target != GPUTarget::G71 && (gpu_target & GPUTarget::GPU_ARCH_MASK) == GPUTarget::BIFROST)
159 && (dst_info_to_validate_ptr->data_type() == DataType::F32 || dst_info_to_validate_ptr->data_type() == DataType::F16));
160
161 ArgumentPack<ITensorInfo> arguments;
162 arguments.add_const_tensor(ACL_SRC_0, src);
163 arguments.add_const_tensor(ACL_SRC_1, wei);
164 arguments.add_const_tensor(ACL_SRC_2, bia);
165 arguments.add_const_tensor(ACL_DST_0, dst_info_to_validate_ptr);
166 ARM_COMPUTE_RETURN_ON_ERROR(ClComponentDirectConv2d::validate(properties, arguments, attributes, settings));
167 }
168 }
169 else
170 {
171 ARM_COMPUTE_RETURN_ERROR_MSG("Unimplemented Gpu language");
172 }
173 return Status{};
174 }
175
176 constexpr GpuOperatorType operator_type = GpuOperatorType::Complex;
177 } // namespace
178
is_supported_op(const GpuWorkloadContext & context,const ITensorInfo * src,const ITensorInfo * wei,const ITensorInfo * bia,const Conv2dAttributes & attributes)179 Status GpuConv2d::is_supported_op(const GpuWorkloadContext &context,
180 const ITensorInfo *src,
181 const ITensorInfo *wei,
182 const ITensorInfo *bia,
183 const Conv2dAttributes &attributes)
184 {
185 return is_supported_op_helper(context, src, wei, bia, nullptr, attributes);
186 }
187
validate_op(const GpuWorkloadSketch & sketch,const ITensorInfo * src,const ITensorInfo * wei,const ITensorInfo * bia,const Conv2dAttributes & attributes)188 Status GpuConv2d::validate_op(const GpuWorkloadSketch &sketch,
189 const ITensorInfo *src,
190 const ITensorInfo *wei,
191 const ITensorInfo *bia,
192 const Conv2dAttributes &attributes)
193 {
194 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, wei);
195
196 // Check if tensors have valid id. I.e. they are created from a sketch
197 ARM_COMPUTE_RETURN_ERROR_ON(!src->has_valid_id() || !wei->has_valid_id());
198 if(bia != nullptr)
199 {
200 ARM_COMPUTE_RETURN_ERROR_ON(!bia->has_valid_id());
201 }
202
203 // This tensor info will have invalid id but because all the existing tensors in the
204 // sketch have valid ids and the DependencyGraph implementation has no notion of validness
205 // regarding tensor ids, it'll be just another tensor id and will validate
206 // Additionally, a new dst id is added every time in create_op, thus there's no need to validate it
207 TensorInfo dst_info_to_validate;
208
209 // Auto initialize dst tensor info
210 calculate_and_init_dst_if_empty(&dst_info_to_validate, src, wei, attributes);
211
212 // Perform fusion test
213 // Check if operator meets fusion constraints
214 ArgumentPack<ITensorInfo> tensors;
215 tensors.add_const_tensor(ACL_SRC_0, src);
216 tensors.add_const_tensor(ACL_SRC_1, wei);
217 tensors.add_const_tensor(ACL_SRC_2, bia);
218 tensors.add_const_tensor(ACL_DST_0, &dst_info_to_validate);
219 const auto op = sketch.implementation().operator_group().new_operator(operator_type, tensors);
220 ARM_COMPUTE_RETURN_ERROR_ON_MSG(!sketch.implementation().operator_group().try_add_operator(op),
221 "Operator fusion test failed. This operator cannot be fused into the workload");
222
223 // Check if configuration is supported
224 return is_supported_op_helper(*sketch.gpu_context(), src, wei, bia, &dst_info_to_validate, attributes);
225 }
226
create_op(GpuWorkloadSketch & sketch,ITensorInfo * src,ITensorInfo * wei,ITensorInfo * bia,const Conv2dAttributes & attributes)227 ITensorInfo *GpuConv2d::create_op(GpuWorkloadSketch &sketch,
228 ITensorInfo *src,
229 ITensorInfo *wei,
230 ITensorInfo *bia,
231 const Conv2dAttributes &attributes)
232 {
233 ARM_COMPUTE_LOG_PARAMS(src, wei, bia, attributes);
234 PadStrideInfo conv_info(attributes.stride().x(), attributes.stride().y(), attributes.pad().left,
235 attributes.pad().right,
236 attributes.pad().top, attributes.pad().bottom, DimensionRoundingType::FLOOR);
237 // Initialize the direct convolution descriptor
238 const DirectConvComputeKernelInfo desc = config_direct_convolution_nhwc(src, wei, conv_info);
239
240 ITensorInfo *dst = sketch.implementation().create_virtual_tensor();
241
242 // Assert validation
243 ARM_COMPUTE_ERROR_THROW_ON(GpuConv2d::validate_op(sketch, src, wei, bia, attributes));
244 ARM_COMPUTE_ERROR_ON_NULLPTR(src, wei, dst);
245
246 // Auto initialize dst tensor
247 calculate_and_init_dst_if_empty(dst, src, wei, attributes);
248
249 // Translate into components and add to component graph
250 auto &comp_graph = sketch.implementation().component_graph();
251
252 const auto sketch_ctx = sketch.implementation().context();
253
254 const auto data_layout = src->data_layout();
255 const auto gpu_target = sketch_ctx->gpu_target();
256
257 if(sketch_ctx->gpu_language() == GpuLanguage::OpenCL)
258 {
259 const auto cl_compile_ctx = sketch_ctx->cl_compile_context();
260 ARM_COMPUTE_ERROR_ON(cl_compile_ctx == nullptr);
261
262 // Add Direct Conv2d Component
263 {
264 auto properties = IGpuKernelComponent::Properties();
265 properties.stage(UnitWorkloadStage{ UnitWorkloadStage::Stage::Run });
266
267 auto settings = ClComponentDirectConv2d::Settings();
268
269 settings.export_to_cl_image(
270 export_to_cl_image_support(src, gpu_target, cl_compile_ctx->get_device(), data_layout));
271
272 settings.fast_relaxed_math(
273 (gpu_target != GPUTarget::G71 && (gpu_target & GPUTarget::GPU_ARCH_MASK) == GPUTarget::BIFROST)
274 && (dst->data_type() == DataType::F32 || dst->data_type() == DataType::F16));
275
276 if(settings.export_to_cl_image())
277 {
278 arm_compute::opencl::kernels::gemm::update_padding_for_cl_image(wei);
279 }
280
281 settings.direct_conv_descriptor(desc);
282
283 ArgumentPack<ITensorInfo> arguments;
284 arguments.add_const_tensor(ACL_SRC_0, src);
285 arguments.add_const_tensor(ACL_SRC_1, wei);
286 arguments.add_const_tensor(ACL_SRC_2, bia);
287 arguments.add_const_tensor(ACL_DST_0, dst);
288 comp_graph.add_new_component<ClComponentDirectConv2d>(properties, arguments, attributes, settings);
289 }
290 }
291 else
292 {
293 ARM_COMPUTE_ERROR("Unimplemented Gpu language");
294 }
295
296 // Set up fusion test by adding to the Operator Group
297 // Note this has to be performed after all the components have been successfully added to the component graph
298
299 // Pack tensor infos
300 ArgumentPack<ITensorInfo> tensors;
301 tensors.add_const_tensor(ACL_SRC_0, src);
302 tensors.add_const_tensor(ACL_SRC_1, wei);
303 tensors.add_const_tensor(ACL_SRC_2, bia);
304 tensors.add_const_tensor(ACL_DST_0, dst);
305
306 const auto op = sketch.implementation().operator_group().new_operator(operator_type, tensors);
307 sketch.implementation().operator_group().add_operator(op);
308
309 return dst;
310 }
311
312 } // namespace dynamic_fusion
313 } // namespace experimental
314 } // namespace arm_compute
315