1 /* 2 * Copyright (c) 2018-2022 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef ARM_COMPUTE_CPU_INTERNAL_CPU_GEMM_ASSEMBLY_DISPATCH_H 25 #define ARM_COMPUTE_CPU_INTERNAL_CPU_GEMM_ASSEMBLY_DISPATCH_H 26 27 #include "src/core/common/Macros.h" 28 #include "src/cpu/ICpuOperator.h" 29 30 namespace arm_compute 31 { 32 namespace cpu 33 { 34 /* Convolution method supported by the assembly gemm interface */ 35 enum class AsmConvMethod 36 { 37 Im2Col, 38 Indirect, 39 Conv 40 }; 41 42 struct AsmGemmInfo 43 { 44 AsmConvMethod method{ AsmConvMethod::Im2Col }; 45 PadStrideInfo ps_info{}; 46 ActivationLayerInfo activation_info{}; 47 GEMMLowpOutputStageInfo output_stage{}; 48 bool negated_offsets{ true }; 49 bool reinterpret_input_as_3d{ false }; 50 bool depth_output_gemm3d{ false }; 51 int64_t padding_top{ 0 }; 52 int64_t padding_left{ 0 }; 53 float padding_value{ 0.f }; 54 bool fast_mode{ false }; 55 bool fixed_format{ false }; 56 arm_compute::WeightFormat weight_format{ arm_compute::WeightFormat::UNSPECIFIED }; 57 bool reshape_b_only_on_first_run{ true }; 58 }; 59 60 /** Assembly kernel glue */ 61 class CpuGemmAssemblyDispatch : public ICpuOperator 62 { 63 public: 64 /** Constructor */ 65 CpuGemmAssemblyDispatch(); 66 /** Defautl destructor */ 67 ~CpuGemmAssemblyDispatch() = default; 68 69 ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuGemmAssemblyDispatch); 70 71 class IFallback 72 { 73 public: 74 virtual void run(ITensorPack &tensors) = 0; 75 virtual void prepare(ITensorPack &tensors) = 0; 76 virtual experimental::MemoryRequirements workspace() const = 0; 77 virtual bool is_configured() const = 0; 78 virtual bool isVarWeightsKernel() const = 0; 79 virtual ~IFallback() = default; 80 }; 81 82 public: 83 /** If supported create a Compute Library function else fallback to the arm_gemm function. 84 * 85 * @param[in] a Input tensor (Matrix A) 86 * @param[in] b Input tensor (Matrix B) 87 * @param[in] c Input tensor (Matrix C) used to pass the bias for quantized calculations 88 * @param[out] d Output tensor to store the result of matrix multiplication. Data type supported: same as @p input0. 89 * @param[in] info GEMM meta-data 90 */ 91 void configure(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, ITensorInfo *d, const AsmGemmInfo &info); 92 93 /** Indicates whether or not this function can be used to process the given parameters. 94 * 95 * @param[in] a Input tensor info (Matrix A) 96 * @param[in] b Input tensor info (Matrix B) 97 * @param[in] c Input tensor info (Matrix C) used to pass the bias for quantized calculations 98 * @param[in] d Output tensor to store the result of matrix multiplication. Data type supported: same as @p input0. 99 * @param[in] info GEMM meta-data 100 * 101 * @return a status. 102 */ 103 static Status validate(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *d, const AsmGemmInfo &info); 104 105 /** Indicates whether or not there is an optimal assembly implementation that can be used to process the given parameters. 106 * 107 * This method has the same use of @ref 108 * NEGEMMConvolutionLayer::has_opt_impl, with the only caveat that 109 * the value of arm_compute::WeightFormat need to be passed via the 110 * parameter info. 111 * 112 * @return a status. 113 */ 114 static Status has_opt_impl(arm_compute::WeightFormat &weight_format, const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *d, const AsmGemmInfo &info); 115 /** Checks if activation is supported by the gemm assembly dispatcher 116 * 117 * @param[in] activation Activation to check 118 * 119 * @return True if activation is supported else false 120 */ 121 static bool is_activation_supported(const ActivationLayerInfo &activation); 122 /** Was the function successfully configured ? 123 * 124 * @return True if the function is configured and ready to run 125 */ 126 bool is_configured() const; 127 /** Indicates if the convolution executes in variable weights mode. 128 * 129 * Similar to @ref CpuGemm::isVarWeightsKernel 130 */ isVarWeightsKernel()131 bool isVarWeightsKernel() const 132 { 133 return _arm_gemm && _arm_gemm->isVarWeightsKernel(); 134 } 135 136 // Inherited methods overridden: 137 void prepare(ITensorPack &tensors) override; 138 void run(ITensorPack &tensors) override; 139 experimental::MemoryRequirements workspace() const override; 140 141 private: 142 std::unique_ptr<IFallback> _arm_gemm; /**< Interface for the arm_gemm fallback */ 143 }; 144 } // namespace cpu 145 } // namespace arm_compute 146 #endif /* ARM_COMPUTE_CPU_INTERNAL_CPU_GEMM_ASSEMBLY_DISPATCH_H */ 147