1 /* 2 * Copyright (c) 2021 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef ARM_COMPUTE_CPU_GEMMLOWP_OUTPUT_STAGE_H 25 #define ARM_COMPUTE_CPU_GEMMLOWP_OUTPUT_STAGE_H 26 27 #include "arm_compute/core/Types.h" 28 #include "src/cpu/ICpuOperator.h" 29 30 /** This file contains all available output stages for GEMMLowp. 31 * 32 * In gemmlowp, the "output stage" is the process that takes a final int32 accumulator value (the output of @ref NEGEMMLowpMatrixMultiplyCore), 33 * and processes it to obtain the final ASYMM8 value. 34 * 35 * More information about the GEMMLowp output stage can be found at https://github.com/google/gemmlowp/blob/master/doc/output.md 36 */ 37 38 namespace arm_compute 39 { 40 namespace cpu 41 { 42 /** Basic function to execute GEMMLowpQuantizeDown kernels. 43 * 44 * This function calls the following kernels: 45 * 46 * -# @ref kernels::CpuGemmLowpQuantizeDownInt32ScaleKernel 47 * -# @ref kernels::CpuGemmLowpQuantizeDownInt32ToUint8ScaleByFixedPointKernel 48 * -# @ref kernels::CpuGemmLowpQuantizeDownInt32ToInt8ScaleByFixedPointKernel 49 * -# @ref kernels::CpuGemmLowpQuantizeDownInt32ToInt16ScaleByFixedPointKernel 50 */ 51 class CpuGemmLowpOutputStage : public ICpuOperator 52 { 53 public: 54 /** Initialise the kernel's inputs, output 55 * 56 * Valid data layouts: 57 * - All 58 * 59 * Valid data type configurations: 60 * |src0 |src1 |dst | 61 * |:--------------|:-------------|:-------------| 62 * |S32 |S32 |QASYMM8 | 63 * |S32 |S32 |QASYMM8_SIGNED| 64 * |S32 |S32 |QSYMM16 | 65 * 66 * @param[in] src Input tensor info. Data type supported: S32 67 * @param[in] bias Biases tensor info. Only shared biases supported and it can be a nullptr if the biases addition is not required. 68 * Biases are 1D tensor with dimensions [OFM]. Data type supported: Same as @p input. 69 * @param[out] dst Output tensor info. Data type supported: Data type supported: QASYMM8/QASYMM8_SIGNED/QSYMM16 70 * @param[in] info GEMMLowp output stage metadata. 71 */ 72 void configure(ITensorInfo *src, ITensorInfo *bias, ITensorInfo *dst, const GEMMLowpOutputStageInfo &info); 73 /** Static function to check if given info will lead to a valid configuration 74 * 75 * Similar to CpuGemmLowpOutputStage::configure() 76 * 77 * @return a status 78 */ 79 static Status validate(const ITensorInfo *src, const ITensorInfo *bias, const ITensorInfo *dst, const GEMMLowpOutputStageInfo &info); 80 81 // Inherited methods overridden: 82 void run(ITensorPack &tensors) override; 83 }; 84 } // namespace cpu 85 } // namespace arm_compute 86 #endif /* ARM_COMPUTE_CPU_GEMMLOWP_OUTPUT_STAGE_H */ 87