1 /* 2 * Copyright (c) 2021, 2023 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef ARM_COMPUTE_CPU_CAST_H 25 #define ARM_COMPUTE_CPU_CAST_H 26 27 #include "src/cpu/ICpuOperator.h" 28 29 namespace arm_compute 30 { 31 namespace cpu 32 { 33 /** Basic function to run @ref kernels::CpuCastKernel */ 34 class CpuCast : public ICpuOperator 35 { 36 public: 37 /** Configure operator for a given list of arguments 38 * 39 * Input data type must be different than output data type. 40 * 41 * Valid data layouts: 42 * - All 43 * 44 * Valid data type configurations: 45 * |src |dst | 46 * |:--------------|:-----------------------------------------------| 47 * |QASYMM8_SIGNED | S16, S32, F32, F16 | 48 * |QASYMM8 | U16, S16, S32, F32, F16 | 49 * |U8 | U16, S16, S32, F32, F16 | 50 * |U16 | U8, U32 | 51 * |S16 | QASYMM8_SIGNED, U8, S32 | 52 * |F16 | QASYMM8_SIGNED, QASYMM8, F32, S32, U8 | 53 * |S32 | QASYMM8_SIGNED, QASYMM8, F16, F32, U8 | 54 * |F32 | QASYMM8_SIGNED, QASYMM8, BFLOAT16, F16, S32, U8| 55 * 56 * @param[in] src The source tensor to convert. Data types supported: U8/S8/U16/S16/U32/S32/F16/F32. 57 * @param[out] dst The destination tensor. Data types supported: U8/S8/U16/S16/U32/S32/F16/F32. 58 * @param[in] policy Conversion policy. 59 * 60 * @deprecated Support for BFLOAT16 will be removed in 23.05 release 61 * 62 */ 63 void configure(const ITensorInfo *src, ITensorInfo *dst, ConvertPolicy policy); 64 /** Static function to check if given info will lead to a valid configuration 65 * 66 * Similar to @ref CpuCast::configure() 67 * 68 * @return a status 69 */ 70 static Status validate(const ITensorInfo *src, const ITensorInfo *dst, ConvertPolicy policy); 71 }; 72 } // namespace cpu 73 } // namespace arm_compute 74 #endif /* ARM_COMPUTE_CPU_ACTIVATION_H */ 75