1 /* 2 * Copyright (c) 2019-2022 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef ARM_COMPUTE_CPU_DEPTHWISE_CONV2D_NATIVE_KERNEL_H 25 #define ARM_COMPUTE_CPU_DEPTHWISE_CONV2D_NATIVE_KERNEL_H 26 27 #include "arm_compute/core/utils/misc/Traits.h" 28 #include "src/core/common/Macros.h" 29 #include "src/cpu/ICpuKernel.h" 30 #include "support/Requires.h" 31 32 #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 33 #include <arm_neon.h> 34 #endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 35 36 namespace arm_compute 37 { 38 namespace cpu 39 { 40 namespace kernels 41 { 42 /** Interface for the kernel to run a depthwise convolution native on a tensor. */ 43 class CpuDepthwiseConv2dNativeKernel : public ICpuKernel<CpuDepthwiseConv2dNativeKernel> 44 { 45 private: 46 using DepthwiseConv2dNativeKernelPtr = 47 std::add_pointer<void(const ITensor *, const ITensor *, const ITensor *, ITensor *, const Window &, bool, const ConvolutionInfo &)>::type; 48 49 public: 50 CpuDepthwiseConv2dNativeKernel() = default; 51 ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuDepthwiseConv2dNativeKernel); 52 53 /** Initialize the function's source, destination and parameters. 54 * 55 * @note Supported data layouts: NHWC 56 * 57 * @param[in] src Source tensor. DataType supported: QASYMM8/QASYMM8_SIGNED/F16/F32. 58 * @param[in] weights Weights tensor. This is a 3D tensor with dimensions [IFM, W, H]. 59 * Data type supported: Same as @p src or QASYMM8/QASYMM8_SIGNED/QSYMM8_PER_CHANNEL when @p src is QASYMM8/QASYMM8_SIGNED. 60 * @param[in] biases Biases tensor. A 1D tensor with dimensions [IFM]. Must be nullptr if not needed. 61 * Data type supported: Same as @p src, S32 when src is QASYMM8/QASYMM8_SIGNED. 62 * @param[out] dst Destination tensor. Data type supported: Same as @p src. 63 * @param[in] info Depthwise convolution meta-data. 64 * 65 */ 66 void configure(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, ITensorInfo *dst, const ConvolutionInfo &info); 67 /** Static function to check if given info will lead to a valid configuration 68 * 69 * Similar to CpuDepthwiseConv2dNativeKernel::configure() 70 * 71 * @return a status 72 */ 73 static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const ConvolutionInfo &info); 74 75 // Inherited methods overridden: 76 void run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) override; 77 const char *name() const override; 78 struct DepthwiseConv2dNativeKernel 79 { 80 const char *name; 81 const DepthwiseConv2dNativeDataTypeISASelectorPtr is_selected; 82 DepthwiseConv2dNativeKernelPtr ukernel; 83 }; 84 static const std::vector<DepthwiseConv2dNativeKernel> &get_available_kernels(); 85 86 private: 87 /** Common signature for all the specialised depthwise convolution native functions 88 * 89 * @param[in] window Region on which to execute the kernel. 90 */ 91 DepthwiseConv2dNativeKernelPtr _func{ nullptr }; 92 ConvolutionInfo _conv_info{}; 93 bool _has_biases{ false }; 94 }; 95 } // namespace kernels 96 } // namespace cpu 97 } // namespace arm_compute 98 #endif /* ARM_COMPUTE_CPU_DEPTHWISE_CONV2D_NATIVE_KERNEL_H */ 99