1 /* 2 * Copyright (c) 2021 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef SRC_CPU_CPUTENSOR_H 25 #define SRC_CPU_CPUTENSOR_H 26 27 #include "src/common/ITensorV2.h" 28 29 #include "arm_compute/runtime/Tensor.h" 30 31 namespace arm_compute 32 { 33 namespace cpu 34 { 35 /** CPU tensor implementation class */ 36 class CpuTensor final : public ITensorV2 37 { 38 public: 39 /** Construct a new Cpu Tensor object 40 * 41 * @param[in] ctx Context to be used 42 * @param[in] desc Tensor descriptor 43 */ 44 CpuTensor(IContext *ctx, const AclTensorDescriptor &desc); 45 /** Allocates tensor 46 * 47 * @return StatusCode A status code 48 */ 49 StatusCode allocate(); 50 51 // Inherrited functions overriden 52 void *map() override; 53 StatusCode unmap() override; 54 arm_compute::ITensor *tensor() const override; 55 StatusCode import(void *handle, ImportMemoryType type) override; 56 57 private: 58 std::unique_ptr<Tensor> _legacy_tensor; 59 }; 60 } // namespace cpu 61 } // namespace arm_compute 62 63 #endif /* SRC_CPU_CPUTENSOR_H */