xref: /aosp_15_r20/external/ComputeLibrary/src/core/NEON/kernels/NERangeKernel.cpp (revision c217d954acce2dbc11938adb493fc0abd69584f3)
1 /*
2  * Copyright (c) 2018-2021 Arm Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in all
14  * copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  */
24 #include "src/core/NEON/kernels/NERangeKernel.h"
25 
26 #include "arm_compute/core/Error.h"
27 #include "arm_compute/core/Helpers.h"
28 #include "arm_compute/core/ITensor.h"
29 #include "arm_compute/core/TensorInfo.h"
30 #include "arm_compute/core/Validate.h"
31 #include "src/core/NEON/NEAsymm.h"
32 #include "src/core/NEON/wrapper/wrapper.h"
33 #include "src/core/common/Registrars.h"
34 #include "src/core/helpers/AutoConfiguration.h"
35 #include "src/core/helpers/WindowHelpers.h"
36 #include "src/cpu/kernels/range/list.h"
37 
38 namespace arm_compute
39 {
40 namespace
41 {
42 struct RangeSelectorData
43 {
44     DataType dt;
45 };
46 
47 using RangeSelectorPtr = std::add_pointer<bool(const RangeSelectorData &data)>::type;
48 using RangeUKernelPtr  = std::add_pointer<void(ITensor *, float, float, const Window &)>::type;
49 
50 struct RangeUKernel
51 {
52     const char            *name;
53     const RangeSelectorPtr is_selected;
54     RangeUKernelPtr        ukernel;
55 };
56 
57 static const RangeUKernel available_kernels[] =
58 {
59     {
60         "fp16_neon_range",
__anon0a5ea4cb0202() 61         [](const RangeSelectorData & data) { return data.dt == DataType::F16; },
62         REGISTER_FP16_NEON(arm_compute::cpu::fp16_neon_range_function)
63     },
64     {
65         "f32_neon_range",
__anon0a5ea4cb0302() 66         [](const RangeSelectorData & data) { return data.dt == DataType::F32; },
67         REGISTER_FP32_NEON(arm_compute::cpu::fp32_neon_range_function)
68     },
69     {
70         "u8_neon_range",
__anon0a5ea4cb0402() 71         [](const RangeSelectorData & data) { return data.dt == DataType::U8; },
72         REGISTER_INTEGER_NEON(arm_compute::cpu::u8_neon_range_function)
73     },
74     {
75         "u16_neon_range",
__anon0a5ea4cb0502() 76         [](const RangeSelectorData & data) { return data.dt == DataType::U16; },
77         REGISTER_INTEGER_NEON(arm_compute::cpu::u16_neon_range_function)
78     },
79     {
80         "u32_neon_range",
__anon0a5ea4cb0602() 81         [](const RangeSelectorData & data) { return data.dt == DataType::U32; },
82         REGISTER_INTEGER_NEON(arm_compute::cpu::u32_neon_range_function)
83     },
84     {
85         "s8_neon_range",
__anon0a5ea4cb0702() 86         [](const RangeSelectorData & data) { return data.dt == DataType::S8; },
87         REGISTER_INTEGER_NEON(arm_compute::cpu::s8_neon_range_function)
88     },
89     {
90         "s16_neon_range",
__anon0a5ea4cb0802() 91         [](const RangeSelectorData & data) { return data.dt == DataType::S16; },
92         REGISTER_INTEGER_NEON(arm_compute::cpu::s16_neon_range_function)
93     },
94     {
95         "s32_neon_range",
__anon0a5ea4cb0902() 96         [](const RangeSelectorData & data) { return data.dt == DataType::S32; },
97         REGISTER_INTEGER_NEON(arm_compute::cpu::s32_neon_range_function)
98     },
99 };
100 
101 /** Micro-kernel selector
102  *
103  * @param[in] data Selection data passed to help pick the appropriate micro-kernel
104  *
105  * @return A matching micro-kernel else nullptr
106  */
get_implementation(const RangeSelectorData & data)107 const RangeUKernel *get_implementation(const RangeSelectorData &data)
108 {
109     for(const auto &uk : available_kernels)
110     {
111         if(uk.is_selected(data))
112         {
113             return &uk;
114         }
115     }
116     return nullptr;
117 }
118 
validate_arguments(const ITensorInfo & output,const float start,const float end,const float step)119 Status validate_arguments(const ITensorInfo &output, const float start, const float end, const float step)
120 {
121     const auto *uk = get_implementation(RangeSelectorData{ output.data_type() });
122     ARM_COMPUTE_RETURN_ERROR_ON(uk == nullptr || uk->ukernel == nullptr);
123 
124     ARM_COMPUTE_RETURN_ERROR_ON_MSG((start == end), "start of the requested sequence must not be equal to the end");
125     ARM_COMPUTE_RETURN_ERROR_ON_MSG(((start < end) && (step <= 0)), "step must be greater than 0 when start < end");
126     ARM_COMPUTE_RETURN_ERROR_ON_MSG(((start > end) && (step >= 0)), "step must be less than 0 when start > end");
127 
128     ARM_COMPUTE_RETURN_ERROR_ON_MSG(!check_value_range(start, output.data_type(), output.quantization_info()), "start value is outside the range of the data type");
129     ARM_COMPUTE_RETURN_ERROR_ON_MSG(!check_value_range(end, output.data_type(), output.quantization_info()), "end value is outside the range of the data type");
130     ARM_COMPUTE_RETURN_ERROR_ON_MSG(!check_value_range(step, output.data_type(), output.quantization_info()), "step value is outside the range of the data type");
131 
132     ARM_COMPUTE_RETURN_ERROR_ON_MSG((start == end), "start of the requested sequence must not be equal to the end");
133 
134     ARM_COMPUTE_RETURN_ERROR_ON_MSG(output.num_dimensions() != 1, "Output has to be a 1-D tensor");
135     ARM_COMPUTE_RETURN_ERROR_ON_MSG(output.tensor_shape().total_size() < num_of_elements_in_range(start, end, step), "Output tensor size is incorrect");
136 
137     return Status{};
138 }
139 } // namespace
140 
NERangeKernel()141 NERangeKernel::NERangeKernel()
142     : _start(0), _end(1), _step(1), _output(nullptr)
143 {
144 }
145 
configure(ITensor * output,float start,float end,float step)146 void NERangeKernel::configure(ITensor *output, float start, float end, float step)
147 {
148     ARM_COMPUTE_ERROR_ON_NULLPTR(output);
149 
150     ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(*(output->info()), start, end, step));
151 
152     // Auto initialize output if not initialized
153     auto_init_if_empty(*output->info(), TensorShape(num_of_elements_in_range(start, end, step)), 1, output->info()->data_type(), output->info()->quantization_info());
154 
155     // Configure kernel window
156     Window win = calculate_max_window(*output->info(), Steps());
157 
158     _start  = start;
159     _end    = end;
160     _step   = step;
161     _output = output;
162 
163     INEKernel::configure(win);
164 }
165 
validate(const ITensorInfo * output,float start,float end,float step)166 Status NERangeKernel::validate(const ITensorInfo *output, float start, float end, float step)
167 {
168     ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(output);
169 
170     ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(*output, start, end, step));
171 
172     return Status{};
173 }
174 
run(const Window & window,const ThreadInfo & info)175 void NERangeKernel::run(const Window &window, const ThreadInfo &info)
176 {
177     ARM_COMPUTE_UNUSED(info);
178     ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
179     ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(INEKernel::window(), window);
180     const auto *uk = get_implementation(RangeSelectorData{ _output->info()->data_type() });
181 
182     uk->ukernel(_output, _start, _step, window);
183 }
184 } // namespace arm_compute
185