1 /* Copyright 2022 Advanced Micro Devices, Inc.
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a
4 * copy of this software and associated documentation files (the "Software"),
5 * to deal in the Software without restriction, including without limitation
6 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7 * and/or sell copies of the Software, and to permit persons to whom the
8 * Software is furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
19 * OTHER DEALINGS IN THE SOFTWARE.
20 *
21 * Authors: AMD
22 *
23 */
24
25 #include "vpe_assert.h"
26 #include "vpe10_command.h"
27 #include "vpe10_plane_desc_writer.h"
28 #include "reg_helper.h"
29
vpe10_construct_plane_desc_writer(struct plane_desc_writer * writer)30 void vpe10_construct_plane_desc_writer(struct plane_desc_writer *writer)
31 {
32 writer->init = vpe10_plane_desc_writer_init;
33 writer->add_source = vpe10_plane_desc_writer_add_source;
34 writer->add_destination = vpe10_plane_desc_writer_add_destination;
35 }
36
vpe10_plane_desc_writer_init(struct plane_desc_writer * writer,struct vpe_buf * buf,struct plane_desc_header * header)37 void vpe10_plane_desc_writer_init(
38 struct plane_desc_writer *writer, struct vpe_buf *buf, struct plane_desc_header *header)
39 {
40 uint32_t *cmd_space;
41 uint64_t size = 4;
42 writer->status = VPE_STATUS_OK;
43 writer->base_cpu_va = buf->cpu_va;
44 writer->base_gpu_va = buf->gpu_va;
45 writer->buf = buf;
46 writer->num_src = 0;
47 writer->num_dst = 0;
48
49 /* Buffer does not have enough space to write */
50 if (buf->size < size) {
51 writer->status = VPE_STATUS_BUFFER_OVERFLOW;
52 return;
53 }
54
55 cmd_space = (uint32_t *)(uintptr_t)writer->buf->cpu_va;
56 *cmd_space++ = VPE_PLANE_CFG_CMD_HEADER(
57 header->subop, header->nps0, header->npd0, header->nps1, header->npd1);
58
59 writer->buf->cpu_va += size;
60 writer->buf->gpu_va += size;
61 writer->buf->size -= size;
62 }
63
64 /** fill the value to the embedded buffer. */
vpe10_plane_desc_writer_add_source(struct plane_desc_writer * writer,struct plane_desc_src * src,bool is_plane0)65 void vpe10_plane_desc_writer_add_source(
66 struct plane_desc_writer *writer, struct plane_desc_src *src, bool is_plane0)
67 {
68 uint32_t *cmd_space, *cmd_start;
69 uint32_t num_wd = is_plane0 ? 6 : 5;
70 uint64_t size = num_wd * sizeof(uint32_t);
71
72 if (writer->status != VPE_STATUS_OK)
73 return;
74
75 /* Buffer does not have enough space to write */
76 if (writer->buf->size < size) {
77 writer->status = VPE_STATUS_BUFFER_OVERFLOW;
78 return;
79 }
80 cmd_start = cmd_space = (uint32_t *)(uintptr_t)writer->buf->cpu_va;
81
82 if (is_plane0) {
83 *cmd_space++ = VPEC_FIELD_VALUE(VPE_PLANE_CFG_TMZ, src->tmz) |
84 VPEC_FIELD_VALUE(VPE_PLANE_CFG_SWIZZLE_MODE, src->swizzle) |
85 VPEC_FIELD_VALUE(VPE_PLANE_CFG_ROTATION, src->rotation);
86 writer->num_src++;
87 }
88
89 VPE_ASSERT(!(src->base_addr_lo & 0xFF));
90
91 *cmd_space++ = src->base_addr_lo;
92 *cmd_space++ = src->base_addr_hi;
93
94 *cmd_space++ =
95 VPEC_FIELD_VALUE(VPE_PLANE_CFG_PITCH, src->pitch - 1); // 1-based number of element
96 *cmd_space++ = VPEC_FIELD_VALUE(VPE_PLANE_CFG_VIEWPORT_X, src->viewport_x) |
97 VPEC_FIELD_VALUE(VPE_PLANE_CFG_VIEWPORT_Y, src->viewport_y);
98
99 *cmd_space++ = VPEC_FIELD_VALUE(VPE_PLANE_CFG_VIEWPORT_WIDTH, src->viewport_w - 1) |
100 VPEC_FIELD_VALUE(VPE_PLANE_CFG_VIEWPORT_HEIGHT, src->viewport_h - 1) |
101 VPEC_FIELD_VALUE(VPE_PLANE_CFG_VIEWPORT_ELEMENT_SIZE, src->elem_size);
102
103 writer->buf->cpu_va += size;
104 writer->buf->gpu_va += size;
105 writer->buf->size -= size;
106 }
107
108 /** fill the value to the embedded buffer. */
vpe10_plane_desc_writer_add_destination(struct plane_desc_writer * writer,struct plane_desc_dst * dst,bool is_plane0)109 void vpe10_plane_desc_writer_add_destination(
110 struct plane_desc_writer *writer, struct plane_desc_dst *dst, bool is_plane0)
111 {
112 uint32_t *cmd_space, *cmd_start;
113 uint32_t num_wd = is_plane0 ? 6 : 5;
114 uint64_t size = num_wd * sizeof(uint32_t);
115
116 if (writer->status != VPE_STATUS_OK)
117 return;
118
119 /* Buffer does not have enough space to write */
120 if (writer->buf->size < size) {
121 writer->status = VPE_STATUS_BUFFER_OVERFLOW;
122 return;
123 }
124
125 cmd_start = cmd_space = (uint32_t *)(uintptr_t)writer->buf->cpu_va;
126
127 if (is_plane0) {
128 *cmd_space++ = VPEC_FIELD_VALUE(VPE_PLANE_CFG_TMZ, dst->tmz) |
129 VPEC_FIELD_VALUE(VPE_PLANE_CFG_SWIZZLE_MODE, dst->swizzle) |
130 VPEC_FIELD_VALUE(VPE_PLANE_CFG_MIRROR, dst->mirror);
131 writer->num_dst++;
132 }
133
134 VPE_ASSERT(!(dst->base_addr_lo & 0xFF));
135
136 *cmd_space++ = dst->base_addr_lo;
137 *cmd_space++ = dst->base_addr_hi;
138
139 *cmd_space++ =
140 VPEC_FIELD_VALUE(VPE_PLANE_CFG_PITCH, dst->pitch - 1); // 1-based number of element
141 *cmd_space++ = VPEC_FIELD_VALUE(VPE_PLANE_CFG_VIEWPORT_X, dst->viewport_x) |
142 VPEC_FIELD_VALUE(VPE_PLANE_CFG_VIEWPORT_Y, dst->viewport_y);
143
144 *cmd_space++ = VPEC_FIELD_VALUE(VPE_PLANE_CFG_VIEWPORT_WIDTH, dst->viewport_w - 1) |
145 VPEC_FIELD_VALUE(VPE_PLANE_CFG_VIEWPORT_HEIGHT, dst->viewport_h - 1) |
146 VPEC_FIELD_VALUE(VPE_PLANE_CFG_VIEWPORT_ELEMENT_SIZE, dst->elem_size);
147
148 writer->buf->cpu_va += size;
149 writer->buf->gpu_va += size;
150 writer->buf->size -= size;
151 }
152