1 use core::num::NonZeroUsize;
2 use gdbstub::arch::RegId;
3 
4 /// 32-bit ARM core register identifier.
5 #[derive(Debug, Clone, Copy)]
6 #[non_exhaustive]
7 pub enum ArmCoreRegId {
8     /// General purpose registers (R0-R12)
9     Gpr(u8),
10     /// Stack Pointer (R13)
11     Sp,
12     /// Link Register (R14)
13     Lr,
14     /// Program Counter (R15)
15     Pc,
16     /// Floating point registers (F0-F7)
17     Fpr(u8),
18     /// Floating point status
19     Fps,
20     /// Current Program Status Register (cpsr)
21     Cpsr,
22 }
23 
24 impl RegId for ArmCoreRegId {
from_raw_id(id: usize) -> Option<(Self, Option<NonZeroUsize>)>25     fn from_raw_id(id: usize) -> Option<(Self, Option<NonZeroUsize>)> {
26         let reg = match id {
27             0..=12 => Self::Gpr(id as u8),
28             13 => Self::Sp,
29             14 => Self::Lr,
30             15 => Self::Pc,
31             16..=23 => Self::Fpr((id as u8) - 16),
32             24 => Self::Fps,
33             25 => Self::Cpsr,
34             _ => return None,
35         };
36         Some((reg, Some(NonZeroUsize::new(4)?)))
37     }
38 }
39