1 /*
2 * Copyright © 2018, VideoLAN and dav1d authors
3 * Copyright © 2019, Martin Storsjo
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice, this
10 * list of conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice,
13 * this list of conditions and the following disclaimer in the documentation
14 * and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #include "src/cpu.h"
29 #include "src/itx.h"
30
31 decl_itx17_fns( 4, 4, neon);
32 decl_itx16_fns( 4, 8, neon);
33 decl_itx16_fns( 4, 16, neon);
34 decl_itx16_fns( 8, 4, neon);
35 decl_itx16_fns( 8, 8, neon);
36 decl_itx16_fns( 8, 16, neon);
37 decl_itx2_fns ( 8, 32, neon);
38 decl_itx16_fns(16, 4, neon);
39 decl_itx16_fns(16, 8, neon);
40 decl_itx12_fns(16, 16, neon);
41 decl_itx2_fns (16, 32, neon);
42 decl_itx2_fns (32, 8, neon);
43 decl_itx2_fns (32, 16, neon);
44 decl_itx2_fns (32, 32, neon);
45
46 decl_itx_fn(BF(dav1d_inv_txfm_add_dct_dct_16x64, neon));
47 decl_itx_fn(BF(dav1d_inv_txfm_add_dct_dct_32x64, neon));
48 decl_itx_fn(BF(dav1d_inv_txfm_add_dct_dct_64x16, neon));
49 decl_itx_fn(BF(dav1d_inv_txfm_add_dct_dct_64x32, neon));
50 decl_itx_fn(BF(dav1d_inv_txfm_add_dct_dct_64x64, neon));
51
itx_dsp_init_arm(Dav1dInvTxfmDSPContext * const c,int bpc,int * const all_simd)52 static ALWAYS_INLINE void itx_dsp_init_arm(Dav1dInvTxfmDSPContext *const c, int bpc,
53 int *const all_simd)
54 {
55 const unsigned flags = dav1d_get_cpu_flags();
56
57 if (!(flags & DAV1D_ARM_CPU_FLAG_NEON)) return;
58
59 assign_itx_fn( , 4, 4, wht_wht, WHT_WHT, neon);
60
61 if (BITDEPTH == 16 && bpc != 10) return;
62
63 assign_itx16_fn( , 4, 4, neon);
64 assign_itx16_fn(R, 4, 8, neon);
65 assign_itx16_fn(R, 4, 16, neon);
66 assign_itx16_fn(R, 8, 4, neon);
67 assign_itx16_fn( , 8, 8, neon);
68 assign_itx16_fn(R, 8, 16, neon);
69 assign_itx2_fn (R, 8, 32, neon);
70 assign_itx16_fn(R, 16, 4, neon);
71 assign_itx16_fn(R, 16, 8, neon);
72 assign_itx12_fn( , 16, 16, neon);
73 assign_itx2_fn (R, 16, 32, neon);
74 assign_itx1_fn (R, 16, 64, neon);
75 assign_itx2_fn (R, 32, 8, neon);
76 assign_itx2_fn (R, 32, 16, neon);
77 assign_itx2_fn ( , 32, 32, neon);
78 assign_itx1_fn (R, 32, 64, neon);
79 assign_itx1_fn (R, 64, 16, neon);
80 assign_itx1_fn (R, 64, 32, neon);
81 assign_itx1_fn ( , 64, 64, neon);
82 *all_simd = 1;
83 }
84