xref: /nrf52832-nimble/rt-thread/components/drivers/spi/spi_msd.h (revision 104654410c56c573564690304ae786df310c91fc)
1 /*
2  * Copyright (c) 2006-2018, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2009-04-17     Bernard      first version.
9  */
10 
11 #ifndef SPI_MSD_H_INCLUDED
12 #define SPI_MSD_H_INCLUDED
13 
14 #include <stdint.h>
15 #include <drivers/spi.h>
16 
17 /* SD command (SPI mode) */
18 #define GO_IDLE_STATE                       0   /* CMD0  R1  */
19 #define SEND_OP_COND                        1   /* CMD1  R1  */
20 #define SWITCH_FUNC                         6   /* CMD6  R1  */
21 #define SEND_IF_COND                        8   /* CMD8  R7  */
22 #define SEND_CSD                            9   /* CMD9  R1  */
23 #define SEND_CID                            10  /* CMD10 R1  */
24 #define STOP_TRANSMISSION                   12  /* CMD12 R1B */
25 #define SEND_STATUS                         13  /* CMD13 R2  */
26 #define SET_BLOCKLEN                        16  /* CMD16 R1  */
27 #define READ_SINGLE_BLOCK                   17  /* CMD17 R1  */
28 #define READ_MULTIPLE_BLOCK                 18  /* CMD18 R1  */
29 #define WRITE_BLOCK                         24  /* CMD24 R1  */
30 #define WRITE_MULTIPLE_BLOCK                25  /* CMD25 R1  */
31 #define PROGRAM_CSD                         27  /* CMD27 R1  */
32 #define SET_WRITE_PROT                      28  /* CMD28 R1B */
33 #define CLR_WRITE_PROT                      29  /* CMD29 R1B */
34 #define SEND_WRITE_PROT                     30  /* CMD30 R1  */
35 #define ERASE_WR_BLK_START_ADDR             32  /* CMD32 R1  */
36 #define ERASE_WR_BLK_END_ADDR               33  /* CMD33 R1  */
37 #define ERASE                               38  /* CMD38 R1B */
38 #define LOCK_UNLOCK                         42  /* CMD42 R1  */
39 #define APP_CMD                             55  /* CMD55 R1  */
40 #define GEN_CMD                             56  /* CMD56 R1  */
41 #define READ_OCR                            58  /* CMD58 R3  */
42 #define CRC_ON_OFF                          59  /* CMD59 R1  */
43 
44 /* Application-Specific Command */
45 #define SD_STATUS                           13  /* ACMD13 R2 */
46 #define SEND_NUM_WR_BLOCKS                  22  /* ACMD22 R1 */
47 #define SET_WR_BLK_ERASE_COUNT              23  /* ACMD23 R1 */
48 #define SD_SEND_OP_COND                     41  /* ACMD41 R1 */
49 #define SET_CLR_CARD_DETECT                 42  /* ACMD42 R1 */
50 #define SEND_SCR                            51  /* ACMD51 R1 */
51 
52 /* Start Data tokens  */
53 /* Tokens (necessary because at nop/idle (and CS active) only 0xff is on the data/command line) */
54 #define MSD_TOKEN_READ_START                0xFE  /* Data token start byte, Start Single Block Read */
55 #define MSD_TOKEN_WRITE_SINGLE_START        0xFE  /* Data token start byte, Start Single Block Write */
56 
57 #define MSD_TOKEN_WRITE_MULTIPLE_START      0xFC  /* Data token start byte, Start Multiple Block Write */
58 #define MSD_TOKEN_WRITE_MULTIPLE_STOP       0xFD  /* Data toke stop byte, Stop Multiple Block Write */
59 
60 /* MSD reponses and error flags */
61 #define MSD_RESPONSE_NO_ERROR               0x00
62 #define MSD_IN_IDLE_STATE                   0x01
63 #define MSD_ERASE_RESET                     0x02
64 #define MSD_ILLEGAL_COMMAND                 0x04
65 #define MSD_COM_CRC_ERROR                   0x08
66 #define MSD_ERASE_SEQUENCE_ERROR            0x10
67 #define MSD_ADDRESS_ERROR                   0x20
68 #define MSD_PARAMETER_ERROR                 0x40
69 #define MSD_RESPONSE_FAILURE                0xFF
70 
71 /* Data response error */
72 #define MSD_DATA_OK                         0x05
73 #define MSD_DATA_CRC_ERROR                  0x0B
74 #define MSD_DATA_WRITE_ERROR                0x0D
75 #define MSD_DATA_OTHER_ERROR                0xFF
76 #define MSD_DATA_RESPONSE_MASK              0x1F
77 #define MSD_GET_DATA_RESPONSE(res)          (res & MSD_DATA_RESPONSE_MASK)
78 
79 #define MSD_CMD_LEN                         6           /**< command, arg and crc. */
80 #define MSD_RESPONSE_MAX_LEN                5           /**< response max len  */
81 #define MSD_CSD_LEN                         16          /**< SD crad CSD register len */
82 #define SECTOR_SIZE                         512         /**< sector size, default 512byte */
83 
84 /* card try timeout, unit: ms */
85 #define CARD_TRY_TIMES                      3000
86 #define CARD_TRY_TIMES_ACMD41               800
87 #define CARD_WAIT_TOKEN_TIMES               800
88 
89 #define MSD_USE_PRE_ERASED                              /**< id define MSD_USE_PRE_ERASED, before CMD25, send ACMD23 */
90 
91 /**
92  * SD/MMC card type
93  */
94 typedef enum
95 {
96 	MSD_CARD_TYPE_UNKNOWN = 0,                      /**< unknown */
97 	MSD_CARD_TYPE_MMC,                              /**< MultiMedia Card */
98 	MSD_CARD_TYPE_SD_V1_X,                          /**< Ver 1.X  Standard Capacity SD Memory Card */
99 	MSD_CARD_TYPE_SD_V2_X,                          /**< Ver 2.00 or later Standard Capacity SD Memory Card */
100 	MSD_CARD_TYPE_SD_SDHC,                          /**< High Capacity SD Memory Card */
101 	MSD_CARD_TYPE_SD_SDXC,                          /**< later Extended Capacity SD Memory Card */
102 }msd_card_type;
103 
104 typedef enum
105 {
106     response_type_unknown = 0,
107     response_r1,
108     response_r1b,
109     response_r2,
110     response_r3,
111     response_r4,
112     response_r5,
113     response_r7,
114 }response_type;
115 
116 struct msd_device
117 {
118     struct rt_device                parent;      /**< RT-Thread device struct */
119     struct rt_device_blk_geometry   geometry;    /**< sector size, sector count */
120     struct rt_spi_device *          spi_device;  /**< SPI interface */
121     msd_card_type                   card_type;   /**< card type: MMC SD1.x SD2.0 SDHC SDXC */
122     uint32_t                        max_clock;   /**< MAX SPI clock */
123 };
124 
125 extern rt_err_t msd_init(const char * sd_device_name, const char * spi_device_name);
126 
127 #endif // SPI_MSD_H_INCLUDED
128