xref: /aosp_15_r20/external/coreboot/src/soc/intel/apollolake/include/soc/heci.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #ifndef _SOC_APOLLOLAKE_HECI_H_
4 #define _SOC_APOLLOLAKE_HECI_H_
5 
6 #include <stdint.h>
7 
8 enum sec_status {
9 	SEC_STATE_RESET = 0,
10 	SEC_STATE_INIT,
11 	SEC_STATE_RECOVERY,
12 	SEC_STATE_UNKNOWN0,
13 	SEC_STATE_UNKNOWN1,
14 	SEC_STATE_NORMAL,
15 	SEC_STATE_DISABLE_WAIT,
16 	SEC_STATE_TRANSITION,
17 	SEC_STATE_INVALID_CPU
18 };
19 
20 #define REG_SEC_FW_STS0					0x40
21 #define MASK_SEC_FIRMWARE_COMPLETE			(1 << 9)
22 #define MASK_SEC_STATUS					0xf
23 
24 /* Read Firmware Status register */
25 uint32_t heci_fw_sts(void);
26 /* Returns true if CSE is in normal status */
27 bool heci_cse_normal(void);
28 /* Returns true if CSE is done with whatever it was doing */
29 bool heci_cse_done(void);
30 
31 /* Dump CSE state and lockdown HECI1 interface using P2SB message. */
32 void heci_cse_lockdown(void);
33 
34 #endif
35