1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef _SOC_DISPLAY_MIPI_DSI_H_ 4 #define _SOC_DISPLAY_MIPI_DSI_H_ 5 6 /********************************************************** 7 DSI register configuration options 8 **********************************************************/ 9 #define MIPI_DSI_MRPS 0x04 /* Maximum Return Packet Size */ 10 #define MIPI_DSI_REG_LEN 16 /* 4 x 4 bytes register */ 11 12 #define DSI_VIDEO_DST_FORMAT_RGB565 0 13 #define DSI_VIDEO_DST_FORMAT_RGB666 1 14 #define DSI_VIDEO_DST_FORMAT_RGB666_LOOSE 2 15 #define DSI_VIDEO_DST_FORMAT_RGB888 3 16 17 enum { 18 DSI_VIDEO_MODE, 19 DSI_CMD_MODE, 20 }; 21 22 enum cb_err mdss_dsi_config(struct edid *edid, uint32_t num_of_lanes, uint32_t bpp); 23 void mdss_dsi_clock_config(void); 24 void mdss_dsi_video_mode_config(struct edid *edid, uint32_t bpp); 25 enum cb_err mdss_dsi_panel_initialize(const u8 *init_cmds); 26 27 #endif 28