xref: /aosp_15_r20/external/coreboot/src/soc/mediatek/mt8173/include/soc/da9212.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef __SOC_DA9212_H_
4 #define __SOC_DA9212_H_
5 
6 #include <stdint.h>
7 
8 void da9212_probe(uint8_t i2c_num);
9 
10 enum {
11 	/* Page selection */
12 	DA9212_REG_PAGE_CON = 0x0,
13 
14 	/* Regulator Registers */
15 	DA9212_REG_BUCKA_CONT = 0x5D,
16 	DA9212_REG_BUCKB_CONT = 0x5E,
17 	DA9212_REG_BUCKA_CONF = 0xD1,
18 	DA9212_REG_BUCKB_CONF = 0xD2,
19 };
20 
21 /* DA9212_REG_PAGE_CON (addr=0x0) */
22 enum {
23 	DA9212_REG_PAGE_SHIFT = 0,
24 	DA9212_REG_PAGE_MASK = 0xf
25 };
26 
27 enum {
28 	DA9212_REG_PAGE0 = 0,
29 	DA9212_REG_PAGE2 = 2,
30 	DA9212_REG_PAGE4 = 4,
31 	DA9212_PAGE_WRITE_MODE = 0x0,
32 	DA9212_REPEAT_WRITE_MODE = 0x40,
33 	DA9212_PAGE_REVERT = 0x80
34 };
35 
36 /* DA9212_REG_BUCKA/B_CONT (addr=0x5D/0x5E) */
37 enum {
38 	DA9212_BUCK_EN_SHIFT = 0,
39 	DA9212_BUCK_OFF = 0x0,
40 	DA9212_BUCK_ON = 0x1,
41 	DA9212_BUCK_GPI_SHIFT = 1,
42 	DA9212_BUCK_GPI_MASK = 0x3,
43 	DA9212_BUCK_GPI_OFF = 0x0,
44 	DA9212_BUCK_GPI_GPIO0 = 0x1,
45 	DA9212_BUCK_GPI_GPIO1 = 0x2,
46 	DA9212_BUCK_GPI_GPIO4 = 0x3,
47 	DA9212_VBUCK_SEL_SHIFT = 4,
48 	DA9212_VBUCK_SEL_MASK = 0x1,
49 	DA9212_VBUCK_SEL_A = 0x0,
50 	DA9212_VBUCK_SEL_B = 0x1,
51 };
52 
53 /* DA9212_REG_BUCKA/B_CONF (addr=0xD1/0xD2) */
54 enum {
55 	DA9212_BUCK_MODE_SHIFT = 0,
56 	DA9212_BUCK_MODE_MASK = 0x3,
57 	DA9212_BUCK_MODE_MANUAL = 0x0,
58 	DA9212_BUCK_MODE_PFM = 0x1,
59 	DA9212_BUCK_MODE_PWM = 0x2,
60 	DA9212_BUCK_MODE_AUTO = 0x3,
61 };
62 
63 /* DA9212_REG_CONFIG_E (addr=0x147) */
64 enum {
65 	/* DEVICE IDs */
66 	DA9212_REG_DEVICE_ID = 0x1,
67 	DA9212_ID	     = 0x22,
68 	DA9213_ID	     = 0x23,
69 	DA9212_REG_VARIANT_ID = 0x2,
70 	DA9212_VARIANT_ID_AB  = 0x10,
71 	DA9212_VARIANT_ID_AC  = 0x20
72 };
73 
74 #endif
75