xref: /aosp_15_r20/external/coreboot/src/soc/amd/common/block/smn/smn.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c) 
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <amdblocks/smn.h>
4 #include <device/pci_ops.h>
5 #include <soc/pci_devs.h>
6 #include <types.h>
7 
8 /* SMN registers accessed indirectly using an index/data pair in D0F00 config space */
9 #define SMN_INDEX_ADDR		0xb8 /* 32 bit */
10 #define SMN_DATA_ADDR		0xbc /* 32 bit */
11 
smn_read32(uint32_t reg)12 uint32_t smn_read32(uint32_t reg)
13 {
14 	pci_write_config32(SOC_GNB_DEV, SMN_INDEX_ADDR, reg);
15 	return pci_read_config32(SOC_GNB_DEV, SMN_DATA_ADDR);
16 }
17 
smn_read64(uint32_t reg)18 uint64_t smn_read64(uint32_t reg)
19 {
20 	return smn_read32(reg) | (uint64_t)smn_read32(reg + 4) << 32;
21 }
22 
smn_write32(uint32_t reg,uint32_t val)23 void smn_write32(uint32_t reg, uint32_t val)
24 {
25 	pci_write_config32(SOC_GNB_DEV, SMN_INDEX_ADDR, reg);
26 	pci_write_config32(SOC_GNB_DEV, SMN_DATA_ADDR, val);
27 }
28