1 /*
2  * Copyright (c) 2022 Arm Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22  * IN THE SOFTWARE.
23  */
24 
25 #pragma once
26 
27 #ifdef __ARM_FEATURE_SVE
28 
29 
30 namespace {
31 
sme_transpose_interleave_16VL_1x4(uint8_t * out,const uint8_t * in,size_t width,size_t in_stride,size_t height)32 void sme_transpose_interleave_16VL_1x4(uint8_t *out, const uint8_t *in, size_t width, size_t in_stride, size_t height)
33 {
34     uint8_t *pad_row = reinterpret_cast<uint8_t *>(alloca(width * sizeof(uint8_t)));
35 
36     if (height % 4) {
37         memset(pad_row, 0, width * sizeof(uint8_t));
38     }
39 
40     size_t out_stride = 16 * roundup<size_t>(height, 4) * sme::get_vector_length<uint32_t>();
41 
42     __asm__ __volatile__(
43       ".inst 0xd503477f  // SMSTART ZA\n"
44       "ptrue p4.b\n"
45       "1:"  // Main row loop: Head
46       "mov x25, %x[in]\n"
47       "add x24, x25, %x[in_stride]\n"
48       "add x23, x24, %x[in_stride]\n"
49       "add x22, x23, %x[in_stride]\n"
50       "cmp %x[height], #0x3\n"
51       "add %x[in], x22, %x[in_stride]\n"
52       "csel x22, x22, %x[pad_row], GT\n"
53       "csel x23, x23, %x[pad_row], GE\n"
54       "cmp %x[height], #0x1\n"
55       "mov x21, %x[out]\n"
56       "csel x24, x24, %x[pad_row], GT\n"
57       "sub %x[height], %x[height], #0x4\n"
58       "mov x20, %x[width]\n"
59       "2:"  // Main row loop: Column loop
60       "mov x19, x20\n"
61       "whilelt p3.b, XZR, x19\n"
62       "ld1b { z20.b }, p3/Z, [x25]\n"
63       "decb x19\n"
64       "whilelt p2.b, XZR, x19\n"
65       "ld1b { z18.b }, p2/Z, [x25, #1, MUL VL]\n"
66       "decb x19\n"
67       "whilelt p1.b, XZR, x19\n"
68       "ld1b { z17.b }, p3/Z, [x24]\n"
69       "decb x19\n"
70       "whilelt p0.b, XZR, x19\n"
71       "ld1b { z19.b }, p2/Z, [x24, #1, MUL VL]\n"
72       "ld1b { z16.b }, p3/Z, [x23]\n"
73       "zip1 z25.b, z20.b, z16.b\n"
74       "zip2 z24.b, z20.b, z16.b\n"
75       "mov x19, x21\n"
76       "ld1b { z16.b }, p2/Z, [x23, #1, MUL VL]\n"
77       "zip1 z22.b, z18.b, z16.b\n"
78       "zip2 z21.b, z18.b, z16.b\n"
79       "decw x20, ALL, MUL #16\n"
80       "ld1b { z16.b }, p3/Z, [x22]\n"
81       "zip1 z18.b, z17.b, z16.b\n"
82       "zip2 z17.b, z17.b, z16.b\n"
83       "cmp x20, #0x0\n"
84       "ld1b { z16.b }, p2/Z, [x22, #1, MUL VL]\n"
85       "zip1 z20.b, z19.b, z16.b\n"
86       "zip2 z16.b, z19.b, z16.b\n"
87       "add x21, x21, %x[out_stride]\n"
88       "ld1b { z19.b }, p1/Z, [x25, #2, MUL VL]\n"
89       "zip1 z23.b, z25.b, z18.b\n"
90       "zip2 z0.b, z25.b, z18.b\n"
91       "ld1b { z18.b }, p0/Z, [x25, #3, MUL VL]\n"
92       "zip1 z31.b, z24.b, z17.b\n"
93       "zip2 z30.b, z24.b, z17.b\n"
94       "addvl x25, x25, #4\n"
95       "ld1b { z17.b }, p1/Z, [x24, #2, MUL VL]\n"
96       "zip1 z29.b, z22.b, z20.b\n"
97       "zip2 z28.b, z22.b, z20.b\n"
98       "ld1b { z22.b }, p0/Z, [x24, #3, MUL VL]\n"
99       "zip1 z27.b, z21.b, z16.b\n"
100       "zip2 z26.b, z21.b, z16.b\n"
101       "addvl x24, x24, #4\n"
102       "ld1b { z16.b }, p1/Z, [x23, #2, MUL VL]\n"
103       "zip1 z21.b, z19.b, z16.b\n"
104       "zip2 z20.b, z19.b, z16.b\n"
105       "ld1b { z16.b }, p0/Z, [x23, #3, MUL VL]\n"
106       "zip1 z25.b, z18.b, z16.b\n"
107       "zip2 z24.b, z18.b, z16.b\n"
108       "addvl x23, x23, #4\n"
109       "ld1b { z16.b }, p1/Z, [x22, #2, MUL VL]\n"
110       "zip1 z19.b, z17.b, z16.b\n"
111       "zip2 z18.b, z17.b, z16.b\n"
112       "ld1b { z16.b }, p0/Z, [x22, #3, MUL VL]\n"
113       "zip1 z17.b, z22.b, z16.b\n"
114       "zip2 z16.b, z22.b, z16.b\n"
115       "addvl x22, x22, #4\n"
116       "st1b { z23.b }, p4, [x19]\n"
117       "zip1 z23.b, z21.b, z19.b\n"
118       "zip2 z22.b, z21.b, z19.b\n"
119       "st1b { z0.b }, p4, [x19, #1, MUL VL]\n"
120       "zip1 z21.b, z20.b, z18.b\n"
121       "zip2 z20.b, z20.b, z18.b\n"
122       "st1b { z31.b }, p4, [x19, #2, MUL VL]\n"
123       "zip1 z19.b, z25.b, z17.b\n"
124       "zip2 z18.b, z25.b, z17.b\n"
125       "st1b { z30.b }, p4, [x19, #3, MUL VL]\n"
126       "zip1 z17.b, z24.b, z16.b\n"
127       "zip2 z16.b, z24.b, z16.b\n"
128       "st1b { z29.b }, p4, [x19, #4, MUL VL]\n"
129       "st1b { z28.b }, p4, [x19, #5, MUL VL]\n"
130       "st1b { z27.b }, p4, [x19, #6, MUL VL]\n"
131       "st1b { z26.b }, p4, [x19, #7, MUL VL]\n"
132       "addvl x19, x19, #16\n"
133       "st1b { z23.b }, p4, [x19, #-8, MUL VL]\n"
134       "st1b { z22.b }, p4, [x19, #-7, MUL VL]\n"
135       "st1b { z21.b }, p4, [x19, #-6, MUL VL]\n"
136       "st1b { z20.b }, p4, [x19, #-5, MUL VL]\n"
137       "st1b { z19.b }, p4, [x19, #-4, MUL VL]\n"
138       "st1b { z18.b }, p4, [x19, #-3, MUL VL]\n"
139       "st1b { z17.b }, p4, [x19, #-2, MUL VL]\n"
140       "st1b { z16.b }, p4, [x19, #-1, MUL VL]\n"
141       "bgt 2b\n"
142       "3:"  // Main row loop: Column loop skip
143       "cmp %x[height], #0x1\n"
144       "addvl %x[out], %x[out], #16\n"
145       "bge 1b\n"
146       ".inst 0xd503467f  // SMSTOP\n"
147       : [height] "+&r" (height), [in] "+&r" (in), [out] "+&r" (out)
148       : [in_stride] "r" (in_stride), [out_stride] "r" (out_stride), [pad_row] "r" (pad_row), [width] "r" (width)
149       : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
150     );
151 }
152 
153 } // anonymous namespace
154 
155 template<>
Transform(uint8_t * out,const uint8_t * in,int stride,int x0,int xmax,int k0,int kmax)156 void Transform<16, 4, true, VLType::SME>(
157     uint8_t *out, const uint8_t *in, int stride, int x0, int xmax, int k0, int kmax)
158 {
159     sme_transpose_interleave_16VL_1x4(
160         reinterpret_cast<uint8_t *>(out),
161         reinterpret_cast<const uint8_t *>(in + k0 * stride + x0),
162         (xmax-x0) * sizeof(uint8_t) / 1,
163         stride * sizeof(uint8_t),
164         (kmax-k0)
165     );
166 }
167 
168 template<>
Transform(int8_t * out,const int8_t * in,int stride,int x0,int xmax,int k0,int kmax)169 void Transform<16, 4, true, VLType::SME>(
170     int8_t *out, const int8_t *in, int stride, int x0, int xmax, int k0, int kmax)
171 {
172     sme_transpose_interleave_16VL_1x4(
173         reinterpret_cast<uint8_t *>(out),
174         reinterpret_cast<const uint8_t *>(in + k0 * stride + x0),
175         (xmax-x0) * sizeof(int8_t) / 1,
176         stride * sizeof(int8_t),
177         (kmax-k0)
178     );
179 }
180 
181 #endif // __ARM_FEATURE_SVE
182