xref: /aosp_15_r20/external/mesa3d/src/gallium/drivers/r600/sfn/sfn_shader_cs.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /* -*- mesa-c++  -*-
2  * Copyright 2022 Collabora LTD
3  * Author: Gert Wollny <[email protected]>
4  * SPDX-License-Identifier: MIT
5  */
6 
7 #ifndef COMPUTE_H
8 #define COMPUTE_H
9 
10 #include "sfn_shader.h"
11 
12 namespace r600 {
13 
14 class ComputeShader : public Shader {
15 public:
16    ComputeShader(const r600_shader_key& key, int num_samplers);
17 
image_size_const_offset()18    unsigned image_size_const_offset() override { return m_image_size_const_offset;}
19 
20 private:
21    bool do_scan_instruction(nir_instr *instr) override;
22    int do_allocate_reserved_registers() override;
23 
24    bool process_stage_intrinsic(nir_intrinsic_instr *intr) override;
25    void do_get_shader_info(r600_shader *sh_info) override;
26 
load_input(UNUSED nir_intrinsic_instr * intr)27    bool load_input(UNUSED nir_intrinsic_instr *intr) override
28    {
29       unreachable("compute shaders  have bno inputs");
30    };
store_output(UNUSED nir_intrinsic_instr * intr)31    bool store_output(UNUSED nir_intrinsic_instr *intr) override
32    {
33       unreachable("compute shaders have no outputs");
34    };
35 
36    bool read_prop(std::istream& is) override;
37    void do_print_properties(std::ostream& os) const override;
38 
39    bool emit_load_from_info_buffer(nir_intrinsic_instr *instr, int offset);
40    bool emit_load_3vec(nir_intrinsic_instr *instr, const std::array<PRegister, 3>& src);
41 
42    std::array<PRegister, 3> m_workgroup_id{nullptr};
43    std::array<PRegister, 3> m_local_invocation_id{nullptr};
44 
45    PRegister m_zero_register{0};
46    int m_image_size_const_offset{0};
47 };
48 
49 } // namespace r600
50 
51 #endif // COMPUTE_H
52