xref: /aosp_15_r20/external/coreboot/src/arch/riscv/include/sbi.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef RISCV_SBI_H
4 #define RISCV_SBI_H
5 
6 #define SBI_SET_TIMER              0
7 #define SBI_CONSOLE_PUTCHAR        1
8 #define SBI_CONSOLE_GETCHAR        2
9 #define SBI_CLEAR_IPI              3
10 #define SBI_SEND_IPI               4
11 #define SBI_REMOTE_FENCE_I         5
12 #define SBI_REMOTE_SFENCE_VMA      6
13 #define SBI_REMOTE_SFENCE_VMA_ASID 7
14 #define SBI_SHUTDOWN               8
15 
16 // Here begins the complex set of things added by
17 // later SBI. Unlike the original design, these
18 // require bits of state to be maintained in SBI.
19 // Disappointing!
20 #define SBI_BASE_EXTENSION 0x10
21 #  define SBI_GET_SBI_SPEC_VERSION    0
22 #  define SBI_GET_SBI_IMPL_ID         1
23 #  define SBI_GET_SBI_IMPL_VERSION    2
24 #  define SBI_PROBE_EXTENSION         3
25 #  define SBI_GET_MVENDORID           4
26 #  define SBI_GET_MARCHID             5
27 #  define SBI_GET_MIMPID              6
28 
29 #define SBI_ENOSYS 38
30 
31 #define IPI_SOFT            1
32 #define IPI_FENCE_I         2
33 #define IPI_SFENCE_VMA      4
34 #define IPI_SFENCE_VMA_ASID 8
35 #define IPI_SHUTDOWN        16
36 
37 void handle_sbi(struct trapframe *tf);
38 
39 #endif /* RISCV_SBI_H */
40