xref: /aosp_15_r20/external/mesa3d/src/imagination/vulkan/pvr_tex_state.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright © 2022 Imagination Technologies Ltd.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy
5  * of this software and associated documentation files (the "Software"), to deal
6  * in the Software without restriction, including without limitation the rights
7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8  * copies of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  */
23 
24 #ifndef PVR_TEX_STATE_H
25 #define PVR_TEX_STATE_H
26 
27 #include <stdint.h>
28 #include <vulkan/vulkan.h>
29 
30 #include "hwdef/rogue_hw_defs.h"
31 #include "pvr_private.h"
32 #include "pvr_types.h"
33 #include "util/macros.h"
34 
35 /**
36  * Texture requires 32bit index lookups instead of texture coordinate access.
37  */
38 #define PVR_TEXFLAGS_INDEX_LOOKUP BITFIELD_BIT(0U)
39 
40 /** Texture has border texels present. */
41 #define PVR_TEXFLAGS_BORDER BITFIELD_BIT(1U)
42 
43 /**
44  * Resource is actually a buffer, not a texture, and therefore LOD is ignored.
45  * Coordinates are integers.
46  */
47 #define PVR_TEXFLAGS_BUFFER BITFIELD_BIT(2U)
48 
49 /** Parameters for #pvr_pack_tex_state(). */
50 struct pvr_texture_state_info {
51    VkFormat format;
52    enum pvr_memlayout mem_layout;
53    uint32_t flags;
54    VkImageViewType type;
55    VkImageAspectFlags aspect_mask;
56    bool is_cube;
57    enum pvr_texture_state tex_state_type;
58    VkExtent3D extent;
59 
60    /**
61     * For array textures, this holds the array dimension, in elements. This can
62     * be zero if texture is not an array.
63     */
64    uint32_t array_size;
65 
66    /** Base mipmap level. This is the miplevel you want as the top level. */
67    uint32_t base_level;
68 
69    /**
70     * Number of mipmap levels that should be accessed by HW. This is not
71     * necessarily the number of levels that are in memory. (See
72     * mipmaps_present)
73     */
74    uint32_t mip_levels;
75 
76    /**
77     * True if the texture is mipmapped.
78     * Note: This is based on the number of mip levels the texture contains, not
79     * on the mip levels that are being used i.e. mip_levels.
80     */
81    bool mipmaps_present;
82 
83    /**
84     * Number of samples per texel for multisampling. This should be 1 for none
85     * multisampled textures.
86     */
87    uint32_t sample_count;
88 
89    /** Stride, in pixels. Only valid if mem_layout is stride or tiled. */
90    uint32_t stride;
91 
92    /**
93     * For buffers, where TPU_BUFFER_LOOKUP is present, this defines
94     * the offset for the buffer, in texels.
95     */
96    uint32_t offset;
97 
98    /**
99     * Precomputed (composed from createinfo->components and format swizzle)
100     * swizzles to pass in to the texture state.
101     */
102    uint8_t swizzle[4];
103 
104    /** Address of texture, which must be aligned to at least 32bits. */
105    pvr_dev_addr_t addr;
106 };
107 
108 VkResult
109 pvr_pack_tex_state(struct pvr_device *device,
110                    const struct pvr_texture_state_info *info,
111                    uint64_t state[static const ROGUE_NUM_TEXSTATE_IMAGE_WORDS]);
112 
113 #endif /* PVR_TEX_STATE_H */
114