xref: /aosp_15_r20/external/coreboot/src/soc/amd/common/block/psp/psp_efs.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <amdblocks/psp_efs.h>
4 #include <assert.h>
5 #include <boot_device.h>
6 #include <commonlib/region.h>
7 #include <device/mmio.h>
8 #include <types.h>
9 
read_efs_spi_settings(uint8_t * mode,uint8_t * speed)10 bool read_efs_spi_settings(uint8_t *mode, uint8_t *speed)
11 {
12 	bool ret = false;
13 	struct embedded_firmware *efs;
14 
15 	efs = rdev_mmap(boot_device_ro(), EFS_OFFSET, sizeof(*efs));
16 	if (!efs)
17 		return false;
18 
19 	if (efs->signature == EMBEDDED_FW_SIGNATURE) {
20 #ifndef SPI_MODE_FIELD
21 		printk(BIOS_ERR, "Unknown cpu in psp_efs.h\n");
22 		printk(BIOS_ERR, "SPI speed/mode not set.\n");
23 #else
24 		*mode = efs->SPI_MODE_FIELD;
25 		*speed = efs->SPI_SPEED_FIELD;
26 		ret = true;
27 #endif
28 	}
29 	rdev_munmap(boot_device_ro(), efs);
30 	return ret;
31 }
32