1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3  * Copyright (c) 2020-2023, ARM Limited and Contributors. All rights reserved.
4  */
5 
6 #include <assert.h>
7 #include <common/debug.h>
8 #include <common/runtime_svc.h>
9 #include <lib/mmio.h>
10 #include <tools_share/uuid.h>
11 
12 #include "socfpga_fcs.h"
13 #include "socfpga_mailbox.h"
14 #include "socfpga_plat_def.h"
15 #include "socfpga_reset_manager.h"
16 #include "socfpga_sip_svc.h"
17 #include "socfpga_system_manager.h"
18 
19 
intel_ecc_dbe_notification(uint64_t dbe_value)20 uint32_t intel_ecc_dbe_notification(uint64_t dbe_value)
21 {
22 	dbe_value &= WARM_RESET_WFI_FLAG;
23 
24 	/* Trap CPUs in WFI if warm reset flag is set */
25 	if (dbe_value > 0) {
26 		while (1) {
27 			wfi();
28 		}
29 	}
30 
31 	return INTEL_SIP_SMC_STATUS_OK;
32 }
33 
cold_reset_for_ecc_dbe(void)34 bool cold_reset_for_ecc_dbe(void)
35 {
36 	uint32_t dbe_int_status;
37 
38 	dbe_int_status = mmio_read_32(SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_8));
39 
40 	/* Trigger cold reset only for error in critical memory (DDR/OCRAM) */
41 	dbe_int_status &= SYSMGR_ECC_DBE_COLD_RST_MASK;
42 
43 	if (dbe_int_status > 0) {
44 		return true;
45 	}
46 
47 	return false;
48 }
49