1 /** 2 * \file 3 * 4 * Copyright (c) 2015 Atmel Corporation. All rights reserved. 5 * 6 * \asf_license_start 7 * 8 * \page License 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright notice, 17 * this list of conditions and the following disclaimer in the documentation 18 * and/or other materials provided with the distribution. 19 * 20 * 3. The name of Atmel may not be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * 4. This software may only be redistributed and used in connection with an 24 * Atmel microcontroller product. 25 * 26 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 29 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 34 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 35 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 * 38 * \asf_license_stop 39 * 40 */ 41 /* 42 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> 43 */ 44 45 #ifndef _SAMV71Q20_PIO_ 46 #define _SAMV71Q20_PIO_ 47 48 #define PIO_PA0 (1u << 0) /**< \brief Pin Controlled by PA0 */ 49 #define PIO_PA1 (1u << 1) /**< \brief Pin Controlled by PA1 */ 50 #define PIO_PA2 (1u << 2) /**< \brief Pin Controlled by PA2 */ 51 #define PIO_PA3 (1u << 3) /**< \brief Pin Controlled by PA3 */ 52 #define PIO_PA4 (1u << 4) /**< \brief Pin Controlled by PA4 */ 53 #define PIO_PA5 (1u << 5) /**< \brief Pin Controlled by PA5 */ 54 #define PIO_PA6 (1u << 6) /**< \brief Pin Controlled by PA6 */ 55 #define PIO_PA7 (1u << 7) /**< \brief Pin Controlled by PA7 */ 56 #define PIO_PA8 (1u << 8) /**< \brief Pin Controlled by PA8 */ 57 #define PIO_PA9 (1u << 9) /**< \brief Pin Controlled by PA9 */ 58 #define PIO_PA10 (1u << 10) /**< \brief Pin Controlled by PA10 */ 59 #define PIO_PA11 (1u << 11) /**< \brief Pin Controlled by PA11 */ 60 #define PIO_PA12 (1u << 12) /**< \brief Pin Controlled by PA12 */ 61 #define PIO_PA13 (1u << 13) /**< \brief Pin Controlled by PA13 */ 62 #define PIO_PA14 (1u << 14) /**< \brief Pin Controlled by PA14 */ 63 #define PIO_PA15 (1u << 15) /**< \brief Pin Controlled by PA15 */ 64 #define PIO_PA16 (1u << 16) /**< \brief Pin Controlled by PA16 */ 65 #define PIO_PA17 (1u << 17) /**< \brief Pin Controlled by PA17 */ 66 #define PIO_PA18 (1u << 18) /**< \brief Pin Controlled by PA18 */ 67 #define PIO_PA19 (1u << 19) /**< \brief Pin Controlled by PA19 */ 68 #define PIO_PA20 (1u << 20) /**< \brief Pin Controlled by PA20 */ 69 #define PIO_PA21 (1u << 21) /**< \brief Pin Controlled by PA21 */ 70 #define PIO_PA22 (1u << 22) /**< \brief Pin Controlled by PA22 */ 71 #define PIO_PA23 (1u << 23) /**< \brief Pin Controlled by PA23 */ 72 #define PIO_PA24 (1u << 24) /**< \brief Pin Controlled by PA24 */ 73 #define PIO_PA25 (1u << 25) /**< \brief Pin Controlled by PA25 */ 74 #define PIO_PA26 (1u << 26) /**< \brief Pin Controlled by PA26 */ 75 #define PIO_PA27 (1u << 27) /**< \brief Pin Controlled by PA27 */ 76 #define PIO_PA28 (1u << 28) /**< \brief Pin Controlled by PA28 */ 77 #define PIO_PA29 (1u << 29) /**< \brief Pin Controlled by PA29 */ 78 #define PIO_PA30 (1u << 30) /**< \brief Pin Controlled by PA30 */ 79 #define PIO_PA31 (1u << 31) /**< \brief Pin Controlled by PA31 */ 80 #define PIO_PB0 (1u << 0) /**< \brief Pin Controlled by PB0 */ 81 #define PIO_PB1 (1u << 1) /**< \brief Pin Controlled by PB1 */ 82 #define PIO_PB2 (1u << 2) /**< \brief Pin Controlled by PB2 */ 83 #define PIO_PB3 (1u << 3) /**< \brief Pin Controlled by PB3 */ 84 #define PIO_PB4 (1u << 4) /**< \brief Pin Controlled by PB4 */ 85 #define PIO_PB5 (1u << 5) /**< \brief Pin Controlled by PB5 */ 86 #define PIO_PB6 (1u << 6) /**< \brief Pin Controlled by PB6 */ 87 #define PIO_PB7 (1u << 7) /**< \brief Pin Controlled by PB7 */ 88 #define PIO_PB8 (1u << 8) /**< \brief Pin Controlled by PB8 */ 89 #define PIO_PB9 (1u << 9) /**< \brief Pin Controlled by PB9 */ 90 #define PIO_PB12 (1u << 12) /**< \brief Pin Controlled by PB12 */ 91 #define PIO_PB13 (1u << 13) /**< \brief Pin Controlled by PB13 */ 92 #define PIO_PC0 (1u << 0) /**< \brief Pin Controlled by PC0 */ 93 #define PIO_PC1 (1u << 1) /**< \brief Pin Controlled by PC1 */ 94 #define PIO_PC2 (1u << 2) /**< \brief Pin Controlled by PC2 */ 95 #define PIO_PC3 (1u << 3) /**< \brief Pin Controlled by PC3 */ 96 #define PIO_PC4 (1u << 4) /**< \brief Pin Controlled by PC4 */ 97 #define PIO_PC5 (1u << 5) /**< \brief Pin Controlled by PC5 */ 98 #define PIO_PC6 (1u << 6) /**< \brief Pin Controlled by PC6 */ 99 #define PIO_PC7 (1u << 7) /**< \brief Pin Controlled by PC7 */ 100 #define PIO_PC8 (1u << 8) /**< \brief Pin Controlled by PC8 */ 101 #define PIO_PC9 (1u << 9) /**< \brief Pin Controlled by PC9 */ 102 #define PIO_PC10 (1u << 10) /**< \brief Pin Controlled by PC10 */ 103 #define PIO_PC11 (1u << 11) /**< \brief Pin Controlled by PC11 */ 104 #define PIO_PC12 (1u << 12) /**< \brief Pin Controlled by PC12 */ 105 #define PIO_PC13 (1u << 13) /**< \brief Pin Controlled by PC13 */ 106 #define PIO_PC14 (1u << 14) /**< \brief Pin Controlled by PC14 */ 107 #define PIO_PC15 (1u << 15) /**< \brief Pin Controlled by PC15 */ 108 #define PIO_PC16 (1u << 16) /**< \brief Pin Controlled by PC16 */ 109 #define PIO_PC17 (1u << 17) /**< \brief Pin Controlled by PC17 */ 110 #define PIO_PC18 (1u << 18) /**< \brief Pin Controlled by PC18 */ 111 #define PIO_PC19 (1u << 19) /**< \brief Pin Controlled by PC19 */ 112 #define PIO_PC20 (1u << 20) /**< \brief Pin Controlled by PC20 */ 113 #define PIO_PC21 (1u << 21) /**< \brief Pin Controlled by PC21 */ 114 #define PIO_PC22 (1u << 22) /**< \brief Pin Controlled by PC22 */ 115 #define PIO_PC23 (1u << 23) /**< \brief Pin Controlled by PC23 */ 116 #define PIO_PC24 (1u << 24) /**< \brief Pin Controlled by PC24 */ 117 #define PIO_PC25 (1u << 25) /**< \brief Pin Controlled by PC25 */ 118 #define PIO_PC26 (1u << 26) /**< \brief Pin Controlled by PC26 */ 119 #define PIO_PC27 (1u << 27) /**< \brief Pin Controlled by PC27 */ 120 #define PIO_PC28 (1u << 28) /**< \brief Pin Controlled by PC28 */ 121 #define PIO_PC29 (1u << 29) /**< \brief Pin Controlled by PC29 */ 122 #define PIO_PC30 (1u << 30) /**< \brief Pin Controlled by PC30 */ 123 #define PIO_PC31 (1u << 31) /**< \brief Pin Controlled by PC31 */ 124 #define PIO_PD0 (1u << 0) /**< \brief Pin Controlled by PD0 */ 125 #define PIO_PD1 (1u << 1) /**< \brief Pin Controlled by PD1 */ 126 #define PIO_PD2 (1u << 2) /**< \brief Pin Controlled by PD2 */ 127 #define PIO_PD3 (1u << 3) /**< \brief Pin Controlled by PD3 */ 128 #define PIO_PD4 (1u << 4) /**< \brief Pin Controlled by PD4 */ 129 #define PIO_PD5 (1u << 5) /**< \brief Pin Controlled by PD5 */ 130 #define PIO_PD6 (1u << 6) /**< \brief Pin Controlled by PD6 */ 131 #define PIO_PD7 (1u << 7) /**< \brief Pin Controlled by PD7 */ 132 #define PIO_PD8 (1u << 8) /**< \brief Pin Controlled by PD8 */ 133 #define PIO_PD9 (1u << 9) /**< \brief Pin Controlled by PD9 */ 134 #define PIO_PD10 (1u << 10) /**< \brief Pin Controlled by PD10 */ 135 #define PIO_PD11 (1u << 11) /**< \brief Pin Controlled by PD11 */ 136 #define PIO_PD12 (1u << 12) /**< \brief Pin Controlled by PD12 */ 137 #define PIO_PD13 (1u << 13) /**< \brief Pin Controlled by PD13 */ 138 #define PIO_PD14 (1u << 14) /**< \brief Pin Controlled by PD14 */ 139 #define PIO_PD15 (1u << 15) /**< \brief Pin Controlled by PD15 */ 140 #define PIO_PD16 (1u << 16) /**< \brief Pin Controlled by PD16 */ 141 #define PIO_PD17 (1u << 17) /**< \brief Pin Controlled by PD17 */ 142 #define PIO_PD18 (1u << 18) /**< \brief Pin Controlled by PD18 */ 143 #define PIO_PD19 (1u << 19) /**< \brief Pin Controlled by PD19 */ 144 #define PIO_PD20 (1u << 20) /**< \brief Pin Controlled by PD20 */ 145 #define PIO_PD21 (1u << 21) /**< \brief Pin Controlled by PD21 */ 146 #define PIO_PD22 (1u << 22) /**< \brief Pin Controlled by PD22 */ 147 #define PIO_PD23 (1u << 23) /**< \brief Pin Controlled by PD23 */ 148 #define PIO_PD24 (1u << 24) /**< \brief Pin Controlled by PD24 */ 149 #define PIO_PD25 (1u << 25) /**< \brief Pin Controlled by PD25 */ 150 #define PIO_PD26 (1u << 26) /**< \brief Pin Controlled by PD26 */ 151 #define PIO_PD27 (1u << 27) /**< \brief Pin Controlled by PD27 */ 152 #define PIO_PD28 (1u << 28) /**< \brief Pin Controlled by PD28 */ 153 #define PIO_PD29 (1u << 29) /**< \brief Pin Controlled by PD29 */ 154 #define PIO_PD30 (1u << 30) /**< \brief Pin Controlled by PD30 */ 155 #define PIO_PD31 (1u << 31) /**< \brief Pin Controlled by PD31 */ 156 #define PIO_PE0 (1u << 0) /**< \brief Pin Controlled by PE0 */ 157 #define PIO_PE1 (1u << 1) /**< \brief Pin Controlled by PE1 */ 158 #define PIO_PE2 (1u << 2) /**< \brief Pin Controlled by PE2 */ 159 #define PIO_PE3 (1u << 3) /**< \brief Pin Controlled by PE3 */ 160 #define PIO_PE4 (1u << 4) /**< \brief Pin Controlled by PE4 */ 161 #define PIO_PE5 (1u << 5) /**< \brief Pin Controlled by PE5 */ 162 /* ========== Pio definition for AFEC0 peripheral ========== */ 163 #define PIO_PD30X1_AFE0_AD0 (1u << 30) /**< \brief Afec0 signal: AFE0_AD0 */ 164 #define PIO_PA21X1_AFE0_AD1 (1u << 21) /**< \brief Afec0 signal: AFE0_AD1/PIODCEN2 */ 165 #define PIO_PA21X1_PIODCEN2 (1u << 21) /**< \brief Afec0 signal: AFE0_AD1/PIODCEN2 */ 166 #define PIO_PB0X1_AFE0_AD10 (1u << 0) /**< \brief Afec0 signal: AFE0_AD10/RTCOUT0 */ 167 #define PIO_PB0X1_RTCOUT0 (1u << 0) /**< \brief Afec0 signal: AFE0_AD10/RTCOUT0 */ 168 #define PIO_PB3X1_AFE0_AD2 (1u << 3) /**< \brief Afec0 signal: AFE0_AD2/WKUP12 */ 169 #define PIO_PB3X1_WKUP12 (1u << 3) /**< \brief Afec0 signal: AFE0_AD2/WKUP12 */ 170 #define PIO_PE5X1_AFE0_AD3 (1u << 5) /**< \brief Afec0 signal: AFE0_AD3 */ 171 #define PIO_PE4X1_AFE0_AD4 (1u << 4) /**< \brief Afec0 signal: AFE0_AD4 */ 172 #define PIO_PB2X1_AFE0_AD5 (1u << 2) /**< \brief Afec0 signal: AFE0_AD5 */ 173 #define PIO_PA17X1_AFE0_AD6 (1u << 17) /**< \brief Afec0 signal: AFE0_AD6 */ 174 #define PIO_PA18X1_AFE0_AD7 (1u << 18) /**< \brief Afec0 signal: AFE0_AD7 */ 175 #define PIO_PA19X1_AFE0_AD8 (1u << 19) /**< \brief Afec0 signal: AFE0_AD8/WKUP9 */ 176 #define PIO_PA19X1_WKUP9 (1u << 19) /**< \brief Afec0 signal: AFE0_AD8/WKUP9 */ 177 #define PIO_PA20X1_AFE0_AD9 (1u << 20) /**< \brief Afec0 signal: AFE0_AD9/WKUP10 */ 178 #define PIO_PA20X1_WKUP10 (1u << 20) /**< \brief Afec0 signal: AFE0_AD9/WKUP10 */ 179 #define PIO_PA8B_AFE0_ADTRG (1u << 8) /**< \brief Afec0 signal: AFE0_ADTRG */ 180 /* ========== Pio definition for AFEC1 peripheral ========== */ 181 #define PIO_PB1X1_AFE1_AD0 (1u << 1) /**< \brief Afec1 signal: AFE1_AD0/RTCOUT1 */ 182 #define PIO_PB1X1_RTCOUT1 (1u << 1) /**< \brief Afec1 signal: AFE1_AD0/RTCOUT1 */ 183 #define PIO_PC13X1_AFE1_AD1 (1u << 13) /**< \brief Afec1 signal: AFE1_AD1 */ 184 #define PIO_PE3X1_AFE1_AD10 (1u << 3) /**< \brief Afec1 signal: AFE1_AD10 */ 185 #define PIO_PE0X1_AFE1_AD11 (1u << 0) /**< \brief Afec1 signal: AFE1_AD11 */ 186 #define PIO_PC15X1_AFE1_AD2 (1u << 15) /**< \brief Afec1 signal: AFE1_AD2 */ 187 #define PIO_PC12X1_AFE1_AD3 (1u << 12) /**< \brief Afec1 signal: AFE1_AD3 */ 188 #define PIO_PC29X1_AFE1_AD4 (1u << 29) /**< \brief Afec1 signal: AFE1_AD4 */ 189 #define PIO_PC30X1_AFE1_AD5 (1u << 30) /**< \brief Afec1 signal: AFE1_AD5 */ 190 #define PIO_PC31X1_AFE1_AD6 (1u << 31) /**< \brief Afec1 signal: AFE1_AD6 */ 191 #define PIO_PC26X1_AFE1_AD7 (1u << 26) /**< \brief Afec1 signal: AFE1_AD7 */ 192 #define PIO_PC27X1_AFE1_AD8 (1u << 27) /**< \brief Afec1 signal: AFE1_AD8 */ 193 #define PIO_PC0X1_AFE1_AD9 (1u << 0) /**< \brief Afec1 signal: AFE1_AD9 */ 194 #define PIO_PD9C_AFE1_ADTRG (1u << 9) /**< \brief Afec1 signal: AFE1_ADTRG */ 195 /* ========== Pio definition for ARM peripheral ========== */ 196 #define PIO_PB7X1_SWCLK (1u << 7) /**< \brief Arm signal: SWCLK/TCK */ 197 #define PIO_PB7X1_TCK (1u << 7) /**< \brief Arm signal: SWCLK/TCK */ 198 #define PIO_PB6X1_SWDIO (1u << 6) /**< \brief Arm signal: SWDIO/TMS */ 199 #define PIO_PB6X1_TMS (1u << 6) /**< \brief Arm signal: SWDIO/TMS */ 200 #define PIO_PB4X1_TDI (1u << 4) /**< \brief Arm signal: TDI */ 201 #define PIO_PB5X1_TDO (1u << 5) /**< \brief Arm signal: TDO/TRACESWO/WKUP13 */ 202 #define PIO_PB5X1_TRACESWO (1u << 5) /**< \brief Arm signal: TDO/TRACESWO/WKUP13 */ 203 #define PIO_PB5X1_WKUP13 (1u << 5) /**< \brief Arm signal: TDO/TRACESWO/WKUP13 */ 204 /* ========== Pio definition for DACC peripheral ========== */ 205 #define PIO_PB13X1_DAC0 (1u << 13) /**< \brief Dacc signal: DAC0 */ 206 #define PIO_PD0X1_DAC1 (1u << 0) /**< \brief Dacc signal: DAC1 */ 207 #define PIO_PA2C_DATRG (1u << 2) /**< \brief Dacc signal: DATRG */ 208 /* ========== Pio definition for EBI peripheral ========== */ 209 #define PIO_PC18A_A0 (1u << 18) /**< \brief Ebi signal: A0/NBS0 */ 210 #define PIO_PC18A_NBS0 (1u << 18) /**< \brief Ebi signal: A0/NBS0 */ 211 #define PIO_PC19A_A1 (1u << 19) /**< \brief Ebi signal: A1 */ 212 #define PIO_PC28A_A10 (1u << 28) /**< \brief Ebi signal: A10 */ 213 #define PIO_PC29A_A11 (1u << 29) /**< \brief Ebi signal: A11 */ 214 #define PIO_PC30A_A12 (1u << 30) /**< \brief Ebi signal: A12 */ 215 #define PIO_PC31A_A13 (1u << 31) /**< \brief Ebi signal: A13 */ 216 #define PIO_PA18C_A14 (1u << 18) /**< \brief Ebi signal: A14 */ 217 #define PIO_PA19C_A15 (1u << 19) /**< \brief Ebi signal: A15 */ 218 #define PIO_PA20C_A16 (1u << 20) /**< \brief Ebi signal: A16/BA0 */ 219 #define PIO_PA20C_BA0 (1u << 20) /**< \brief Ebi signal: A16/BA0 */ 220 #define PIO_PA0C_A17 (1u << 0) /**< \brief Ebi signal: A17/BA1 */ 221 #define PIO_PA0C_BA1 (1u << 0) /**< \brief Ebi signal: A17/BA1 */ 222 #define PIO_PA1C_A18 (1u << 1) /**< \brief Ebi signal: A18 */ 223 #define PIO_PA23C_A19 (1u << 23) /**< \brief Ebi signal: A19 */ 224 #define PIO_PC20A_A2 (1u << 20) /**< \brief Ebi signal: A2 */ 225 #define PIO_PA24C_A20 (1u << 24) /**< \brief Ebi signal: A20 */ 226 #define PIO_PC16A_A21 (1u << 16) /**< \brief Ebi signal: A21/NANDALE */ 227 #define PIO_PC16A_NANDALE (1u << 16) /**< \brief Ebi signal: A21/NANDALE */ 228 #define PIO_PC17A_A22 (1u << 17) /**< \brief Ebi signal: A22/NANDCLE */ 229 #define PIO_PC17A_NANDCLE (1u << 17) /**< \brief Ebi signal: A22/NANDCLE */ 230 #define PIO_PA25C_A23 (1u << 25) /**< \brief Ebi signal: A23 */ 231 #define PIO_PC21A_A3 (1u << 21) /**< \brief Ebi signal: A3 */ 232 #define PIO_PC22A_A4 (1u << 22) /**< \brief Ebi signal: A4 */ 233 #define PIO_PC23A_A5 (1u << 23) /**< \brief Ebi signal: A5 */ 234 #define PIO_PC24A_A6 (1u << 24) /**< \brief Ebi signal: A6 */ 235 #define PIO_PC25A_A7 (1u << 25) /**< \brief Ebi signal: A7 */ 236 #define PIO_PC26A_A8 (1u << 26) /**< \brief Ebi signal: A8 */ 237 #define PIO_PC27A_A9 (1u << 27) /**< \brief Ebi signal: A9 */ 238 #define PIO_PD17C_CAS (1u << 17) /**< \brief Ebi signal: CAS */ 239 #define PIO_PC0A_D0 (1u << 0) /**< \brief Ebi signal: D0 */ 240 #define PIO_PC1A_D1 (1u << 1) /**< \brief Ebi signal: D1 */ 241 #define PIO_PE2A_D10 (1u << 2) /**< \brief Ebi signal: D10 */ 242 #define PIO_PE3A_D11 (1u << 3) /**< \brief Ebi signal: D11 */ 243 #define PIO_PE4A_D12 (1u << 4) /**< \brief Ebi signal: D12 */ 244 #define PIO_PE5A_D13 (1u << 5) /**< \brief Ebi signal: D13 */ 245 #define PIO_PA15A_D14 (1u << 15) /**< \brief Ebi signal: D14 */ 246 #define PIO_PA16A_D15 (1u << 16) /**< \brief Ebi signal: D15 */ 247 #define PIO_PC2A_D2 (1u << 2) /**< \brief Ebi signal: D2 */ 248 #define PIO_PC3A_D3 (1u << 3) /**< \brief Ebi signal: D3 */ 249 #define PIO_PC4A_D4 (1u << 4) /**< \brief Ebi signal: D4 */ 250 #define PIO_PC5A_D5 (1u << 5) /**< \brief Ebi signal: D5 */ 251 #define PIO_PC6A_D6 (1u << 6) /**< \brief Ebi signal: D6 */ 252 #define PIO_PC7A_D7 (1u << 7) /**< \brief Ebi signal: D7 */ 253 #define PIO_PE0A_D8 (1u << 0) /**< \brief Ebi signal: D8 */ 254 #define PIO_PE1A_D9 (1u << 1) /**< \brief Ebi signal: D9 */ 255 #define PIO_PC9A_NANDOE (1u << 9) /**< \brief Ebi signal: NANDOE */ 256 #define PIO_PC10A_NANDWE (1u << 10) /**< \brief Ebi signal: NANDWE */ 257 #define PIO_PC14A_NCS0 (1u << 14) /**< \brief Ebi signal: NCS0 */ 258 #define PIO_PC15A_NCS1 (1u << 15) /**< \brief Ebi signal: NCS1/SDCS */ 259 #define PIO_PC15A_SDCS (1u << 15) /**< \brief Ebi signal: NCS1/SDCS */ 260 #define PIO_PD18A_NCS1 (1u << 18) /**< \brief Ebi signal: NCS1/SDCS */ 261 #define PIO_PD18A_SDCS (1u << 18) /**< \brief Ebi signal: NCS1/SDCS */ 262 #define PIO_PA22C_NCS2 (1u << 22) /**< \brief Ebi signal: NCS2 */ 263 #define PIO_PC12A_NCS3 (1u << 12) /**< \brief Ebi signal: NCS3 */ 264 #define PIO_PD19A_NCS3 (1u << 19) /**< \brief Ebi signal: NCS3 */ 265 #define PIO_PC11A_NRD (1u << 11) /**< \brief Ebi signal: NRD */ 266 #define PIO_PC13A_NWAIT (1u << 13) /**< \brief Ebi signal: NWAIT */ 267 #define PIO_PC8A_NWR0 (1u << 8) /**< \brief Ebi signal: NWR0/NWE */ 268 #define PIO_PC8A_NWE (1u << 8) /**< \brief Ebi signal: NWR0/NWE */ 269 #define PIO_PD15C_NWR1 (1u << 15) /**< \brief Ebi signal: NWR1/NBS1 */ 270 #define PIO_PD15C_NBS1 (1u << 15) /**< \brief Ebi signal: NWR1/NBS1 */ 271 #define PIO_PD16C_RAS (1u << 16) /**< \brief Ebi signal: RAS */ 272 #define PIO_PC13C_SDA10 (1u << 13) /**< \brief Ebi signal: SDA10 */ 273 #define PIO_PD13C_SDA10 (1u << 13) /**< \brief Ebi signal: SDA10 */ 274 #define PIO_PD23C_SDCK (1u << 23) /**< \brief Ebi signal: SDCK */ 275 #define PIO_PD14C_SDCKE (1u << 14) /**< \brief Ebi signal: SDCKE */ 276 #define PIO_PD29C_SDWE (1u << 29) /**< \brief Ebi signal: SDWE */ 277 /* ========== Pio definition for GMAC peripheral ========== */ 278 #define PIO_PD13A_GCOL (1u << 13) /**< \brief Gmac signal: GCOL */ 279 #define PIO_PD10A_GCRS (1u << 10) /**< \brief Gmac signal: GCRS */ 280 #define PIO_PD8A_GMDC (1u << 8) /**< \brief Gmac signal: GMDC */ 281 #define PIO_PD9A_GMDIO (1u << 9) /**< \brief Gmac signal: GMDIO */ 282 #define PIO_PD5A_GRX0 (1u << 5) /**< \brief Gmac signal: GRX0 */ 283 #define PIO_PD6A_GRX1 (1u << 6) /**< \brief Gmac signal: GRX1 */ 284 #define PIO_PD11A_GRX2 (1u << 11) /**< \brief Gmac signal: GRX2 */ 285 #define PIO_PD12A_GRX3 (1u << 12) /**< \brief Gmac signal: GRX3 */ 286 #define PIO_PD14A_GRXCK (1u << 14) /**< \brief Gmac signal: GRXCK */ 287 #define PIO_PD4A_GRXDV (1u << 4) /**< \brief Gmac signal: GRXDV */ 288 #define PIO_PD7A_GRXER (1u << 7) /**< \brief Gmac signal: GRXER */ 289 #define PIO_PB1B_GTSUCOMP (1u << 1) /**< \brief Gmac signal: GTSUCOMP */ 290 #define PIO_PB12B_GTSUCOMP (1u << 12) /**< \brief Gmac signal: GTSUCOMP */ 291 #define PIO_PD11C_GTSUCOMP (1u << 11) /**< \brief Gmac signal: GTSUCOMP */ 292 #define PIO_PD20C_GTSUCOMP (1u << 20) /**< \brief Gmac signal: GTSUCOMP */ 293 #define PIO_PD2A_GTX0 (1u << 2) /**< \brief Gmac signal: GTX0 */ 294 #define PIO_PD3A_GTX1 (1u << 3) /**< \brief Gmac signal: GTX1 */ 295 #define PIO_PD15A_GTX2 (1u << 15) /**< \brief Gmac signal: GTX2 */ 296 #define PIO_PD16A_GTX3 (1u << 16) /**< \brief Gmac signal: GTX3 */ 297 #define PIO_PD0A_GTXCK (1u << 0) /**< \brief Gmac signal: GTXCK */ 298 #define PIO_PD1A_GTXEN (1u << 1) /**< \brief Gmac signal: GTXEN */ 299 #define PIO_PD17A_GTXER (1u << 17) /**< \brief Gmac signal: GTXER */ 300 /* ========== Pio definition for HSMCI peripheral ========== */ 301 #define PIO_PA28C_MCCDA (1u << 28) /**< \brief Hsmci signal: MCCDA */ 302 #define PIO_PA25D_MCCK (1u << 25) /**< \brief Hsmci signal: MCCK */ 303 #define PIO_PA30C_MCDA0 (1u << 30) /**< \brief Hsmci signal: MCDA0 */ 304 #define PIO_PA31C_MCDA1 (1u << 31) /**< \brief Hsmci signal: MCDA1 */ 305 #define PIO_PA26C_MCDA2 (1u << 26) /**< \brief Hsmci signal: MCDA2 */ 306 #define PIO_PA27C_MCDA3 (1u << 27) /**< \brief Hsmci signal: MCDA3 */ 307 /* ========== Pio definition for ISI peripheral ========== */ 308 #define PIO_PD22D_ISI_D0 (1u << 22) /**< \brief Isi signal: ISI_D0 */ 309 #define PIO_PD21D_ISI_D1 (1u << 21) /**< \brief Isi signal: ISI_D1 */ 310 #define PIO_PD30D_ISI_D10 (1u << 30) /**< \brief Isi signal: ISI_D10 */ 311 #define PIO_PD31D_ISI_D11 (1u << 31) /**< \brief Isi signal: ISI_D11 */ 312 #define PIO_PB3D_ISI_D2 (1u << 3) /**< \brief Isi signal: ISI_D2 */ 313 #define PIO_PA9B_ISI_D3 (1u << 9) /**< \brief Isi signal: ISI_D3 */ 314 #define PIO_PA5B_ISI_D4 (1u << 5) /**< \brief Isi signal: ISI_D4 */ 315 #define PIO_PD11D_ISI_D5 (1u << 11) /**< \brief Isi signal: ISI_D5 */ 316 #define PIO_PD12D_ISI_D6 (1u << 12) /**< \brief Isi signal: ISI_D6 */ 317 #define PIO_PA27D_ISI_D7 (1u << 27) /**< \brief Isi signal: ISI_D7 */ 318 #define PIO_PD27D_ISI_D8 (1u << 27) /**< \brief Isi signal: ISI_D8 */ 319 #define PIO_PD28D_ISI_D9 (1u << 28) /**< \brief Isi signal: ISI_D9 */ 320 #define PIO_PD24D_ISI_HSYNC (1u << 24) /**< \brief Isi signal: ISI_HSYNC */ 321 #define PIO_PA24D_ISI_PCK (1u << 24) /**< \brief Isi signal: ISI_PCK */ 322 #define PIO_PD25D_ISI_VSYNC (1u << 25) /**< \brief Isi signal: ISI_VSYNC */ 323 /* ========== Pio definition for MCAN0 peripheral ========== */ 324 #define PIO_PB3A_CANRX0 (1u << 3) /**< \brief Mcan0 signal: CANRX0 */ 325 #define PIO_PB2A_CANTX0 (1u << 2) /**< \brief Mcan0 signal: CANTX0 */ 326 /* ========== Pio definition for MCAN1 peripheral ========== */ 327 #define PIO_PC12C_CANRX1 (1u << 12) /**< \brief Mcan1 signal: CANRX1 */ 328 #define PIO_PD28B_CANRX1 (1u << 28) /**< \brief Mcan1 signal: CANRX1 */ 329 #define PIO_PC14C_CANTX1 (1u << 14) /**< \brief Mcan1 signal: CANTX1 */ 330 #define PIO_PD12B_CANTX1 (1u << 12) /**< \brief Mcan1 signal: CANTX1 */ 331 /* ========== Pio definition for MLB peripheral ========== */ 332 #define PIO_PB4C_MLBCLK (1u << 4) /**< \brief Mlb signal: MLBCLK */ 333 #define PIO_PB5C_MLBDAT (1u << 5) /**< \brief Mlb signal: MLBDAT */ 334 #define PIO_PD10D_MLBSIG (1u << 10) /**< \brief Mlb signal: MLBSIG */ 335 /* ========== Pio definition for PIOA peripheral ========== */ 336 #define PIO_PA21X1_AFE0_AD1 (1u << 21) /**< \brief Pioa signal: AFE0_AD1/PIODCEN2 */ 337 #define PIO_PA21X1_PIODCEN2 (1u << 21) /**< \brief Pioa signal: AFE0_AD1/PIODCEN2 */ 338 #define PIO_PA3X1_PIODC0 (1u << 3) /**< \brief Pioa signal: PIODC0 */ 339 #define PIO_PA10X1_PIODC4 (1u << 10) /**< \brief Pioa signal: PIODC4 */ 340 #define PIO_PA12X1_PIODC6 (1u << 12) /**< \brief Pioa signal: PIODC6 */ 341 #define PIO_PA13X1_PIODC7 (1u << 13) /**< \brief Pioa signal: PIODC7 */ 342 #define PIO_PA22X1_PIODCCLK (1u << 22) /**< \brief Pioa signal: PIODCCLK */ 343 #define PIO_PA4X1_WKUP3 (1u << 4) /**< \brief Pioa signal: WKUP3/PIODC1 */ 344 #define PIO_PA4X1_PIODC1 (1u << 4) /**< \brief Pioa signal: WKUP3/PIODC1 */ 345 #define PIO_PA5X1_WKUP4 (1u << 5) /**< \brief Pioa signal: WKUP4/PIODC2 */ 346 #define PIO_PA5X1_PIODC2 (1u << 5) /**< \brief Pioa signal: WKUP4/PIODC2 */ 347 #define PIO_PA9X1_WKUP6 (1u << 9) /**< \brief Pioa signal: WKUP6/PIODC3 */ 348 #define PIO_PA9X1_PIODC3 (1u << 9) /**< \brief Pioa signal: WKUP6/PIODC3 */ 349 #define PIO_PA11X1_WKUP7 (1u << 11) /**< \brief Pioa signal: WKUP7/PIODC5 */ 350 #define PIO_PA11X1_PIODC5 (1u << 11) /**< \brief Pioa signal: WKUP7/PIODC5 */ 351 #define PIO_PA14X1_WKUP8 (1u << 14) /**< \brief Pioa signal: WKUP8/PIODCEN1 */ 352 #define PIO_PA14X1_PIODCEN1 (1u << 14) /**< \brief Pioa signal: WKUP8/PIODCEN1 */ 353 /* ========== Pio definition for PMC peripheral ========== */ 354 #define PIO_PA6B_PCK0 (1u << 6) /**< \brief Pmc signal: PCK0 */ 355 #define PIO_PB12D_PCK0 (1u << 12) /**< \brief Pmc signal: PCK0 */ 356 #define PIO_PB13B_PCK0 (1u << 13) /**< \brief Pmc signal: PCK0 */ 357 #define PIO_PA17B_PCK1 (1u << 17) /**< \brief Pmc signal: PCK1 */ 358 #define PIO_PA21B_PCK1 (1u << 21) /**< \brief Pmc signal: PCK1 */ 359 #define PIO_PA3C_PCK2 (1u << 3) /**< \brief Pmc signal: PCK2 */ 360 #define PIO_PA18B_PCK2 (1u << 18) /**< \brief Pmc signal: PCK2 */ 361 #define PIO_PA31B_PCK2 (1u << 31) /**< \brief Pmc signal: PCK2 */ 362 #define PIO_PB3B_PCK2 (1u << 3) /**< \brief Pmc signal: PCK2 */ 363 #define PIO_PD31C_PCK2 (1u << 31) /**< \brief Pmc signal: PCK2 */ 364 /* ========== Pio definition for PWM0 peripheral ========== */ 365 #define PIO_PA10B_PWMC0_PWMEXTRG0 (1u << 10) /**< \brief Pwm0 signal: PWMC0_PWMEXTRG0 */ 366 #define PIO_PA22B_PWMC0_PWMEXTRG1 (1u << 22) /**< \brief Pwm0 signal: PWMC0_PWMEXTRG1 */ 367 #define PIO_PA9C_PWMC0_PWMFI0 (1u << 9) /**< \brief Pwm0 signal: PWMC0_PWMFI0 */ 368 #define PIO_PD8B_PWMC0_PWMFI1 (1u << 8) /**< \brief Pwm0 signal: PWMC0_PWMFI1 */ 369 #define PIO_PD9B_PWMC0_PWMFI2 (1u << 9) /**< \brief Pwm0 signal: PWMC0_PWMFI2 */ 370 #define PIO_PA0A_PWMC0_PWMH0 (1u << 0) /**< \brief Pwm0 signal: PWMC0_PWMH0 */ 371 #define PIO_PA11B_PWMC0_PWMH0 (1u << 11) /**< \brief Pwm0 signal: PWMC0_PWMH0 */ 372 #define PIO_PA23B_PWMC0_PWMH0 (1u << 23) /**< \brief Pwm0 signal: PWMC0_PWMH0 */ 373 #define PIO_PB0A_PWMC0_PWMH0 (1u << 0) /**< \brief Pwm0 signal: PWMC0_PWMH0 */ 374 #define PIO_PD11B_PWMC0_PWMH0 (1u << 11) /**< \brief Pwm0 signal: PWMC0_PWMH0 */ 375 #define PIO_PD20A_PWMC0_PWMH0 (1u << 20) /**< \brief Pwm0 signal: PWMC0_PWMH0 */ 376 #define PIO_PA2A_PWMC0_PWMH1 (1u << 2) /**< \brief Pwm0 signal: PWMC0_PWMH1 */ 377 #define PIO_PA12B_PWMC0_PWMH1 (1u << 12) /**< \brief Pwm0 signal: PWMC0_PWMH1 */ 378 #define PIO_PA24B_PWMC0_PWMH1 (1u << 24) /**< \brief Pwm0 signal: PWMC0_PWMH1 */ 379 #define PIO_PB1A_PWMC0_PWMH1 (1u << 1) /**< \brief Pwm0 signal: PWMC0_PWMH1 */ 380 #define PIO_PD21A_PWMC0_PWMH1 (1u << 21) /**< \brief Pwm0 signal: PWMC0_PWMH1 */ 381 #define PIO_PA13B_PWMC0_PWMH2 (1u << 13) /**< \brief Pwm0 signal: PWMC0_PWMH2 */ 382 #define PIO_PA25B_PWMC0_PWMH2 (1u << 25) /**< \brief Pwm0 signal: PWMC0_PWMH2 */ 383 #define PIO_PB4B_PWMC0_PWMH2 (1u << 4) /**< \brief Pwm0 signal: PWMC0_PWMH2 */ 384 #define PIO_PC19B_PWMC0_PWMH2 (1u << 19) /**< \brief Pwm0 signal: PWMC0_PWMH2 */ 385 #define PIO_PD22A_PWMC0_PWMH2 (1u << 22) /**< \brief Pwm0 signal: PWMC0_PWMH2 */ 386 #define PIO_PA7B_PWMC0_PWMH3 (1u << 7) /**< \brief Pwm0 signal: PWMC0_PWMH3 */ 387 #define PIO_PA14B_PWMC0_PWMH3 (1u << 14) /**< \brief Pwm0 signal: PWMC0_PWMH3 */ 388 #define PIO_PA17C_PWMC0_PWMH3 (1u << 17) /**< \brief Pwm0 signal: PWMC0_PWMH3 */ 389 #define PIO_PC13B_PWMC0_PWMH3 (1u << 13) /**< \brief Pwm0 signal: PWMC0_PWMH3 */ 390 #define PIO_PC21B_PWMC0_PWMH3 (1u << 21) /**< \brief Pwm0 signal: PWMC0_PWMH3 */ 391 #define PIO_PD23A_PWMC0_PWMH3 (1u << 23) /**< \brief Pwm0 signal: PWMC0_PWMH3 */ 392 #define PIO_PA1A_PWMC0_PWML0 (1u << 1) /**< \brief Pwm0 signal: PWMC0_PWML0 */ 393 #define PIO_PA19B_PWMC0_PWML0 (1u << 19) /**< \brief Pwm0 signal: PWMC0_PWML0 */ 394 #define PIO_PB5B_PWMC0_PWML0 (1u << 5) /**< \brief Pwm0 signal: PWMC0_PWML0 */ 395 #define PIO_PC0B_PWMC0_PWML0 (1u << 0) /**< \brief Pwm0 signal: PWMC0_PWML0 */ 396 #define PIO_PD10B_PWMC0_PWML0 (1u << 10) /**< \brief Pwm0 signal: PWMC0_PWML0 */ 397 #define PIO_PD24A_PWMC0_PWML0 (1u << 24) /**< \brief Pwm0 signal: PWMC0_PWML0 */ 398 #define PIO_PA20B_PWMC0_PWML1 (1u << 20) /**< \brief Pwm0 signal: PWMC0_PWML1 */ 399 #define PIO_PB12A_PWMC0_PWML1 (1u << 12) /**< \brief Pwm0 signal: PWMC0_PWML1 */ 400 #define PIO_PC1B_PWMC0_PWML1 (1u << 1) /**< \brief Pwm0 signal: PWMC0_PWML1 */ 401 #define PIO_PC18B_PWMC0_PWML1 (1u << 18) /**< \brief Pwm0 signal: PWMC0_PWML1 */ 402 #define PIO_PD25A_PWMC0_PWML1 (1u << 25) /**< \brief Pwm0 signal: PWMC0_PWML1 */ 403 #define PIO_PA16C_PWMC0_PWML2 (1u << 16) /**< \brief Pwm0 signal: PWMC0_PWML2 */ 404 #define PIO_PA30A_PWMC0_PWML2 (1u << 30) /**< \brief Pwm0 signal: PWMC0_PWML2 */ 405 #define PIO_PB13A_PWMC0_PWML2 (1u << 13) /**< \brief Pwm0 signal: PWMC0_PWML2 */ 406 #define PIO_PC2B_PWMC0_PWML2 (1u << 2) /**< \brief Pwm0 signal: PWMC0_PWML2 */ 407 #define PIO_PC20B_PWMC0_PWML2 (1u << 20) /**< \brief Pwm0 signal: PWMC0_PWML2 */ 408 #define PIO_PD26A_PWMC0_PWML2 (1u << 26) /**< \brief Pwm0 signal: PWMC0_PWML2 */ 409 #define PIO_PA15C_PWMC0_PWML3 (1u << 15) /**< \brief Pwm0 signal: PWMC0_PWML3 */ 410 #define PIO_PC3B_PWMC0_PWML3 (1u << 3) /**< \brief Pwm0 signal: PWMC0_PWML3 */ 411 #define PIO_PC15B_PWMC0_PWML3 (1u << 15) /**< \brief Pwm0 signal: PWMC0_PWML3 */ 412 #define PIO_PC22B_PWMC0_PWML3 (1u << 22) /**< \brief Pwm0 signal: PWMC0_PWML3 */ 413 #define PIO_PD27A_PWMC0_PWML3 (1u << 27) /**< \brief Pwm0 signal: PWMC0_PWML3 */ 414 /* ========== Pio definition for PWM1 peripheral ========== */ 415 #define PIO_PA30B_PWMC1_PWMEXTRG0 (1u << 30) /**< \brief Pwm1 signal: PWMC1_PWMEXTRG0 */ 416 #define PIO_PA18A_PWMC1_PWMEXTRG1 (1u << 18) /**< \brief Pwm1 signal: PWMC1_PWMEXTRG1 */ 417 #define PIO_PA21C_PWMC1_PWMFI0 (1u << 21) /**< \brief Pwm1 signal: PWMC1_PWMFI0 */ 418 #define PIO_PA26D_PWMC1_PWMFI1 (1u << 26) /**< \brief Pwm1 signal: PWMC1_PWMFI1 */ 419 #define PIO_PA28D_PWMC1_PWMFI2 (1u << 28) /**< \brief Pwm1 signal: PWMC1_PWMFI2 */ 420 #define PIO_PA12C_PWMC1_PWMH0 (1u << 12) /**< \brief Pwm1 signal: PWMC1_PWMH0 */ 421 #define PIO_PD1B_PWMC1_PWMH0 (1u << 1) /**< \brief Pwm1 signal: PWMC1_PWMH0 */ 422 #define PIO_PA14C_PWMC1_PWMH1 (1u << 14) /**< \brief Pwm1 signal: PWMC1_PWMH1 */ 423 #define PIO_PD3B_PWMC1_PWMH1 (1u << 3) /**< \brief Pwm1 signal: PWMC1_PWMH1 */ 424 #define PIO_PA31D_PWMC1_PWMH2 (1u << 31) /**< \brief Pwm1 signal: PWMC1_PWMH2 */ 425 #define PIO_PD5B_PWMC1_PWMH2 (1u << 5) /**< \brief Pwm1 signal: PWMC1_PWMH2 */ 426 #define PIO_PA8A_PWMC1_PWMH3 (1u << 8) /**< \brief Pwm1 signal: PWMC1_PWMH3 */ 427 #define PIO_PD7B_PWMC1_PWMH3 (1u << 7) /**< \brief Pwm1 signal: PWMC1_PWMH3 */ 428 #define PIO_PA11C_PWMC1_PWML0 (1u << 11) /**< \brief Pwm1 signal: PWMC1_PWML0 */ 429 #define PIO_PD0B_PWMC1_PWML0 (1u << 0) /**< \brief Pwm1 signal: PWMC1_PWML0 */ 430 #define PIO_PA13C_PWMC1_PWML1 (1u << 13) /**< \brief Pwm1 signal: PWMC1_PWML1 */ 431 #define PIO_PD2B_PWMC1_PWML1 (1u << 2) /**< \brief Pwm1 signal: PWMC1_PWML1 */ 432 #define PIO_PA23D_PWMC1_PWML2 (1u << 23) /**< \brief Pwm1 signal: PWMC1_PWML2 */ 433 #define PIO_PD4B_PWMC1_PWML2 (1u << 4) /**< \brief Pwm1 signal: PWMC1_PWML2 */ 434 #define PIO_PA5A_PWMC1_PWML3 (1u << 5) /**< \brief Pwm1 signal: PWMC1_PWML3 */ 435 #define PIO_PD6B_PWMC1_PWML3 (1u << 6) /**< \brief Pwm1 signal: PWMC1_PWML3 */ 436 /* ========== Pio definition for QSPI peripheral ========== */ 437 #define PIO_PA11A_QCS (1u << 11) /**< \brief Qspi signal: QCS */ 438 #define PIO_PA13A_QIO0 (1u << 13) /**< \brief Qspi signal: QIO0 */ 439 #define PIO_PA12A_QIO1 (1u << 12) /**< \brief Qspi signal: QIO1 */ 440 #define PIO_PA17A_QIO2 (1u << 17) /**< \brief Qspi signal: QIO2 */ 441 #define PIO_PD31A_QIO3 (1u << 31) /**< \brief Qspi signal: QIO3 */ 442 #define PIO_PA14A_QSCK (1u << 14) /**< \brief Qspi signal: QSCK */ 443 /* ========== Pio definition for SPI0 peripheral ========== */ 444 #define PIO_PD20B_SPI0_MISO (1u << 20) /**< \brief Spi0 signal: SPI0_MISO */ 445 #define PIO_PD21B_SPI0_MOSI (1u << 21) /**< \brief Spi0 signal: SPI0_MOSI */ 446 #define PIO_PB2D_SPI0_NPCS0 (1u << 2) /**< \brief Spi0 signal: SPI0_NPCS0 */ 447 #define PIO_PA31A_SPI0_NPCS1 (1u << 31) /**< \brief Spi0 signal: SPI0_NPCS1 */ 448 #define PIO_PD25B_SPI0_NPCS1 (1u << 25) /**< \brief Spi0 signal: SPI0_NPCS1 */ 449 #define PIO_PD12C_SPI0_NPCS2 (1u << 12) /**< \brief Spi0 signal: SPI0_NPCS2 */ 450 #define PIO_PD27B_SPI0_NPCS3 (1u << 27) /**< \brief Spi0 signal: SPI0_NPCS3 */ 451 #define PIO_PD22B_SPI0_SPCK (1u << 22) /**< \brief Spi0 signal: SPI0_SPCK */ 452 /* ========== Pio definition for SPI1 peripheral ========== */ 453 #define PIO_PC26C_SPI1_MISO (1u << 26) /**< \brief Spi1 signal: SPI1_MISO */ 454 #define PIO_PC27C_SPI1_MOSI (1u << 27) /**< \brief Spi1 signal: SPI1_MOSI */ 455 #define PIO_PC25C_SPI1_NPCS0 (1u << 25) /**< \brief Spi1 signal: SPI1_NPCS0 */ 456 #define PIO_PC28C_SPI1_NPCS1 (1u << 28) /**< \brief Spi1 signal: SPI1_NPCS1 */ 457 #define PIO_PD0C_SPI1_NPCS1 (1u << 0) /**< \brief Spi1 signal: SPI1_NPCS1 */ 458 #define PIO_PC29C_SPI1_NPCS2 (1u << 29) /**< \brief Spi1 signal: SPI1_NPCS2 */ 459 #define PIO_PD1C_SPI1_NPCS2 (1u << 1) /**< \brief Spi1 signal: SPI1_NPCS2 */ 460 #define PIO_PC30C_SPI1_NPCS3 (1u << 30) /**< \brief Spi1 signal: SPI1_NPCS3 */ 461 #define PIO_PD2C_SPI1_NPCS3 (1u << 2) /**< \brief Spi1 signal: SPI1_NPCS3 */ 462 #define PIO_PC24C_SPI1_SPCK (1u << 24) /**< \brief Spi1 signal: SPI1_SPCK */ 463 /* ========== Pio definition for SSC peripheral ========== */ 464 #define PIO_PA10C_RD (1u << 10) /**< \brief Ssc signal: RD */ 465 #define PIO_PD24B_RF (1u << 24) /**< \brief Ssc signal: RF */ 466 #define PIO_PA22A_RK (1u << 22) /**< \brief Ssc signal: RK */ 467 #define PIO_PB5D_TD (1u << 5) /**< \brief Ssc signal: TD */ 468 #define PIO_PD10C_TD (1u << 10) /**< \brief Ssc signal: TD */ 469 #define PIO_PD26B_TD (1u << 26) /**< \brief Ssc signal: TD */ 470 #define PIO_PB0D_TF (1u << 0) /**< \brief Ssc signal: TF */ 471 #define PIO_PB1D_TK (1u << 1) /**< \brief Ssc signal: TK */ 472 /* ========== Pio definition for TC0 peripheral ========== */ 473 #define PIO_PA4B_TCLK0 (1u << 4) /**< \brief Tc0 signal: TCLK0 */ 474 #define PIO_PA28B_TCLK1 (1u << 28) /**< \brief Tc0 signal: TCLK1 */ 475 #define PIO_PA29B_TCLK2 (1u << 29) /**< \brief Tc0 signal: TCLK2 */ 476 #define PIO_PA0B_TIOA0 (1u << 0) /**< \brief Tc0 signal: TIOA0 */ 477 #define PIO_PA15B_TIOA1 (1u << 15) /**< \brief Tc0 signal: TIOA1 */ 478 #define PIO_PA26B_TIOA2 (1u << 26) /**< \brief Tc0 signal: TIOA2 */ 479 #define PIO_PA1B_TIOB0 (1u << 1) /**< \brief Tc0 signal: TIOB0 */ 480 #define PIO_PA16B_TIOB1 (1u << 16) /**< \brief Tc0 signal: TIOB1 */ 481 #define PIO_PA27B_TIOB2 (1u << 27) /**< \brief Tc0 signal: TIOB2 */ 482 /* ========== Pio definition for TC1 peripheral ========== */ 483 #define PIO_PC25B_TCLK3 (1u << 25) /**< \brief Tc1 signal: TCLK3 */ 484 #define PIO_PC28B_TCLK4 (1u << 28) /**< \brief Tc1 signal: TCLK4 */ 485 #define PIO_PC31B_TCLK5 (1u << 31) /**< \brief Tc1 signal: TCLK5 */ 486 #define PIO_PC23B_TIOA3 (1u << 23) /**< \brief Tc1 signal: TIOA3 */ 487 #define PIO_PC26B_TIOA4 (1u << 26) /**< \brief Tc1 signal: TIOA4 */ 488 #define PIO_PC29B_TIOA5 (1u << 29) /**< \brief Tc1 signal: TIOA5 */ 489 #define PIO_PC24B_TIOB3 (1u << 24) /**< \brief Tc1 signal: TIOB3 */ 490 #define PIO_PC27B_TIOB4 (1u << 27) /**< \brief Tc1 signal: TIOB4 */ 491 #define PIO_PC30B_TIOB5 (1u << 30) /**< \brief Tc1 signal: TIOB5 */ 492 /* ========== Pio definition for TC2 peripheral ========== */ 493 #define PIO_PC7B_TCLK6 (1u << 7) /**< \brief Tc2 signal: TCLK6 */ 494 #define PIO_PC10B_TCLK7 (1u << 10) /**< \brief Tc2 signal: TCLK7 */ 495 #define PIO_PC14B_TCLK8 (1u << 14) /**< \brief Tc2 signal: TCLK8 */ 496 #define PIO_PC5B_TIOA6 (1u << 5) /**< \brief Tc2 signal: TIOA6 */ 497 #define PIO_PC8B_TIOA7 (1u << 8) /**< \brief Tc2 signal: TIOA7 */ 498 #define PIO_PC11B_TIOA8 (1u << 11) /**< \brief Tc2 signal: TIOA8 */ 499 #define PIO_PC6B_TIOB6 (1u << 6) /**< \brief Tc2 signal: TIOB6 */ 500 #define PIO_PC9B_TIOB7 (1u << 9) /**< \brief Tc2 signal: TIOB7 */ 501 #define PIO_PC12B_TIOB8 (1u << 12) /**< \brief Tc2 signal: TIOB8 */ 502 /* ========== Pio definition for TC3 peripheral ========== */ 503 #define PIO_PE5B_TCLK10 (1u << 5) /**< \brief Tc3 signal: TCLK10 */ 504 #define PIO_PD24C_TCLK11 (1u << 24) /**< \brief Tc3 signal: TCLK11 */ 505 #define PIO_PE2B_TCLK9 (1u << 2) /**< \brief Tc3 signal: TCLK9 */ 506 #define PIO_PE3B_TIOA10 (1u << 3) /**< \brief Tc3 signal: TIOA10 */ 507 #define PIO_PD21C_TIOA11 (1u << 21) /**< \brief Tc3 signal: TIOA11 */ 508 #define PIO_PE0B_TIOA9 (1u << 0) /**< \brief Tc3 signal: TIOA9 */ 509 #define PIO_PE4B_TIOB10 (1u << 4) /**< \brief Tc3 signal: TIOB10 */ 510 #define PIO_PD22C_TIOB11 (1u << 22) /**< \brief Tc3 signal: TIOB11 */ 511 #define PIO_PE1B_TIOB9 (1u << 1) /**< \brief Tc3 signal: TIOB9 */ 512 /* ========== Pio definition for TWIHS0 peripheral ========== */ 513 #define PIO_PA4A_TWCK0 (1u << 4) /**< \brief Twihs0 signal: TWCK0 */ 514 #define PIO_PA3A_TWD0 (1u << 3) /**< \brief Twihs0 signal: TWD0 */ 515 /* ========== Pio definition for TWIHS1 peripheral ========== */ 516 #define PIO_PB5A_TWCK1 (1u << 5) /**< \brief Twihs1 signal: TWCK1 */ 517 #define PIO_PB4A_TWD1 (1u << 4) /**< \brief Twihs1 signal: TWD1 */ 518 /* ========== Pio definition for TWIHS2 peripheral ========== */ 519 #define PIO_PD28C_TWCK2 (1u << 28) /**< \brief Twihs2 signal: TWCK2 */ 520 #define PIO_PD27C_TWD2 (1u << 27) /**< \brief Twihs2 signal: TWD2 */ 521 /* ========== Pio definition for UART0 peripheral ========== */ 522 #define PIO_PA9A_URXD0 (1u << 9) /**< \brief Uart0 signal: URXD0 */ 523 #define PIO_PA10A_UTXD0 (1u << 10) /**< \brief Uart0 signal: UTXD0 */ 524 /* ========== Pio definition for UART1 peripheral ========== */ 525 #define PIO_PA5C_URXD1 (1u << 5) /**< \brief Uart1 signal: URXD1 */ 526 #define PIO_PA4C_UTXD1 (1u << 4) /**< \brief Uart1 signal: UTXD1 */ 527 #define PIO_PA6C_UTXD1 (1u << 6) /**< \brief Uart1 signal: UTXD1 */ 528 #define PIO_PD26D_UTXD1 (1u << 26) /**< \brief Uart1 signal: UTXD1 */ 529 /* ========== Pio definition for UART2 peripheral ========== */ 530 #define PIO_PD25C_URXD2 (1u << 25) /**< \brief Uart2 signal: URXD2 */ 531 #define PIO_PD26C_UTXD2 (1u << 26) /**< \brief Uart2 signal: UTXD2 */ 532 /* ========== Pio definition for UART3 peripheral ========== */ 533 #define PIO_PD28A_URXD3 (1u << 28) /**< \brief Uart3 signal: URXD3 */ 534 #define PIO_PD30A_UTXD3 (1u << 30) /**< \brief Uart3 signal: UTXD3 */ 535 #define PIO_PD31B_UTXD3 (1u << 31) /**< \brief Uart3 signal: UTXD3 */ 536 /* ========== Pio definition for UART4 peripheral ========== */ 537 #define PIO_PD18C_URXD4 (1u << 18) /**< \brief Uart4 signal: URXD4 */ 538 #define PIO_PD3C_UTXD4 (1u << 3) /**< \brief Uart4 signal: UTXD4 */ 539 #define PIO_PD19C_UTXD4 (1u << 19) /**< \brief Uart4 signal: UTXD4 */ 540 /* ========== Pio definition for USART0 peripheral ========== */ 541 #define PIO_PB2C_CTS0 (1u << 2) /**< \brief Usart0 signal: CTS0 */ 542 #define PIO_PD0D_DCD0 (1u << 0) /**< \brief Usart0 signal: DCD0 */ 543 #define PIO_PD2D_DSR0 (1u << 2) /**< \brief Usart0 signal: DSR0 */ 544 #define PIO_PD1D_DTR0 (1u << 1) /**< \brief Usart0 signal: DTR0 */ 545 #define PIO_PD3D_RI0 (1u << 3) /**< \brief Usart0 signal: RI0 */ 546 #define PIO_PB3C_RTS0 (1u << 3) /**< \brief Usart0 signal: RTS0 */ 547 #define PIO_PB0C_RXD0 (1u << 0) /**< \brief Usart0 signal: RXD0 */ 548 #define PIO_PB13C_SCK0 (1u << 13) /**< \brief Usart0 signal: SCK0 */ 549 #define PIO_PB1C_TXD0 (1u << 1) /**< \brief Usart0 signal: TXD0 */ 550 /* ========== Pio definition for USART1 peripheral ========== */ 551 #define PIO_PA25A_CTS1 (1u << 25) /**< \brief Usart1 signal: CTS1 */ 552 #define PIO_PA26A_DCD1 (1u << 26) /**< \brief Usart1 signal: DCD1 */ 553 #define PIO_PA28A_DSR1 (1u << 28) /**< \brief Usart1 signal: DSR1 */ 554 #define PIO_PA27A_DTR1 (1u << 27) /**< \brief Usart1 signal: DTR1 */ 555 #define PIO_PA3B_LONCOL1 (1u << 3) /**< \brief Usart1 signal: LONCOL1 */ 556 #define PIO_PA29A_RI1 (1u << 29) /**< \brief Usart1 signal: RI1 */ 557 #define PIO_PA24A_RTS1 (1u << 24) /**< \brief Usart1 signal: RTS1 */ 558 #define PIO_PA21A_RXD1 (1u << 21) /**< \brief Usart1 signal: RXD1 */ 559 #define PIO_PA23A_SCK1 (1u << 23) /**< \brief Usart1 signal: SCK1 */ 560 #define PIO_PB4D_TXD1 (1u << 4) /**< \brief Usart1 signal: TXD1 */ 561 /* ========== Pio definition for USART2 peripheral ========== */ 562 #define PIO_PD19B_CTS2 (1u << 19) /**< \brief Usart2 signal: CTS2 */ 563 #define PIO_PD4D_DCD2 (1u << 4) /**< \brief Usart2 signal: DCD2 */ 564 #define PIO_PD6D_DSR2 (1u << 6) /**< \brief Usart2 signal: DSR2 */ 565 #define PIO_PD5D_DTR2 (1u << 5) /**< \brief Usart2 signal: DTR2 */ 566 #define PIO_PD7D_RI2 (1u << 7) /**< \brief Usart2 signal: RI2 */ 567 #define PIO_PD18B_RTS2 (1u << 18) /**< \brief Usart2 signal: RTS2 */ 568 #define PIO_PD15B_RXD2 (1u << 15) /**< \brief Usart2 signal: RXD2 */ 569 #define PIO_PD17B_SCK2 (1u << 17) /**< \brief Usart2 signal: SCK2 */ 570 #define PIO_PD16B_TXD2 (1u << 16) /**< \brief Usart2 signal: TXD2 */ 571 /* ========== Pio indexes ========== */ 572 #define PIO_PA0_IDX 0 573 #define PIO_PA1_IDX 1 574 #define PIO_PA2_IDX 2 575 #define PIO_PA3_IDX 3 576 #define PIO_PA4_IDX 4 577 #define PIO_PA5_IDX 5 578 #define PIO_PA6_IDX 6 579 #define PIO_PA7_IDX 7 580 #define PIO_PA8_IDX 8 581 #define PIO_PA9_IDX 9 582 #define PIO_PA10_IDX 10 583 #define PIO_PA11_IDX 11 584 #define PIO_PA12_IDX 12 585 #define PIO_PA13_IDX 13 586 #define PIO_PA14_IDX 14 587 #define PIO_PA15_IDX 15 588 #define PIO_PA16_IDX 16 589 #define PIO_PA17_IDX 17 590 #define PIO_PA18_IDX 18 591 #define PIO_PA19_IDX 19 592 #define PIO_PA20_IDX 20 593 #define PIO_PA21_IDX 21 594 #define PIO_PA22_IDX 22 595 #define PIO_PA23_IDX 23 596 #define PIO_PA24_IDX 24 597 #define PIO_PA25_IDX 25 598 #define PIO_PA26_IDX 26 599 #define PIO_PA27_IDX 27 600 #define PIO_PA28_IDX 28 601 #define PIO_PA29_IDX 29 602 #define PIO_PA30_IDX 30 603 #define PIO_PA31_IDX 31 604 #define PIO_PB0_IDX 32 605 #define PIO_PB1_IDX 33 606 #define PIO_PB2_IDX 34 607 #define PIO_PB3_IDX 35 608 #define PIO_PB4_IDX 36 609 #define PIO_PB5_IDX 37 610 #define PIO_PB6_IDX 38 611 #define PIO_PB7_IDX 39 612 #define PIO_PB8_IDX 40 613 #define PIO_PB9_IDX 41 614 #define PIO_PB12_IDX 44 615 #define PIO_PB13_IDX 45 616 #define PIO_PC0_IDX 64 617 #define PIO_PC1_IDX 65 618 #define PIO_PC2_IDX 66 619 #define PIO_PC3_IDX 67 620 #define PIO_PC4_IDX 68 621 #define PIO_PC5_IDX 69 622 #define PIO_PC6_IDX 70 623 #define PIO_PC7_IDX 71 624 #define PIO_PC8_IDX 72 625 #define PIO_PC9_IDX 73 626 #define PIO_PC10_IDX 74 627 #define PIO_PC11_IDX 75 628 #define PIO_PC12_IDX 76 629 #define PIO_PC13_IDX 77 630 #define PIO_PC14_IDX 78 631 #define PIO_PC15_IDX 79 632 #define PIO_PC16_IDX 80 633 #define PIO_PC17_IDX 81 634 #define PIO_PC18_IDX 82 635 #define PIO_PC19_IDX 83 636 #define PIO_PC20_IDX 84 637 #define PIO_PC21_IDX 85 638 #define PIO_PC22_IDX 86 639 #define PIO_PC23_IDX 87 640 #define PIO_PC24_IDX 88 641 #define PIO_PC25_IDX 89 642 #define PIO_PC26_IDX 90 643 #define PIO_PC27_IDX 91 644 #define PIO_PC28_IDX 92 645 #define PIO_PC29_IDX 93 646 #define PIO_PC30_IDX 94 647 #define PIO_PC31_IDX 95 648 #define PIO_PD0_IDX 96 649 #define PIO_PD1_IDX 97 650 #define PIO_PD2_IDX 98 651 #define PIO_PD3_IDX 99 652 #define PIO_PD4_IDX 100 653 #define PIO_PD5_IDX 101 654 #define PIO_PD6_IDX 102 655 #define PIO_PD7_IDX 103 656 #define PIO_PD8_IDX 104 657 #define PIO_PD9_IDX 105 658 #define PIO_PD10_IDX 106 659 #define PIO_PD11_IDX 107 660 #define PIO_PD12_IDX 108 661 #define PIO_PD13_IDX 109 662 #define PIO_PD14_IDX 110 663 #define PIO_PD15_IDX 111 664 #define PIO_PD16_IDX 112 665 #define PIO_PD17_IDX 113 666 #define PIO_PD18_IDX 114 667 #define PIO_PD19_IDX 115 668 #define PIO_PD20_IDX 116 669 #define PIO_PD21_IDX 117 670 #define PIO_PD22_IDX 118 671 #define PIO_PD23_IDX 119 672 #define PIO_PD24_IDX 120 673 #define PIO_PD25_IDX 121 674 #define PIO_PD26_IDX 122 675 #define PIO_PD27_IDX 123 676 #define PIO_PD28_IDX 124 677 #define PIO_PD29_IDX 125 678 #define PIO_PD30_IDX 126 679 #define PIO_PD31_IDX 127 680 #define PIO_PE0_IDX 128 681 #define PIO_PE1_IDX 129 682 #define PIO_PE2_IDX 130 683 #define PIO_PE3_IDX 131 684 #define PIO_PE4_IDX 132 685 #define PIO_PE5_IDX 133 686 687 #endif /* _SAMV71Q20_PIO_ */ 688