xref: /aosp_15_r20/external/coreboot/payloads/libpayload/drivers/pci_io_ops.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /*
2  *
3  * Copyright (C) 2008 Advanced Micro Devices, Inc.
4  * Copyright (C) 2008 coresystems GmbH
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote products
15  *    derived from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #include <libpayload.h>
31 #include <pci.h>
32 
pci_read_config8(pcidev_t dev,u16 reg)33 u8 pci_read_config8(pcidev_t dev, u16 reg)
34 {
35 	outl(dev | (reg & ~3), 0xCF8);
36 	return inb(0xCFC + (reg & 3));
37 }
38 
pci_read_config16(pcidev_t dev,u16 reg)39 u16 pci_read_config16(pcidev_t dev, u16 reg)
40 {
41 	outl(dev | (reg & ~3), 0xCF8);
42 	return inw(0xCFC + (reg & 3));
43 }
44 
pci_read_config32(pcidev_t dev,u16 reg)45 u32 pci_read_config32(pcidev_t dev, u16 reg)
46 {
47 	outl(dev | (reg & ~3), 0xCF8);
48 	return inl(0xCFC + (reg & 3));
49 }
50 
pci_write_config8(pcidev_t dev,u16 reg,u8 val)51 void pci_write_config8(pcidev_t dev, u16 reg, u8 val)
52 {
53 	outl(dev | (reg & ~3), 0xCF8);
54 	outb(val, 0xCFC + (reg & 3));
55 }
56 
pci_write_config16(pcidev_t dev,u16 reg,u16 val)57 void pci_write_config16(pcidev_t dev, u16 reg, u16 val)
58 {
59 	outl(dev | (reg & ~3), 0xCF8);
60 	outw(val, 0xCFC + (reg & 3));
61 }
62 
pci_write_config32(pcidev_t dev,u16 reg,u32 val)63 void pci_write_config32(pcidev_t dev, u16 reg, u32 val)
64 {
65 	outl(dev | (reg & ~3), 0xCF8);
66 	outl(val, 0xCFC + (reg & 3));
67 }
68