1/dts-v1/; 2 3/ { 4 #address-cells = <0x1>; 5 #size-cells = <0x1>; 6 compatible = "xlnx,zynq-7000"; 7 interrupt-parent = <0x1>; 8 model = "Xilinx Zynq ZC706"; 9 10 cpus { 11 #address-cells = <0x1>; 12 #size-cells = <0x0>; 13 14 cpu@0 { 15 compatible = "arm,cortex-a9"; 16 device_type = "cpu"; 17 reg = <0x0>; 18 clocks = <0x2 0x3>; 19 clock-latency = <0x3e8>; 20 cpu0-supply = <0x3>; 21 operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>; 22 }; 23 24 cpu@1 { 25 compatible = "arm,cortex-a9"; 26 device_type = "cpu"; 27 reg = <0x1>; 28 clocks = <0x2 0x3>; 29 }; 30 }; 31 32 fpga-full { 33 compatible = "fpga-region"; 34 fpga-mgr = <0x4>; 35 #address-cells = <0x1>; 36 #size-cells = <0x1>; 37 ranges; 38 }; 39 40 pmu@f8891000 { 41 compatible = "arm,cortex-a9-pmu"; 42 interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>; 43 interrupt-parent = <0x1>; 44 reg = <0xf8891000 0x1000 0xf8893000 0x1000>; 45 }; 46 47 fixedregulator { 48 compatible = "regulator-fixed"; 49 regulator-name = "VCCPINT"; 50 regulator-min-microvolt = <0xf4240>; 51 regulator-max-microvolt = <0xf4240>; 52 regulator-boot-on; 53 regulator-always-on; 54 linux,phandle = <0x3>; 55 phandle = <0x3>; 56 }; 57 58 amba { 59 u-boot,dm-pre-reloc; 60 compatible = "simple-bus"; 61 #address-cells = <0x1>; 62 #size-cells = <0x1>; 63 interrupt-parent = <0x1>; 64 ranges; 65 66 adc@f8007100 { 67 compatible = "xlnx,zynq-xadc-1.00.a"; 68 reg = <0xf8007100 0x20>; 69 interrupts = <0x0 0x7 0x4>; 70 interrupt-parent = <0x1>; 71 clocks = <0x2 0xc>; 72 }; 73 74 can@e0008000 { 75 compatible = "xlnx,zynq-can-1.0"; 76 status = "disabled"; 77 clocks = <0x2 0x13 0x2 0x24>; 78 clock-names = "can_clk", "pclk"; 79 reg = <0xe0008000 0x1000>; 80 interrupts = <0x0 0x1c 0x4>; 81 interrupt-parent = <0x1>; 82 tx-fifo-depth = <0x40>; 83 rx-fifo-depth = <0x40>; 84 }; 85 86 can@e0009000 { 87 compatible = "xlnx,zynq-can-1.0"; 88 status = "disabled"; 89 clocks = <0x2 0x14 0x2 0x25>; 90 clock-names = "can_clk", "pclk"; 91 reg = <0xe0009000 0x1000>; 92 interrupts = <0x0 0x33 0x4>; 93 interrupt-parent = <0x1>; 94 tx-fifo-depth = <0x40>; 95 rx-fifo-depth = <0x40>; 96 }; 97 98 gpio@e000a000 { 99 compatible = "xlnx,zynq-gpio-1.0"; 100 #gpio-cells = <0x2>; 101 clocks = <0x2 0x2a>; 102 gpio-controller; 103 interrupt-controller; 104 #interrupt-cells = <0x2>; 105 interrupt-parent = <0x1>; 106 interrupts = <0x0 0x14 0x4>; 107 reg = <0xe000a000 0x1000>; 108 linux,phandle = <0x6>; 109 phandle = <0x6>; 110 }; 111 112 i2c@e0004000 { 113 compatible = "cdns,i2c-r1p10"; 114 status = "disabled"; 115 clocks = <0x2 0x26>; 116 interrupt-parent = <0x1>; 117 interrupts = <0x0 0x19 0x4>; 118 reg = <0xe0004000 0x1000>; 119 #address-cells = <0x1>; 120 #size-cells = <0x0>; 121 }; 122 123 i2c@e0005000 { 124 compatible = "cdns,i2c-r1p10"; 125 status = "disabled"; 126 clocks = <0x2 0x27>; 127 interrupt-parent = <0x1>; 128 interrupts = <0x0 0x30 0x4>; 129 reg = <0xe0005000 0x1000>; 130 #address-cells = <0x1>; 131 #size-cells = <0x0>; 132 }; 133 134 interrupt-controller@f8f01000 { 135 compatible = "arm,cortex-a9-gic"; 136 #interrupt-cells = <0x3>; 137 interrupt-controller; 138 reg = <0xf8f01000 0x1000 0xf8f00100 0x100>; 139 linux,phandle = <0x1>; 140 phandle = <0x1>; 141 }; 142 143 cache-controller@f8f02000 { 144 compatible = "arm,pl310-cache"; 145 reg = <0xf8f02000 0x1000>; 146 interrupts = <0x0 0x2 0x4>; 147 arm,data-latency = <0x3 0x2 0x2>; 148 arm,tag-latency = <0x2 0x2 0x2>; 149 cache-unified; 150 cache-level = <0x2>; 151 }; 152 153 memory-controller@f8006000 { 154 compatible = "xlnx,zynq-ddrc-a05"; 155 reg = <0xf8006000 0x1000>; 156 }; 157 158 ocmc@f800c000 { 159 compatible = "xlnx,zynq-ocmc-1.0"; 160 interrupt-parent = <0x1>; 161 interrupts = <0x0 0x3 0x4>; 162 reg = <0xf800c000 0x1000>; 163 }; 164 165 serial@e0000000 { 166 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 167 status = "disabled"; 168 clocks = <0x2 0x17 0x2 0x28>; 169 clock-names = "uart_clk", "pclk"; 170 reg = <0xe0000000 0x1000>; 171 interrupts = <0x0 0x1b 0x4>; 172 }; 173 174 serial@e0001000 { 175 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 176 status = "okay"; 177 clocks = <0x2 0x18 0x2 0x29>; 178 clock-names = "uart_clk", "pclk"; 179 reg = <0xe0001000 0x1000>; 180 interrupts = <0x0 0x32 0x4>; 181 }; 182 183 spi@e0006000 { 184 compatible = "xlnx,zynq-spi-r1p6"; 185 reg = <0xe0006000 0x1000>; 186 status = "okay"; 187 interrupt-parent = <0x1>; 188 interrupts = <0x0 0x1a 0x4>; 189 clocks = <0x2 0x19 0x2 0x22>; 190 clock-names = "ref_clk", "pclk"; 191 #address-cells = <0x1>; 192 #size-cells = <0x0>; 193 194 ad9361-phy@0 { 195 compatible = "adi,ad9361"; 196 reg = <0x0>; 197 spi-cpha; 198 spi-max-frequency = <0x989680>; 199 clocks = <0x5 0x0>; 200 clock-names = "ad9361_ext_refclk"; 201 clock-output-names = "rx_sampl_clk", "tx_sampl_clk"; 202 #clock-cells = <0x1>; 203 adi,digital-interface-tune-skip-mode = <0x0>; 204 adi,pp-tx-swap-enable; 205 adi,pp-rx-swap-enable; 206 adi,rx-frame-pulse-mode-enable; 207 adi,lvds-mode-enable; 208 adi,lvds-bias-mV = <0x96>; 209 adi,lvds-rx-onchip-termination-enable; 210 adi,rx-data-delay = <0x4>; 211 adi,tx-fb-clock-delay = <0x7>; 212 adi,dcxo-coarse-and-fine-tune = <0x8 0x1720>; 213 adi,2rx-2tx-mode-enable; 214 adi,frequency-division-duplex-mode-enable; 215 adi,rx-rf-port-input-select = <0x0>; 216 adi,tx-rf-port-input-select = <0x0>; 217 adi,tx-attenuation-mdB = <0x2710>; 218 adi,tx-lo-powerdown-managed-enable; 219 adi,rf-rx-bandwidth-hz = <0x112a880>; 220 adi,rf-tx-bandwidth-hz = <0x112a880>; 221 adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; 222 adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>; 223 adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 224 adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 225 adi,gc-rx1-mode = <0x2>; 226 adi,gc-rx2-mode = <0x2>; 227 adi,gc-adc-ovr-sample-size = <0x4>; 228 adi,gc-adc-small-overload-thresh = <0x2f>; 229 adi,gc-adc-large-overload-thresh = <0x3a>; 230 adi,gc-lmt-overload-high-thresh = <0x320>; 231 adi,gc-lmt-overload-low-thresh = <0x2c0>; 232 adi,gc-dec-pow-measurement-duration = <0x2000>; 233 adi,gc-low-power-thresh = <0x18>; 234 adi,mgc-inc-gain-step = <0x2>; 235 adi,mgc-dec-gain-step = <0x2>; 236 adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>; 237 adi,agc-attack-delay-extra-margin-us = <0x1>; 238 adi,agc-outer-thresh-high = <0x5>; 239 adi,agc-outer-thresh-high-dec-steps = <0x2>; 240 adi,agc-inner-thresh-high = <0xa>; 241 adi,agc-inner-thresh-high-dec-steps = <0x1>; 242 adi,agc-inner-thresh-low = <0xc>; 243 adi,agc-inner-thresh-low-inc-steps = <0x1>; 244 adi,agc-outer-thresh-low = <0x12>; 245 adi,agc-outer-thresh-low-inc-steps = <0x2>; 246 adi,agc-adc-small-overload-exceed-counter = <0xa>; 247 adi,agc-adc-large-overload-exceed-counter = <0xa>; 248 adi,agc-adc-large-overload-inc-steps = <0x2>; 249 adi,agc-lmt-overload-large-exceed-counter = <0xa>; 250 adi,agc-lmt-overload-small-exceed-counter = <0xa>; 251 adi,agc-lmt-overload-large-inc-steps = <0x2>; 252 adi,agc-gain-update-interval-us = <0x3e8>; 253 adi,fagc-dec-pow-measurement-duration = <0x40>; 254 adi,fagc-lp-thresh-increment-steps = <0x1>; 255 adi,fagc-lp-thresh-increment-time = <0x5>; 256 adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>; 257 adi,fagc-final-overrange-count = <0x3>; 258 adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>; 259 adi,fagc-lmt-final-settling-steps = <0x1>; 260 adi,fagc-lock-level = <0xa>; 261 adi,fagc-lock-level-gain-increase-upper-limit = <0x5>; 262 adi,fagc-lock-level-lmt-gain-increase-enable; 263 adi,fagc-lpf-final-settling-steps = <0x1>; 264 adi,fagc-optimized-gain-offset = <0x5>; 265 adi,fagc-power-measurement-duration-in-state5 = <0x40>; 266 adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable; 267 adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>; 268 adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable; 269 adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>; 270 adi,fagc-rst-gla-large-adc-overload-enable; 271 adi,fagc-rst-gla-large-lmt-overload-enable; 272 adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>; 273 adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable; 274 adi,fagc-state-wait-time-ns = <0x104>; 275 adi,fagc-use-last-lock-level-for-set-gain-enable; 276 adi,rssi-restart-mode = <0x3>; 277 adi,rssi-delay = <0x1>; 278 adi,rssi-wait = <0x1>; 279 adi,rssi-duration = <0x3e8>; 280 adi,ctrl-outs-index = <0x0>; 281 adi,ctrl-outs-enable-mask = <0xff>; 282 adi,temp-sense-measurement-interval-ms = <0x3e8>; 283 adi,temp-sense-offset-signed = <0xce>; 284 adi,temp-sense-periodic-measurement-enable; 285 adi,aux-dac-manual-mode-enable; 286 adi,aux-dac1-default-value-mV = <0x0>; 287 adi,aux-dac1-rx-delay-us = <0x0>; 288 adi,aux-dac1-tx-delay-us = <0x0>; 289 adi,aux-dac2-default-value-mV = <0x0>; 290 adi,aux-dac2-rx-delay-us = <0x0>; 291 adi,aux-dac2-tx-delay-us = <0x0>; 292 en_agc-gpios = <0x6 0x62 0x0>; 293 sync-gpios = <0x6 0x63 0x0>; 294 reset-gpios = <0x6 0x64 0x0>; 295 enable-gpios = <0x6 0x65 0x0>; 296 txnrx-gpios = <0x6 0x66 0x0>; 297 linux,phandle = <0x11>; 298 phandle = <0x11>; 299 }; 300 }; 301 302 spi@e0007000 { 303 compatible = "xlnx,zynq-spi-r1p6"; 304 reg = <0xe0007000 0x1000>; 305 status = "okay"; 306 interrupt-parent = <0x1>; 307 interrupts = <0x0 0x31 0x4>; 308 clocks = <0x2 0x1a 0x2 0x23>; 309 clock-names = "ref_clk", "pclk"; 310 #address-cells = <0x1>; 311 #size-cells = <0x0>; 312 313 adf4351-udc-tx-pmod@0 { 314 compatible = "adi,adf4351"; 315 reg = <0x0>; 316 spi-max-frequency = <0x989680>; 317 clocks = <0x7>; 318 clock-names = "clkin"; 319 adi,channel-spacing = <0xf4240>; 320 adi,power-up-frequency = <0x160dc080>; 321 adi,phase-detector-polarity-positive-enable; 322 adi,charge-pump-current = <0x9c4>; 323 adi,output-power = <0x3>; 324 adi,mute-till-lock-enable; 325 adi,muxout-select = <0x6>; 326 gpios = <0x6 0x68 0x0>; 327 }; 328 329 adf4351-udc-rx-pmod@1 { 330 compatible = "adi,adf4351"; 331 reg = <0x1>; 332 spi-max-frequency = <0x989680>; 333 clocks = <0x7>; 334 clock-names = "clkin"; 335 adi,channel-spacing = <0xf4240>; 336 adi,power-up-frequency = <0x1443fd00>; 337 adi,phase-detector-polarity-positive-enable; 338 adi,charge-pump-current = <0x9c4>; 339 adi,output-power = <0x3>; 340 adi,mute-till-lock-enable; 341 adi,muxout-select = <0x6>; 342 gpios = <0x6 0x67 0x0>; 343 }; 344 }; 345 346 spi@e000d000 { 347 clock-names = "ref_clk", "pclk"; 348 clocks = <0x2 0xa 0x2 0x2b>; 349 compatible = "xlnx,zynq-qspi-1.0"; 350 status = "okay"; 351 interrupt-parent = <0x1>; 352 interrupts = <0x0 0x13 0x4>; 353 reg = <0xe000d000 0x1000>; 354 #address-cells = <0x1>; 355 #size-cells = <0x0>; 356 is-dual = <0x1>; 357 num-cs = <0x1>; 358 359 ps7-qspi@0 { 360 #address-cells = <0x1>; 361 #size-cells = <0x1>; 362 spi-tx-bus-width = <0x1>; 363 spi-rx-bus-width = <0x4>; 364 compatible = "n25q128a11"; 365 reg = <0x0>; 366 spi-max-frequency = <0x2faf080>; 367 368 partition@0 { 369 label = "boot"; 370 reg = <0x0 0x500000>; 371 }; 372 373 partition@500000 { 374 label = "bootenv"; 375 reg = <0x500000 0x20000>; 376 }; 377 378 partition@520000 { 379 label = "config"; 380 reg = <0x520000 0x20000>; 381 }; 382 383 partition@540000 { 384 label = "image"; 385 reg = <0x540000 0xa80000>; 386 }; 387 388 partition@fc0000 { 389 label = "spare"; 390 reg = <0xfc0000 0x0>; 391 }; 392 }; 393 }; 394 395 memory-controller@e000e000 { 396 #address-cells = <0x1>; 397 #size-cells = <0x1>; 398 status = "disabled"; 399 clock-names = "memclk", "aclk"; 400 clocks = <0x2 0xb 0x2 0x2c>; 401 compatible = "arm,pl353-smc-r2p1"; 402 interrupt-parent = <0x1>; 403 interrupts = <0x0 0x12 0x4>; 404 ranges; 405 reg = <0xe000e000 0x1000>; 406 407 flash@e1000000 { 408 status = "disabled"; 409 compatible = "arm,pl353-nand-r2p1"; 410 reg = <0xe1000000 0x1000000>; 411 #address-cells = <0x1>; 412 #size-cells = <0x1>; 413 }; 414 415 flash@e2000000 { 416 status = "disabled"; 417 compatible = "cfi-flash"; 418 reg = <0xe2000000 0x2000000>; 419 #address-cells = <0x1>; 420 #size-cells = <0x1>; 421 }; 422 }; 423 424 ethernet@e000b000 { 425 compatible = "cdns,zynq-gem", "cdns,gem"; 426 reg = <0xe000b000 0x1000>; 427 status = "okay"; 428 interrupts = <0x0 0x16 0x4>; 429 clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>; 430 clock-names = "pclk", "hclk", "tx_clk"; 431 #address-cells = <0x1>; 432 #size-cells = <0x0>; 433 phy-handle = <0x8>; 434 phy-mode = "rgmii-id"; 435 436 phy@7 { 437 device_type = "ethernet-phy"; 438 reg = <0x7>; 439 linux,phandle = <0x8>; 440 phandle = <0x8>; 441 }; 442 }; 443 444 ethernet@e000c000 { 445 compatible = "cdns,zynq-gem", "cdns,gem"; 446 reg = <0xe000c000 0x1000>; 447 status = "disabled"; 448 interrupts = <0x0 0x2d 0x4>; 449 clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>; 450 clock-names = "pclk", "hclk", "tx_clk"; 451 #address-cells = <0x1>; 452 #size-cells = <0x0>; 453 }; 454 455 mmc@e0100000 { 456 compatible = "arasan,sdhci-8.9a"; 457 status = "okay"; 458 clock-names = "clk_xin", "clk_ahb"; 459 clocks = <0x2 0x15 0x2 0x20>; 460 interrupt-parent = <0x1>; 461 interrupts = <0x0 0x18 0x4>; 462 reg = <0xe0100000 0x1000>; 463 }; 464 465 mmc@e0101000 { 466 compatible = "arasan,sdhci-8.9a"; 467 status = "disabled"; 468 clock-names = "clk_xin", "clk_ahb"; 469 clocks = <0x2 0x16 0x2 0x21>; 470 interrupt-parent = <0x1>; 471 interrupts = <0x0 0x2f 0x4>; 472 reg = <0xe0101000 0x1000>; 473 }; 474 475 slcr@f8000000 { 476 u-boot,dm-pre-reloc; 477 #address-cells = <0x1>; 478 #size-cells = <0x1>; 479 compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; 480 reg = <0xf8000000 0x1000>; 481 ranges; 482 linux,phandle = <0x9>; 483 phandle = <0x9>; 484 485 clkc@100 { 486 u-boot,dm-pre-reloc; 487 #clock-cells = <0x1>; 488 compatible = "xlnx,ps7-clkc"; 489 fclk-enable = <0xf>; 490 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb"; 491 reg = <0x100 0x100>; 492 ps-clk-frequency = <0x1fca055>; 493 linux,phandle = <0x2>; 494 phandle = <0x2>; 495 }; 496 497 rstc@200 { 498 compatible = "xlnx,zynq-reset"; 499 reg = <0x200 0x48>; 500 #reset-cells = <0x1>; 501 syscon = <0x9>; 502 }; 503 504 pinctrl@700 { 505 compatible = "xlnx,pinctrl-zynq"; 506 reg = <0x700 0x200>; 507 syscon = <0x9>; 508 }; 509 }; 510 511 dmac@f8003000 { 512 compatible = "arm,pl330", "arm,primecell"; 513 reg = <0xf8003000 0x1000>; 514 interrupt-parent = <0x1>; 515 interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7"; 516 interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>; 517 #dma-cells = <0x1>; 518 #dma-channels = <0x8>; 519 #dma-requests = <0x4>; 520 clocks = <0x2 0x1b>; 521 clock-names = "apb_pclk"; 522 linux,phandle = <0xe>; 523 phandle = <0xe>; 524 }; 525 526 devcfg@f8007000 { 527 compatible = "xlnx,zynq-devcfg-1.0"; 528 interrupt-parent = <0x1>; 529 interrupts = <0x0 0x8 0x4>; 530 reg = <0xf8007000 0x100>; 531 clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>; 532 clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3"; 533 syscon = <0x9>; 534 linux,phandle = <0x4>; 535 phandle = <0x4>; 536 }; 537 538 efuse@f800d000 { 539 compatible = "xlnx,zynq-efuse"; 540 reg = <0xf800d000 0x20>; 541 }; 542 543 timer@f8f00200 { 544 compatible = "arm,cortex-a9-global-timer"; 545 reg = <0xf8f00200 0x20>; 546 interrupts = <0x1 0xb 0x301>; 547 interrupt-parent = <0x1>; 548 clocks = <0x2 0x4>; 549 }; 550 551 timer@f8001000 { 552 interrupt-parent = <0x1>; 553 interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>; 554 compatible = "cdns,ttc"; 555 clocks = <0x2 0x6>; 556 reg = <0xf8001000 0x1000>; 557 }; 558 559 timer@f8002000 { 560 interrupt-parent = <0x1>; 561 interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>; 562 compatible = "cdns,ttc"; 563 clocks = <0x2 0x6>; 564 reg = <0xf8002000 0x1000>; 565 }; 566 567 timer@f8f00600 { 568 interrupt-parent = <0x1>; 569 interrupts = <0x1 0xd 0x301>; 570 compatible = "arm,cortex-a9-twd-timer"; 571 reg = <0xf8f00600 0x20>; 572 clocks = <0x2 0x4>; 573 }; 574 575 usb@e0002000 { 576 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 577 status = "okay"; 578 clocks = <0x2 0x1c>; 579 interrupt-parent = <0x1>; 580 interrupts = <0x0 0x15 0x4>; 581 reg = <0xe0002000 0x1000>; 582 phy_type = "ulpi"; 583 dr_mode = "host"; 584 xlnx,phy-reset-gpio = <0x6 0x7 0x0>; 585 }; 586 587 usb@e0003000 { 588 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 589 status = "disabled"; 590 clocks = <0x2 0x1d>; 591 interrupt-parent = <0x1>; 592 interrupts = <0x0 0x2c 0x4>; 593 reg = <0xe0003000 0x1000>; 594 phy_type = "ulpi"; 595 }; 596 597 watchdog@f8005000 { 598 clocks = <0x2 0x2d>; 599 compatible = "cdns,wdt-r1p2"; 600 interrupt-parent = <0x1>; 601 interrupts = <0x0 0x9 0x1>; 602 reg = <0xf8005000 0x1000>; 603 timeout-sec = <0xa>; 604 }; 605 }; 606 607 aliases { 608 ethernet0 = "/amba/ethernet@e000b000"; 609 serial0 = "/amba/serial@e0001000"; 610 }; 611 612 memory { 613 device_type = "memory"; 614 reg = <0x0 0x40000000>; 615 }; 616 617 chosen { 618 bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait"; 619 linux,stdout-path = "/amba@0/uart@E0001000"; 620 }; 621 622 leds { 623 compatible = "gpio-leds"; 624 625 ds8 { 626 label = "ds12:green"; 627 gpios = <0x6 0x3d 0x0>; 628 //gpios = <0x6 7 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3d 629 default-state = "off"; 630 }; 631 632 ds9 { 633 label = "ds15:green"; 634 gpios = <0x6 0x3e 0x0>; 635 //gpios = <0x6 8 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3e 636 default-state = "off"; 637 }; 638 639 ds10 { 640 label = "ds16:green"; 641 gpios = <0x6 0x3f 0x0>; 642 //gpios = <0x6 9 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3f 643 default-state = "off"; 644 }; 645 646 ds35 { 647 label = "ds17:green"; 648 gpios = <0x6 0x40 0x0>; 649 //gpios = <0x6 10 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x40 650 default-state = "on"; 651 }; 652 }; 653 654 gpio_keys { 655 compatible = "gpio-keys"; 656 #address-cells = <0x1>; 657 #size-cells = <0x0>; 658 autorepeat; 659 660 sw7 { 661 label = "Left"; 662 linux,code = <0x69>; 663 gpios = <0x6 0x3a 0x0>; 664 }; 665 666 sw8 { 667 label = "Right"; 668 linux,code = <0x6a>; 669 gpios = <0x6 0x3c 0x0>; 670 }; 671 672 sw9 { 673 label = "Select"; 674 linux,code = <0x1c>; 675 gpios = <0x6 0x3b 0x0>; 676 }; 677 }; 678 679 fpga-axi@0 { 680 compatible = "simple-bus"; 681 #address-cells = <0x1>; 682 #size-cells = <0x1>; 683 ranges; 684 685 i2c@41600000 { 686 compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a"; 687 reg = <0x41600000 0x10000>; 688 interrupt-parent = <0x1>; 689 interrupts = <0x0 0x3a 0x4>; 690 clocks = <0x2 0xf>; 691 clock-names = "pclk"; 692 #address-cells = <0x1>; 693 #size-cells = <0x0>; 694 695 i2cswitch@74 { 696 compatible = "nxp,pca9548"; 697 #address-cells = <0x1>; 698 #size-cells = <0x0>; 699 reg = <0x74>; 700 701 i2c@0 { 702 #address-cells = <0x1>; 703 #size-cells = <0x0>; 704 reg = <0x0>; 705 706 osc@5d { 707 compatible = "si570"; 708 temperature-stability = <0x32>; 709 reg = <0x5d>; 710 factory-fout = <0x9502f90>; 711 initial-fout = <0x8d9ee20>; 712 }; 713 }; 714 715 i2c@1 { 716 #address-cells = <0x1>; 717 #size-cells = <0x0>; 718 reg = <0x1>; 719 720 adv7511 { 721 compatible = "adi,adv7511"; 722 reg = <0x39 0x3f>; 723 reg-names = "primary", "edid"; 724 adi,input-depth = <0x8>; 725 adi,input-colorspace = "rgb"; 726 adi,input-clock = "1x"; 727 adi,clock-delay = <0x0>; 728 #sound-dai-cells = <0x0>; 729 linux,phandle = <0x14>; 730 phandle = <0x14>; 731 732 ports { 733 #address-cells = <0x1>; 734 #size-cells = <0x0>; 735 736 port@0 { 737 reg = <0x0>; 738 739 endpoint { 740 remote-endpoint = <0xa>; 741 linux,phandle = <0xd>; 742 phandle = <0xd>; 743 }; 744 }; 745 746 port@1 { 747 reg = <0x1>; 748 }; 749 }; 750 }; 751 }; 752 753 i2c@2 { 754 #address-cells = <0x1>; 755 #size-cells = <0x0>; 756 reg = <0x2>; 757 758 eeprom@54 { 759 compatible = "at,24c08"; 760 reg = <0x54>; 761 }; 762 }; 763 764 i2c@3 { 765 #address-cells = <0x1>; 766 #size-cells = <0x0>; 767 reg = <0x3>; 768 769 gpio@21 { 770 compatible = "ti,tca6416"; 771 reg = <0x21>; 772 gpio-controller; 773 #gpio-cells = <0x2>; 774 }; 775 }; 776 777 i2c@4 { 778 #address-cells = <0x1>; 779 #size-cells = <0x0>; 780 reg = <0x4>; 781 782 rtc@54 { 783 compatible = "nxp,pcf8563"; 784 reg = <0x51>; 785 }; 786 }; 787 788 i2c@6 { 789 #size-cells = <0x0>; 790 #address-cells = <0x1>; 791 reg = <0x6>; 792 793 ad7291@2f { 794 compatible = "adi,ad7291"; 795 reg = <0x2f>; 796 }; 797 798 eeprom@50 { 799 compatible = "at24,24c02"; 800 reg = <0x50>; 801 }; 802 }; 803 }; 804 }; 805 806 // dma@43000000 { 807 // compatible = "adi,axi-dmac-1.00.a"; 808 // reg = <0x43000000 0x10000>; 809 // #dma-cells = <0x1>; 810 // interrupts = <0x0 0x3b 0x0>; 811 // clocks = <0x2 0x10>; 812 // linux,phandle = <0xb>; 813 // phandle = <0xb>; 814 815 // adi,channels { 816 // #size-cells = <0x0>; 817 // #address-cells = <0x1>; 818 819 // dma-channel@0 { 820 // reg = <0x0>; 821 // adi,source-bus-width = <0x40>; 822 // adi,source-bus-type = <0x0>; 823 // adi,destination-bus-width = <0x40>; 824 // adi,destination-bus-type = <0x1>; 825 // }; 826 // }; 827 // }; 828 829 // axi-clkgen@79000000 { 830 // compatible = "adi,axi-clkgen-2.00.a"; 831 // reg = <0x79000000 0x10000>; 832 // #clock-cells = <0x0>; 833 // clocks = <0x2 0x10>; 834 // linux,phandle = <0xc>; 835 // phandle = <0xc>; 836 // }; 837 838 // axi_hdmi@70e00000 { 839 // compatible = "adi,axi-hdmi-tx-1.00.a"; 840 // reg = <0x70e00000 0x10000>; 841 // dmas = <0xb 0x0>; 842 // dma-names = "video"; 843 // clocks = <0xc>; 844 // adi,is-rgb; 845 846 // port { 847 848 // endpoint { 849 // remote-endpoint = <0xd>; 850 // linux,phandle = <0xa>; 851 // phandle = <0xa>; 852 // }; 853 // }; 854 // }; 855 856 // axi-spdif-tx@75c00000 { 857 // compatible = "adi,axi-spdif-tx-1.00.a"; 858 // reg = <0x75c00000 0x1000>; 859 // dmas = <0xe 0x0>; 860 // dma-names = "tx"; 861 // clocks = <0x2 0xf 0xf>; 862 // clock-names = "axi", "ref"; 863 // #sound-dai-cells = <0x0>; 864 // linux,phandle = <0x13>; 865 // phandle = <0x13>; 866 // }; 867 868 /*axi-sysid-0@45000000 { 869 compatible = "adi,axi-sysid-1.00.a"; 870 reg = <0x45000000 0x10000>; 871 };*/ 872 873 // dma@7c400000 { 874 // compatible = "adi,axi-dmac-1.00.a"; 875 // reg = <0x7c400000 0x10000>; 876 // #dma-cells = <0x1>; 877 // interrupts = <0x0 0x39 0x0>; 878 // clocks = <0x2 0x10>; 879 // linux,phandle = <0x10>; 880 // phandle = <0x10>; 881 882 // adi,channels { 883 // #size-cells = <0x0>; 884 // #address-cells = <0x1>; 885 886 // dma-channel@0 { 887 // reg = <0x0>; 888 // adi,source-bus-width = <0x40>; 889 // adi,source-bus-type = <0x2>; 890 // adi,destination-bus-width = <0x40>; 891 // adi,destination-bus-type = <0x0>; 892 // }; 893 // }; 894 // }; 895 896 // dma@7c420000 { 897 // compatible = "adi,axi-dmac-1.00.a"; 898 // reg = <0x7c420000 0x10000>; 899 // #dma-cells = <0x1>; 900 // interrupts = <0x0 0x38 0x0>; 901 // clocks = <0x2 0x10>; 902 // linux,phandle = <0x12>; 903 // phandle = <0x12>; 904 905 // adi,channels { 906 // #size-cells = <0x0>; 907 // #address-cells = <0x1>; 908 909 // dma-channel@0 { 910 // reg = <0x0>; 911 // adi,source-bus-width = <0x40>; 912 // adi,source-bus-type = <0x0>; 913 // adi,destination-bus-width = <0x40>; 914 // adi,destination-bus-type = <0x2>; 915 // }; 916 // }; 917 // }; 918 919 sdr: sdr { 920 compatible ="sdr,sdr"; 921 dmas = <&rx_dma 1 922 &tx_dma 0>; 923 dma-names = "rx_dma_s2mm", "tx_dma_mm2s"; 924 interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt"; 925 interrupt-parent = <1>; 926 interrupts = <0 29 1 0 30 1 0 33 1 0 34 1>; 927 } ; 928 929 axidmatest_1: axidmatest@1 { 930 compatible ="xlnx,axi-dma-test-1.00.a"; 931 dmas = <&rx_dma 0 932 &rx_dma 1>; 933 dma-names = "axidma0", "axidma1"; 934 } ; 935 936 tx_dma: dma@80400000 { 937 #dma-cells = <1>; 938 clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 939 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 940 compatible = "xlnx,axi-dma-1.00.a"; 941 interrupt-names = "mm2s_introut", "s2mm_introut"; 942 interrupt-parent = <1>; 943 interrupts = <0 35 4 0 36 4>; 944 reg = <0x80400000 0x10000>; 945 xlnx,addrwidth = <0x20>; 946 xlnx,include-sg ; 947 xlnx,sg-length-width = <0xe>; 948 dma-channel@80400000 { 949 compatible = "xlnx,axi-dma-mm2s-channel"; 950 dma-channels = <0x1>; 951 interrupts = <0 35 4>; 952 xlnx,datawidth = <0x40>; 953 xlnx,device-id = <0x0>; 954 }; 955 dma-channel@80400030 { 956 compatible = "xlnx,axi-dma-s2mm-channel"; 957 dma-channels = <0x1>; 958 interrupts = <0 36 4>; 959 xlnx,datawidth = <0x40>; 960 xlnx,device-id = <0x0>; 961 }; 962 }; 963 964 rx_dma: dma@80410000 { 965 #dma-cells = <1>; 966 clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 967 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 968 compatible = "xlnx,axi-dma-1.00.a"; 969 //dma-coherent ; 970 interrupt-names = "mm2s_introut", "s2mm_introut"; 971 interrupt-parent = <1>; 972 interrupts = <0 31 4 0 32 4>; 973 reg = <0x80410000 0x10000>; 974 xlnx,addrwidth = <0x20>; 975 xlnx,include-sg ; 976 xlnx,sg-length-width = <0xe>; 977 dma-channel@80410000 { 978 compatible = "xlnx,axi-dma-mm2s-channel"; 979 dma-channels = <0x1>; 980 interrupts = <0 31 4>; 981 xlnx,datawidth = <0x40>; 982 xlnx,device-id = <0x1>; 983 }; 984 dma-channel@80410030 { 985 compatible = "xlnx,axi-dma-s2mm-channel"; 986 dma-channels = <0x1>; 987 interrupts = <0 32 4>; 988 xlnx,datawidth = <0x40>; 989 xlnx,device-id = <0x1>; 990 }; 991 }; 992 993 tx_intf_0: tx_intf@83c00000 { 994 clock-names = "s00_axi_aclk", "s00_axis_aclk";//, "s01_axis_aclk", "m00_axis_aclk"; 995 clocks = <0x2 0x11>, <0x2 0x11>;//, <0x2 0x11>, <0x2 0x11>; 996 compatible = "sdr,tx_intf"; 997 interrupt-names = "tx_itrpt"; 998 interrupt-parent = <1>; 999 interrupts = <0 34 1>; 1000 reg = <0x83c00000 0x10000>; 1001 xlnx,s00-axi-addr-width = <0x7>; 1002 xlnx,s00-axi-data-width = <0x20>; 1003 }; 1004 1005 rx_intf_0: rx_intf@83c20000 { 1006 clock-names = "s00_axi_aclk", "m00_axis_aclk";//, "s00_axis_aclk"; 1007 clocks = <0x2 0x11>, <0x2 0x11>;//, <0x2 0x11>; 1008 compatible = "sdr,rx_intf"; 1009 interrupt-names = "not_valid_anymore", "rx_pkt_intr"; 1010 interrupt-parent = <1>; 1011 interrupts = <0 29 1 0 30 1>; 1012 reg = <0x83c20000 0x10000>; 1013 xlnx,s00-axi-addr-width = <0x7>; 1014 xlnx,s00-axi-data-width = <0x20>; 1015 }; 1016 1017 openofdm_tx_0: openofdm_tx@83c10000 { 1018 clock-names = "clk"; 1019 clocks = <0x2 0x11>; 1020 compatible = "sdr,openofdm_tx"; 1021 reg = <0x83c10000 0x10000>; 1022 }; 1023 1024 openofdm_rx_0: openofdm_rx@83c30000 { 1025 clock-names = "clk"; 1026 clocks = <0x2 0x11>; 1027 compatible = "sdr,openofdm_rx"; 1028 reg = <0x83c30000 0x10000>; 1029 }; 1030 1031 xpu_0: xpu@83c40000 { 1032 clock-names = "s00_axi_aclk"; 1033 clocks = <0x2 0x11>; 1034 compatible = "sdr,xpu"; 1035 reg = <0x83c40000 0x10000>; 1036 }; 1037 1038 side_ch_0: side_ch@83c50000 { 1039 clock-names = "s00_axi_aclk"; 1040 clocks = <0x2 0x11>; 1041 compatible = "sdr,side_ch"; 1042 reg = <0x83c50000 0x10000>; 1043 dmas = <&rx_dma 0 1044 &tx_dma 1>; 1045 dma-names = "rx_dma_mm2s", "tx_dma_s2mm"; 1046 }; 1047 1048 cf-ad9361-lpc@79020000 { 1049 compatible = "adi,axi-ad9361-6.00.a"; 1050 reg = <0x79020000 0x6000>; 1051 // dmas = <0x10 0x0>; 1052 // dma-names = "rx"; 1053 spibus-connected = <0x11>; 1054 }; 1055 1056 cf-ad9361-dds-core-lpc@79024000 { 1057 compatible = "adi,axi-ad9361-dds-6.00.a"; 1058 reg = <0x79024000 0x1000>; 1059 clocks = <0x11 0xd>; 1060 clock-names = "sampl_clk"; 1061 // dmas = <0x12 0x0>; 1062 // dma-names = "tx"; 1063 }; 1064 1065 mwipcore@43c00000 { 1066 compatible = "mathworks,mwipcore-axi4lite-v1.00"; 1067 reg = <0x43c00000 0xffff>; 1068 }; 1069 }; 1070 1071 audio_clock { 1072 compatible = "fixed-clock"; 1073 #clock-cells = <0x0>; 1074 clock-frequency = <0xbb8000>; 1075 linux,phandle = <0xf>; 1076 phandle = <0xf>; 1077 }; 1078 1079 adv7511_hdmi_snd { 1080 compatible = "simple-audio-card"; 1081 simple-audio-card,name = "HDMI monitor"; 1082 simple-audio-card,widgets = "Speaker", "Speaker"; 1083 simple-audio-card,routing = "Speaker", "TX"; 1084 1085 simple-audio-card,dai-link@0 { 1086 format = "spdif"; 1087 1088 cpu { 1089 sound-dai = <0x13>; 1090 frame-master; 1091 bitclock-master; 1092 }; 1093 1094 codec { 1095 sound-dai = <0x14>; 1096 }; 1097 }; 1098 }; 1099 1100 clocks { 1101 1102 clock@0 { 1103 compatible = "fixed-clock"; 1104 clock-frequency = <0x2625a00>; 1105 clock-output-names = "ad9361_ext_refclk"; 1106 #clock-cells = <0x0>; 1107 linux,phandle = <0x5>; 1108 phandle = <0x5>; 1109 }; 1110 1111 clock@1 { 1112 compatible = "fixed-clock"; 1113 clock-frequency = <0x17d7840>; 1114 clock-output-names = "refclk"; 1115 #clock-cells = <0x0>; 1116 linux,phandle = <0x7>; 1117 phandle = <0x7>; 1118 }; 1119 }; 1120}; 1121