xref: /nrf52832-nimble/nordic/nrfx/drivers/src/nrfx_timer.c (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b)
1 /*
2  * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice, this
9  *    list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * 3. Neither the name of the copyright holder nor the names of its
16  *    contributors may be used to endorse or promote products derived from this
17  *    software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <nrfx.h>
33 
34 #if NRFX_CHECK(NRFX_TIMER_ENABLED)
35 
36 #if !(NRFX_CHECK(NRFX_TIMER0_ENABLED) || NRFX_CHECK(NRFX_TIMER1_ENABLED) || \
37       NRFX_CHECK(NRFX_TIMER2_ENABLED) || NRFX_CHECK(NRFX_TIMER3_ENABLED) || \
38       NRFX_CHECK(NRFX_TIMER4_ENABLED))
39 #error "No enabled TIMER instances. Check <nrfx_config.h>."
40 #endif
41 
42 #include <nrfx_timer.h>
43 
44 #define NRFX_LOG_MODULE TIMER
45 #include <nrfx_log.h>
46 
47 /**@brief Timer control block. */
48 typedef struct
49 {
50     nrfx_timer_event_handler_t handler;
51     void *                     context;
52     nrfx_drv_state_t           state;
53 } timer_control_block_t;
54 
55 static timer_control_block_t m_cb[NRFX_TIMER_ENABLED_COUNT];
56 
nrfx_timer_init(nrfx_timer_t const * const p_instance,nrfx_timer_config_t const * p_config,nrfx_timer_event_handler_t timer_event_handler)57 nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const  p_instance,
58                            nrfx_timer_config_t const * p_config,
59                            nrfx_timer_event_handler_t  timer_event_handler)
60 {
61     timer_control_block_t * p_cb = &m_cb[p_instance->instance_id];
62 #ifdef SOFTDEVICE_PRESENT
63     NRFX_ASSERT(p_instance->p_reg != NRF_TIMER0);
64 #endif
65     NRFX_ASSERT(p_config);
66     NRFX_ASSERT(timer_event_handler);
67 
68     nrfx_err_t err_code;
69 
70     if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED)
71     {
72         err_code = NRFX_ERROR_INVALID_STATE;
73         NRFX_LOG_WARNING("Function: %s, error code: %s.",
74                          __func__,
75                          NRFX_LOG_ERROR_STRING_GET(err_code));
76         return err_code;
77     }
78 
79     /* Warning 685: Relational operator '<=' always evaluates to 'true'"
80      * Warning in NRF_TIMER_IS_BIT_WIDTH_VALID macro. Macro validate timers resolution.
81      * Not necessary in nRF52 based systems. Obligatory in nRF51 based systems.
82      */
83 
84     /*lint -save -e685 */
85 
86     NRFX_ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width));
87 
88     //lint -restore
89 
90     p_cb->handler = timer_event_handler;
91     p_cb->context = p_config->p_context;
92 
93     uint8_t i;
94     for (i = 0; i < p_instance->cc_channel_count; ++i)
95     {
96         nrf_timer_event_clear(p_instance->p_reg,
97                               nrf_timer_compare_event_get(i));
98     }
99 
100     NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg),
101         p_config->interrupt_priority);
102     NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_reg));
103 
104     nrf_timer_mode_set(p_instance->p_reg, p_config->mode);
105     nrf_timer_bit_width_set(p_instance->p_reg, p_config->bit_width);
106     nrf_timer_frequency_set(p_instance->p_reg, p_config->frequency);
107 
108     p_cb->state = NRFX_DRV_STATE_INITIALIZED;
109 
110     err_code = NRFX_SUCCESS;
111     NRFX_LOG_INFO("Function: %s, error code: %s.",
112                   __func__,
113                   NRFX_LOG_ERROR_STRING_GET(err_code));
114     return err_code;
115 }
116 
nrfx_timer_uninit(nrfx_timer_t const * const p_instance)117 void nrfx_timer_uninit(nrfx_timer_t const * const p_instance)
118 {
119     NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg));
120 
121     #define DISABLE_ALL UINT32_MAX
122     nrf_timer_shorts_disable(p_instance->p_reg, DISABLE_ALL);
123     nrf_timer_int_disable(p_instance->p_reg, DISABLE_ALL);
124     #undef DISABLE_ALL
125 
126     nrfx_timer_disable(p_instance);
127 
128     m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_UNINITIALIZED;
129     NRFX_LOG_INFO("Uninitialized instance: %d.", p_instance->instance_id);
130 }
131 
nrfx_timer_enable(nrfx_timer_t const * const p_instance)132 void nrfx_timer_enable(nrfx_timer_t const * const p_instance)
133 {
134     NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED);
135     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
136     m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_POWERED_ON;
137     NRFX_LOG_INFO("Enabled instance: %d.", p_instance->instance_id);
138 }
139 
nrfx_timer_disable(nrfx_timer_t const * const p_instance)140 void nrfx_timer_disable(nrfx_timer_t const * const p_instance)
141 {
142     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
143     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_SHUTDOWN);
144     m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED;
145     NRFX_LOG_INFO("Disabled instance: %d.", p_instance->instance_id);
146 }
147 
nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance)148 bool nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance)
149 {
150     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
151     return (m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON);
152 }
153 
nrfx_timer_resume(nrfx_timer_t const * const p_instance)154 void nrfx_timer_resume(nrfx_timer_t const * const p_instance)
155 {
156     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
157     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
158     NRFX_LOG_INFO("Resumed instance: %d.", p_instance->instance_id);
159 }
160 
nrfx_timer_pause(nrfx_timer_t const * const p_instance)161 void nrfx_timer_pause(nrfx_timer_t const * const p_instance)
162 {
163     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
164     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_STOP);
165     NRFX_LOG_INFO("Paused instance: %d.", p_instance->instance_id);
166 }
167 
nrfx_timer_clear(nrfx_timer_t const * const p_instance)168 void nrfx_timer_clear(nrfx_timer_t const * const p_instance)
169 {
170     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
171     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_CLEAR);
172 }
173 
nrfx_timer_increment(nrfx_timer_t const * const p_instance)174 void nrfx_timer_increment(nrfx_timer_t const * const p_instance)
175 {
176     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
177     NRFX_ASSERT(nrf_timer_mode_get(p_instance->p_reg) != NRF_TIMER_MODE_TIMER);
178 
179     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_COUNT);
180 }
181 
nrfx_timer_capture(nrfx_timer_t const * const p_instance,nrf_timer_cc_channel_t cc_channel)182 uint32_t nrfx_timer_capture(nrfx_timer_t const * const p_instance,
183                             nrf_timer_cc_channel_t     cc_channel)
184 {
185     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
186     NRFX_ASSERT(cc_channel < p_instance->cc_channel_count);
187 
188     nrf_timer_task_trigger(p_instance->p_reg,
189         nrf_timer_capture_task_get(cc_channel));
190     return nrf_timer_cc_read(p_instance->p_reg, cc_channel);
191 }
192 
nrfx_timer_compare(nrfx_timer_t const * const p_instance,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value,bool enable_int)193 void nrfx_timer_compare(nrfx_timer_t const * const p_instance,
194                         nrf_timer_cc_channel_t     cc_channel,
195                         uint32_t                   cc_value,
196                         bool                       enable_int)
197 {
198     nrf_timer_int_mask_t timer_int = nrf_timer_compare_int_get(cc_channel);
199 
200     if (enable_int)
201     {
202         nrf_timer_event_clear(p_instance->p_reg, nrf_timer_compare_event_get(cc_channel));
203         nrf_timer_int_enable(p_instance->p_reg, timer_int);
204     }
205     else
206     {
207         nrf_timer_int_disable(p_instance->p_reg, timer_int);
208     }
209 
210     nrf_timer_cc_write(p_instance->p_reg, cc_channel, cc_value);
211     NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
212                   p_instance->instance_id,
213                   cc_value,
214                   cc_channel);
215 }
216 
nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value,nrf_timer_short_mask_t timer_short_mask,bool enable_int)217 void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,
218                                  nrf_timer_cc_channel_t     cc_channel,
219                                  uint32_t                   cc_value,
220                                  nrf_timer_short_mask_t     timer_short_mask,
221                                  bool                       enable_int)
222 {
223     nrf_timer_shorts_disable(p_instance->p_reg,
224         (TIMER_SHORTS_COMPARE0_STOP_Msk  << cc_channel) |
225         (TIMER_SHORTS_COMPARE0_CLEAR_Msk << cc_channel));
226 
227     nrf_timer_shorts_enable(p_instance->p_reg, timer_short_mask);
228 
229     nrfx_timer_compare(p_instance,
230                        cc_channel,
231                        cc_value,
232                        enable_int);
233     NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
234                   p_instance->instance_id,
235                   cc_value,
236                   cc_channel);
237 }
238 
nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance,uint32_t channel)239 void nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance,
240                                    uint32_t                   channel)
241 {
242     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
243     NRFX_ASSERT(channel < p_instance->cc_channel_count);
244 
245     nrf_timer_event_clear(p_instance->p_reg,
246         nrf_timer_compare_event_get(channel));
247     nrf_timer_int_enable(p_instance->p_reg,
248         nrf_timer_compare_int_get(channel));
249 }
250 
nrfx_timer_compare_int_disable(nrfx_timer_t const * const p_instance,uint32_t channel)251 void nrfx_timer_compare_int_disable(nrfx_timer_t const * const p_instance,
252                                     uint32_t                   channel)
253 {
254     NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
255     NRFX_ASSERT(channel < p_instance->cc_channel_count);
256 
257     nrf_timer_int_disable(p_instance->p_reg,
258         nrf_timer_compare_int_get(channel));
259 }
260 
irq_handler(NRF_TIMER_Type * p_reg,timer_control_block_t * p_cb,uint8_t channel_count)261 static void irq_handler(NRF_TIMER_Type        * p_reg,
262                         timer_control_block_t * p_cb,
263                         uint8_t                 channel_count)
264 {
265     uint8_t i;
266     for (i = 0; i < channel_count; ++i)
267     {
268         nrf_timer_event_t event = nrf_timer_compare_event_get(i);
269         nrf_timer_int_mask_t int_mask = nrf_timer_compare_int_get(i);
270 
271         if (nrf_timer_event_check(p_reg, event) &&
272             nrf_timer_int_enable_check(p_reg, int_mask))
273         {
274             nrf_timer_event_clear(p_reg, event);
275             NRFX_LOG_DEBUG("Compare event, channel: %d.", i);
276             p_cb->handler(event, p_cb->context);
277         }
278     }
279 }
280 
281 #if NRFX_CHECK(NRFX_TIMER0_ENABLED)
nrfx_timer_0_irq_handler(void)282 void nrfx_timer_0_irq_handler(void)
283 {
284     irq_handler(NRF_TIMER0, &m_cb[NRFX_TIMER0_INST_IDX],
285         NRF_TIMER_CC_CHANNEL_COUNT(0));
286 }
287 #endif
288 
289 #if NRFX_CHECK(NRFX_TIMER1_ENABLED)
nrfx_timer_1_irq_handler(void)290 void nrfx_timer_1_irq_handler(void)
291 {
292     irq_handler(NRF_TIMER1, &m_cb[NRFX_TIMER1_INST_IDX],
293         NRF_TIMER_CC_CHANNEL_COUNT(1));
294 }
295 #endif
296 
297 #if NRFX_CHECK(NRFX_TIMER2_ENABLED)
nrfx_timer_2_irq_handler(void)298 void nrfx_timer_2_irq_handler(void)
299 {
300     irq_handler(NRF_TIMER2, &m_cb[NRFX_TIMER2_INST_IDX],
301         NRF_TIMER_CC_CHANNEL_COUNT(2));
302 }
303 #endif
304 
305 #if NRFX_CHECK(NRFX_TIMER3_ENABLED)
nrfx_timer_3_irq_handler(void)306 void nrfx_timer_3_irq_handler(void)
307 {
308     irq_handler(NRF_TIMER3, &m_cb[NRFX_TIMER3_INST_IDX],
309         NRF_TIMER_CC_CHANNEL_COUNT(3));
310 }
311 #endif
312 
313 #if NRFX_CHECK(NRFX_TIMER4_ENABLED)
nrfx_timer_4_irq_handler(void)314 void nrfx_timer_4_irq_handler(void)
315 {
316     irq_handler(NRF_TIMER4, &m_cb[NRFX_TIMER4_INST_IDX],
317         NRF_TIMER_CC_CHANNEL_COUNT(4));
318 }
319 #endif
320 
321 #endif // NRFX_CHECK(NRFX_TIMER_ENABLED)
322