1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #include <acpi/acpi.h> 4 #include <amdblocks/iomap.h> 5 #include <console/console.h> 6 #include <cpu/x86/mp.h> 7 #include <cpu/x86/mtrr.h> 8 #include <cpu/x86/smm.h> 9 #include <device/device.h> 10 #include <types.h> 11 mp_init_cpus(struct bus * cpu_bus)12void mp_init_cpus(struct bus *cpu_bus) 13 { 14 extern const struct mp_ops amd_mp_ops_with_smm; 15 if (mp_init_with_smm(cpu_bus, &amd_mp_ops_with_smm) != CB_SUCCESS) 16 die_with_post_code(POSTCODE_HW_INIT_FAILURE, 17 "mp_init_with_smm failed. Halting.\n"); 18 19 /* pre_mp_init made the flash not cacheable. Reset to WP for performance. */ 20 mtrr_use_temp_range(FLASH_BELOW_4GB_MAPPING_REGION_BASE, 21 FLASH_BELOW_4GB_MAPPING_REGION_SIZE, MTRR_TYPE_WRPROT); 22 23 /* SMMINFO only needs to be set up when booting from S5 */ 24 if (!acpi_is_wakeup_s3()) 25 apm_control(APM_CNT_SMMINFO); 26 } 27