1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <device/device.h>
4 #include <cpu/cpu.h>
5 #include <cpu/x86/mtrr.h>
6 #include <cpu/intel/microcode.h>
7 #include <cpu/x86/cache.h>
8 #include <cpu/intel/l2_cache.h>
9
model_65x_init(struct device * dev)10 static void model_65x_init(struct device *dev)
11 {
12 /* Update the microcode */
13 intel_update_microcode_from_cbfs();
14 /* Initialize L2 cache */
15 p6_configure_l2_cache();
16
17 /* Turn on caching if we haven't already */
18 enable_cache();
19 x86_setup_mtrrs();
20 x86_mtrr_check();
21 };
22
23 static struct device_operations cpu_dev_ops = {
24 .init = model_65x_init,
25 };
26
27 /*
28 * Intel Pentium II Processor Specification Update
29 * http://download.intel.com/design/PentiumII/specupdt/24333749.pdf
30 *
31 * Mobile Intel Pentium II Processor Specification Update
32 * http://download.intel.com/design/intarch/specupdt/24388757.pdf
33 *
34 * Intel Pentium II Xeon Processor Specification Update
35 * http://download.intel.com/support/processors/pentiumii/xeon/24377632.pdf
36 */
37 static const struct cpu_device_id cpu_table[] = {
38 { X86_VENDOR_INTEL, 0x0650, CPUID_EXACT_MATCH_MASK }, /* PII/Celeron, dA0/mdA0/A0 */
39 { X86_VENDOR_INTEL, 0x0651, CPUID_EXACT_MATCH_MASK }, /* PII/Celeron, dA1/A1 */
40 /* PII/Celeron/Xeon, dB0/mdB0/B0 */
41 { X86_VENDOR_INTEL, 0x0652, CPUID_EXACT_MATCH_MASK },
42 { X86_VENDOR_INTEL, 0x0653, CPUID_EXACT_MATCH_MASK }, /* PII/Xeon, dB1/B1 */
43 CPU_TABLE_END
44 };
45
46 static const struct cpu_driver driver __cpu_driver = {
47 .ops = &cpu_dev_ops,
48 .id_table = cpu_table,
49 };
50