1 /*
2 * File : mips_addrspace.h
3 * This file is part of RT-Thread RTOS
4 * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Change Logs:
21 * Date Author Notes
22 * 2016��9��12�� Urey the first version
23 */
24
25 #ifndef _MIPS_ADDRSPACE_H_
26 #define _MIPS_ADDRSPACE_H_
27
28
29 /*
30 * Configure language
31 */
32 #ifdef __ASSEMBLY__
33 #define _ATYPE_
34 #define _ATYPE32_
35 #define _ATYPE64_
36 #define _CONST64_(x) x
37 #else
38 #define _ATYPE_ __PTRDIFF_TYPE__
39 #define _ATYPE32_ int
40 #define _ATYPE64_ __s64
41 #ifdef CONFIG_64BIT
42 #define _CONST64_(x) x ## L
43 #else
44 #define _CONST64_(x) x ## LL
45 #endif
46 #endif
47
48 /*
49 * 32-bit MIPS address spaces
50 */
51 #ifdef __ASSEMBLY__
52 #define _ACAST32_
53 #define _ACAST64_
54 #else
55 #define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */
56 #define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */
57 #endif
58
59 /*
60 * Returns the kernel segment base of a given address
61 */
62 #define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000)
63
64 /*
65 * Returns the physical address of a CKSEGx / XKPHYS address
66 */
67 #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
68 #define XPHYSADDR(a) ((_ACAST64_(a)) & \
69 _CONST64_(0x000000ffffffffff))
70
71 #ifdef CONFIG_64BIT
72
73 /*
74 * Memory segments (64bit kernel mode addresses)
75 * The compatibility segments use the full 64-bit sign extended value. Note
76 * the R8000 doesn't have them so don't reference these in generic MIPS code.
77 */
78 #define XKUSEG _CONST64_(0x0000000000000000)
79 #define XKSSEG _CONST64_(0x4000000000000000)
80 #define XKPHYS _CONST64_(0x8000000000000000)
81 #define XKSEG _CONST64_(0xc000000000000000)
82 #define CKSEG0 _CONST64_(0xffffffff80000000)
83 #define CKSEG1 _CONST64_(0xffffffffa0000000)
84 #define CKSSEG _CONST64_(0xffffffffc0000000)
85 #define CKSEG3 _CONST64_(0xffffffffe0000000)
86
87 #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
88 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
89 #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
90 #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
91
92 #else
93
94 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0BASE)
95 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1BASE)
96 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2BASE)
97 #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3BASE)
98
99 /*
100 * Map an address to a certain kernel segment
101 */
102 #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0BASE)
103 #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1BASE)
104 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2BASE)
105 #define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3BASE)
106
107 /*
108 * Memory segments (32bit kernel mode addresses)
109 * These are the traditional names used in the 32-bit universe.
110 */
111 //#define KUSEGBASE 0x00000000
112 //#define KSEG0BASE 0x80000000
113 //#define KSEG1BASE 0xa0000000
114 //#define KSEG2BASE 0xc0000000
115 //#define KSEG3BASE 0xe0000000
116
117 #define CKUSEG 0x00000000
118 #define CKSEG0 0x80000000
119 #define CKSEG1 0xa0000000
120 #define CKSEG2 0xc0000000
121 #define CKSEG3 0xe0000000
122
123 #endif
124
125 /*
126 * Cache modes for XKPHYS address conversion macros
127 */
128 #define K_CALG_COH_EXCL1_NOL2 0
129 #define K_CALG_COH_SHRL1_NOL2 1
130 #define K_CALG_UNCACHED 2
131 #define K_CALG_NONCOHERENT 3
132 #define K_CALG_COH_EXCL 4
133 #define K_CALG_COH_SHAREABLE 5
134 #define K_CALG_NOTUSED 6
135 #define K_CALG_UNCACHED_ACCEL 7
136
137 /*
138 * 64-bit address conversions
139 */
140 #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
141 #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
142 #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK)
143 #define PHYS_TO_XKPHYS(cm, a) (_CONST64_(0x8000000000000000) | \
144 (_CONST64_(cm) << 59) | (a))
145
146 /*
147 * Returns the uncached address of a sdram address
148 */
149 #ifndef __ASSEMBLY__
150 #if defined(CONFIG_SOC_AU1X00) || defined(CONFIG_TB0229)
151 /* We use a 36 bit physical address map here and
152 cannot access physical memory directly from core */
153 #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
154 #else /* !CONFIG_SOC_AU1X00 */
155 #define UNCACHED_SDRAM(a) CKSEG1ADDR(a)
156 #endif /* CONFIG_SOC_AU1X00 */
157 #endif /* __ASSEMBLY__ */
158
159 /*
160 * The ultimate limited of the 64-bit MIPS architecture: 2 bits for selecting
161 * the region, 3 bits for the CCA mode. This leaves 59 bits of which the
162 * R8000 implements most with its 48-bit physical address space.
163 */
164 #define TO_PHYS_MASK _CONST64_(0x07ffffffffffffff) /* 2^^59 - 1 */
165
166 #ifndef CONFIG_CPU_R8000
167
168 /*
169 * The R8000 doesn't have the 32-bit compat spaces so we don't define them
170 * in order to catch bugs in the source code.
171 */
172
173 #define COMPAT_K1BASE32 _CONST64_(0xffffffffa0000000)
174 #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
175
176 #endif
177
178 #define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK)
179 #define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE)
180
181
182 #ifndef __ASSEMBLY__
183 /*
184 * Change virtual addresses to physical addresses and vv.
185 * These are trivial on the 1:1 Linux/MIPS mapping
186 */
virt_to_phys(volatile void * address)187 static inline phys_addr_t virt_to_phys(volatile void * address)
188 {
189 #ifndef CONFIG_64BIT
190 return CPHYSADDR(address);
191 #else
192 return XPHYSADDR(address);
193 #endif
194 }
195
phys_to_virt(unsigned long address)196 static inline void * phys_to_virt(unsigned long address)
197 {
198 #ifndef CONFIG_64BIT
199 return (void *)KSEG0ADDR(address);
200 #else
201 return (void *)CKSEG0ADDR(address);
202 #endif
203 }
204 #endif
205
206
207 #endif /* _MIPS_ADDRSPACE_H_ */
208