1 /*
2 * Copyright (c) 2024, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 //!
24 //! \file mhw_vebox_xe2_hpm_next_impl.h
25 //! \brief MHW vebox interface common base for Xe2_HPM
26 //! \details
27 //!
28
29 #ifndef __MHW_VEBOX_XE2_HPM_NEXT_IMPL_H__
30 #define __MHW_VEBOX_XE2_HPM_NEXT_IMPL_H__
31
32 #include "mhw_vebox.h"
33 #include "mhw_vebox_impl.h"
34 #include "mhw_vebox_hwcmd_xe2_hpm_next.h"
35 #include "mhw_vebox_itf.h"
36 #include "mhw_impl.h"
37 #include "mos_solo_generic.h"
38
39 namespace mhw
40 {
41 namespace vebox
42 {
43 namespace xe2_hpm_next
44 {
45 class Impl : public vebox::Impl<mhw::vebox::xe2_hpm_next::Cmd>
46 {
47 public:
Impl(PMOS_INTERFACE osItf)48 Impl(PMOS_INTERFACE osItf) : base_t(osItf)
49 {
50 MHW_FUNCTION_ENTER;
51
52 if (osItf && osItf->pfnGetSkuTable)
53 {
54 MEDIA_FEATURE_TABLE* m_skuTable = osItf->pfnGetSkuTable(osItf);
55
56 if (m_skuTable)
57 {
58 m_veboxScalabilitywith4K = MEDIA_IS_SKU(m_skuTable, FtrVeboxScalabilitywith4K);
59 }
60 else
61 {
62 MHW_ASSERTMESSAGE("m_skuTable is null ptr");
63 }
64 }
65 else
66 {
67 MHW_ASSERTMESSAGE("pOsInterface or pfnGetSkuTable is null ptr");
68 }
69 };
70
IecpStateInitialization(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD * pVeboxIecpState)71 MOS_STATUS IecpStateInitialization(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState)
72 {
73 MHW_FUNCTION_ENTER;
74
75 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD IecpState;
76 *pVeboxIecpState = IecpState;
77
78 // Re-set the values
79 pVeboxIecpState->StdSteState.DW5.InvMarginVyl = 3300;
80 pVeboxIecpState->StdSteState.DW5.InvSkinTypesMargin = 1638;
81 pVeboxIecpState->StdSteState.DW12.B3U = 140;
82 pVeboxIecpState->StdSteState.DW27.Hues0Dark = 256;
83 pVeboxIecpState->StdSteState.DW27.Hues1Dark = 0;
84
85 pVeboxIecpState->AceState.DW0.LaceHistogramSize = 1;
86
87 pVeboxIecpState->TccState.DW0.Satfactor1 = 160;
88 pVeboxIecpState->TccState.DW0.Satfactor2 = 160;
89 pVeboxIecpState->TccState.DW0.Satfactor3 = 160;
90 pVeboxIecpState->TccState.DW1.Satfactor4 = 160;
91 pVeboxIecpState->TccState.DW1.Satfactor5 = 160;
92 pVeboxIecpState->TccState.DW1.Satfactor6 = 160;
93
94 pVeboxIecpState->GamutState.DW2.CmS = 640;
95 pVeboxIecpState->GamutState.DW3.AG = 26;
96 pVeboxIecpState->GamutState.DW4.AB = 26;
97 pVeboxIecpState->GamutState.DW5.RS = 768;
98 pVeboxIecpState->GamutState.DW6.CmI = 192;
99 pVeboxIecpState->GamutState.DW7.RI = 128;
100
101 return MOS_STATUS_SUCCESS;
102 }
103
IecpStateInitializationforFDFB(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD * pVeboxIecpState)104 MOS_STATUS IecpStateInitializationforFDFB(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState)
105 {
106 MHW_FUNCTION_ENTER;
107
108 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD IecpState;
109 *pVeboxIecpState = IecpState;
110
111 // Re-set the values
112 pVeboxIecpState->StdSteState.DW0.StdEnable = 1;
113 pVeboxIecpState->StdSteState.DW0.OutputControl = 1;
114 pVeboxIecpState->StdSteState.DW1.StdScoreOutput = 0;
115 pVeboxIecpState->StdSteState.DW3.VyStdEnable = 1;
116 pVeboxIecpState->StdSteState.DW5.InvSkinTypesMargin = 20;
117 pVeboxIecpState->AceState.DW0.AceEnable = 0;
118 pVeboxIecpState->AceState.DW0.LaceHistogramEnable = 1;
119
120 pVeboxIecpState->StdSteState.DW5.InvMarginVyl = 3300;
121 pVeboxIecpState->StdSteState.DW5.InvSkinTypesMargin = 1638;
122 pVeboxIecpState->StdSteState.DW12.B3U = 140;
123 pVeboxIecpState->StdSteState.DW15.Satp1 = 122;
124 pVeboxIecpState->StdSteState.DW15.Satb1 = 1016;
125 pVeboxIecpState->StdSteState.DW19.Hueb1 = 1016;
126 pVeboxIecpState->StdSteState.DW27.Hues0Dark = 256;
127 pVeboxIecpState->StdSteState.DW27.Hues1Dark = 0;
128
129 pVeboxIecpState->TccState.DW0.Satfactor1 = 160;
130 pVeboxIecpState->TccState.DW0.Satfactor2 = 160;
131 pVeboxIecpState->TccState.DW0.Satfactor3 = 160;
132 pVeboxIecpState->TccState.DW1.Satfactor4 = 160;
133 pVeboxIecpState->TccState.DW1.Satfactor5 = 160;
134 pVeboxIecpState->TccState.DW1.Satfactor6 = 160;
135
136 pVeboxIecpState->AlphaAoiState.DW1.AoiMaxX = 0;
137 pVeboxIecpState->AlphaAoiState.DW2.AoiMaxY = 0;
138
139 return MOS_STATUS_SUCCESS;
140 }
141
142 //!
143 //! \brief Set Vebox Iecp State FECSC
144 //! \details Set Front-End CSC part of the VEBOX IECP States
145 //! \param [in] pVeboxIecpState
146 //! Pointer to VEBOX IECP States
147 //! \param [in] pVeboxIecpParams
148 //! Pointer to VEBOX IECP State Params
149 //! \return void
150 //!
SetVeboxIecpStateFecsc(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_FRONT_END_CSC_STATE_CMD * pVeboxFecscState,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)151 void SetVeboxIecpStateFecsc(
152 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_FRONT_END_CSC_STATE_CMD *pVeboxFecscState,
153 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
154 {
155 MHW_FUNCTION_ENTER;
156
157 MHW_CAPPIPE_PARAMS *pCapPipeParams = nullptr;
158
159 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxFecscState);
160 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpParams);
161
162 pCapPipeParams = &pVeboxIecpParams->CapPipeParams;
163 MHW_CHK_NULL_NO_STATUS_RETURN(pCapPipeParams);
164 MHW_ASSERT(pCapPipeParams->bActive);
165
166 #define SET_COEFS(_c0, _c1, _c2, _c3, _c4, _c5, _c6, _c7, _c8) \
167 { \
168 pVeboxFecscState->DW0.FecscC0TransformCoefficient = _c0; \
169 pVeboxFecscState->DW1.FecscC1TransformCoefficient = _c1; \
170 pVeboxFecscState->DW2.FecscC2TransformCoefficient = _c2; \
171 pVeboxFecscState->DW3.FecscC3TransformCoefficient = _c3; \
172 pVeboxFecscState->DW4.FecscC4TransformCoefficient = _c4; \
173 pVeboxFecscState->DW5.FecscC5TransformCoefficient = _c5; \
174 pVeboxFecscState->DW6.FecscC6TransformCoefficient = _c6; \
175 pVeboxFecscState->DW7.FecscC7TransformCoefficient = _c7; \
176 pVeboxFecscState->DW8.FecscC8TransformCoefficient = _c8; \
177 }
178
179 #define SET_INPUT_OFFSETS(_in1, _in2, _in3) \
180 { \
181 pVeboxFecscState->DW9.FecScOffsetIn1OffsetInForYR = _in1; \
182 pVeboxFecscState->DW10.FecScOffsetIn2OffsetOutForUG = _in2; \
183 pVeboxFecscState->DW11.FecScOffsetIn3OffsetOutForVB = _in3; \
184 }
185
186 #define SET_OUTPUT_OFFSETS(_out1, _out2, _out3) \
187 { \
188 pVeboxFecscState->DW9.FecScOffsetOut1OffsetOutForYR = _out1; \
189 pVeboxFecscState->DW10.FecScOffsetOut2OffsetOutForUG = _out2; \
190 pVeboxFecscState->DW11.FecScOffsetOut3OffsetOutForVB = _out3; \
191 }
192
193 pVeboxFecscState->DW0.FrontEndCscTransformEnable = true;
194
195 if (pCapPipeParams->FECSCParams.bActive)
196 {
197 // Coeff is S2.16, so multiply the floating value by 65536
198 SET_COEFS(
199 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[0][0] * 65536)),
200 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[0][1] * 65536)),
201 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[0][2] * 65536)),
202 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[1][0] * 65536)),
203 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[1][1] * 65536)),
204 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[1][2] * 65536)),
205 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[2][0] * 65536)),
206 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[2][1] * 65536)),
207 ((uint32_t)(pCapPipeParams->FECSCParams.Matrix[2][2] * 65536)));
208 SET_INPUT_OFFSETS(
209 ((uint32_t)pCapPipeParams->FECSCParams.PreOffset[0]),
210 ((uint32_t)pCapPipeParams->FECSCParams.PreOffset[1]),
211 ((uint32_t)pCapPipeParams->FECSCParams.PreOffset[2]));
212 SET_OUTPUT_OFFSETS(
213 ((uint32_t)pCapPipeParams->FECSCParams.PostOffset[0]),
214 ((uint32_t)pCapPipeParams->FECSCParams.PostOffset[1]),
215 ((uint32_t)pCapPipeParams->FECSCParams.PostOffset[2]));
216 }
217 else if (pVeboxIecpParams->bFeCSCEnable)
218 {
219 // Coeff is S2.16, so multiply the floating value by 65536
220 SET_COEFS(
221 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[0] * 65536)),
222 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[1] * 65536)),
223 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[2] * 65536)),
224 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[3] * 65536)),
225 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[4] * 65536)),
226 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[5] * 65536)),
227 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[6] * 65536)),
228 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[7] * 65536)),
229 ((uint32_t)(pVeboxIecpParams->pfFeCscCoeff[8] * 65536)));
230 SET_INPUT_OFFSETS(
231 ((uint32_t)(pVeboxIecpParams->pfFeCscInOffset[0] * 128.0F)),
232 ((uint32_t)(pVeboxIecpParams->pfFeCscInOffset[1] * 128.0F)),
233 ((uint32_t)(pVeboxIecpParams->pfFeCscInOffset[2] * 128.0F)));
234 SET_OUTPUT_OFFSETS(
235 ((uint32_t)(pVeboxIecpParams->pfFeCscOutOffset[0] * 128.0F)),
236 ((uint32_t)(pVeboxIecpParams->pfFeCscOutOffset[1] * 128.0F)),
237 ((uint32_t)(pVeboxIecpParams->pfFeCscOutOffset[2] * 128.0F)));
238 }
239 else if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT601)
240 {
241 SET_COEFS(16843, 33030, 6423, MOS_BITFIELD_VALUE((uint32_t)-9698, 19), MOS_BITFIELD_VALUE((uint32_t)-19070, 19), 28770, 28770, MOS_BITFIELD_VALUE((uint32_t)-24116, 19), MOS_BITFIELD_VALUE((uint32_t)-4652, 19));
242 SET_INPUT_OFFSETS(0, 0, 0);
243 SET_OUTPUT_OFFSETS(2048, 16384, 16384);
244 }
245 else if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709)
246 {
247 SET_COEFS(11993, 40239, 4063, MOS_BITFIELD_VALUE((uint32_t)-6618, 19), MOS_BITFIELD_VALUE((uint32_t)-22216, 19), 28770, 28770, MOS_BITFIELD_VALUE((uint32_t)-26148, 19), MOS_BITFIELD_VALUE((uint32_t)-2620, 19));
248 SET_INPUT_OFFSETS(0, 0, 0);
249 SET_OUTPUT_OFFSETS(2048, 16384, 16384);
250 }
251 else if (pVeboxIecpParams->ColorSpace == MHW_CSpace_sRGB)
252 {
253 SET_COEFS(13932, 46871, 4731, MOS_BITFIELD_VALUE((uint32_t)-7508, 19), MOS_BITFIELD_VALUE((uint32_t)-25260, 19), 32768, 32768, MOS_BITFIELD_VALUE((uint32_t)-29764, 19), MOS_BITFIELD_VALUE((uint32_t)-3005, 19));
254 SET_INPUT_OFFSETS(0, 0, 0);
255 SET_OUTPUT_OFFSETS(0, 16384, 16384);
256 }
257 else
258 {
259 MHW_ASSERT(0);
260 }
261
262 #undef SET_COEFS
263 #undef SET_INPUT_OFFSETS
264 #undef SET_OUTPUT_OFFSETS
265 }
266
SetVeboxIecpStateBecsc(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD * pVeboxIecpState,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,bool bEnableFECSC)267 MOS_STATUS SetVeboxIecpStateBecsc(
268 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState,
269 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
270 bool bEnableFECSC)
271 {
272 MHW_FUNCTION_ENTER;
273
274 MHW_CAPPIPE_PARAMS *m_capPipeParams = nullptr;
275 MOS_FORMAT dstFormat;
276
277 MHW_CHK_NULL_RETURN(pVeboxIecpState);
278 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
279
280 m_capPipeParams = &pVeboxIecpParams->CapPipeParams;
281 dstFormat = pVeboxIecpParams->dstFormat;
282
283 #define SET_COEFS(_c0, _c1, _c2, _c3, _c4, _c5, _c6, _c7, _c8) \
284 { \
285 pVeboxIecpState->CscState.DW0.C0 = _c0; \
286 pVeboxIecpState->CscState.DW1.C1 = _c1; \
287 pVeboxIecpState->CscState.DW2.C2 = _c2; \
288 pVeboxIecpState->CscState.DW3.C3 = _c3; \
289 pVeboxIecpState->CscState.DW4.C4 = _c4; \
290 pVeboxIecpState->CscState.DW5.C5 = _c5; \
291 pVeboxIecpState->CscState.DW6.C6 = _c6; \
292 pVeboxIecpState->CscState.DW7.C7 = _c7; \
293 pVeboxIecpState->CscState.DW8.C8 = _c8; \
294 }
295
296 #define SET_INPUT_OFFSETS(_in1, _in2, _in3) \
297 { \
298 pVeboxIecpState->CscState.DW9.OffsetIn1 = _in1; \
299 pVeboxIecpState->CscState.DW10.OffsetIn2 = _in2; \
300 pVeboxIecpState->CscState.DW11.OffsetIn3 = _in3; \
301 }
302
303 #define SET_OUTPUT_OFFSETS(_out1, _out2, _out3) \
304 { \
305 pVeboxIecpState->CscState.DW9.OffsetOut1 = _out1; \
306 pVeboxIecpState->CscState.DW10.OffsetOut2 = _out2; \
307 pVeboxIecpState->CscState.DW11.OffsetOut3 = _out3; \
308 }
309
310 MHW_CHK_NULL_RETURN(m_capPipeParams);
311 if (m_capPipeParams->bActive)
312 {
313 // Application controlled CSC operation
314 if (m_capPipeParams->BECSCParams.bActive)
315 {
316 pVeboxIecpState->CscState.DW0.TransformEnable = true;
317
318 // Coeff is S2.16, so multiply the floating value by 65536
319 SET_COEFS(
320 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[0][0] * 65536)),
321 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[0][1] * 65536)),
322 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[0][2] * 65536)),
323 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[1][0] * 65536)),
324 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[1][1] * 65536)),
325 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[1][2] * 65536)),
326 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[2][0] * 65536)),
327 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[2][1] * 65536)),
328 ((uint32_t)(m_capPipeParams->BECSCParams.Matrix[2][2] * 65536)));
329 SET_INPUT_OFFSETS(
330 ((uint32_t)m_capPipeParams->BECSCParams.PreOffset[0]),
331 ((uint32_t)m_capPipeParams->BECSCParams.PreOffset[1]),
332 ((uint32_t)m_capPipeParams->BECSCParams.PreOffset[2]));
333 SET_OUTPUT_OFFSETS(
334 ((uint32_t)m_capPipeParams->BECSCParams.PostOffset[0]),
335 ((uint32_t)m_capPipeParams->BECSCParams.PostOffset[1]),
336 ((uint32_t)m_capPipeParams->BECSCParams.PostOffset[2]));
337 }
338 // YUV 4:4:4 CSC to xBGR or xRGB
339 else if ((bEnableFECSC || (pVeboxIecpParams->srcFormat == Format_AYUV)) &&
340 (IS_RGB_FORMAT(dstFormat)))
341 {
342 pVeboxIecpState->CscState.DW0.TransformEnable = true;
343
344 // CSC matrix to convert YUV 4:4:4 to xBGR. e.g. Format_A8B8G8R8. In the
345 // event that dstFormat is xRGB, driver sets R & B channel swapping via
346 // CscState.DW0.YuvChannelSwap so a separate matrix is not needed.
347
348 if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT601)
349 {
350 SET_COEFS(76284, 0, 104595, 76284, MOS_BITFIELD_VALUE((uint32_t)-25689, 19), MOS_BITFIELD_VALUE((uint32_t)-53280, 19), 76284, 132186, 0);
351
352 SET_INPUT_OFFSETS(MOS_BITFIELD_VALUE((uint32_t)-2048, 16),
353 MOS_BITFIELD_VALUE((uint32_t)-16384, 16),
354 MOS_BITFIELD_VALUE((uint32_t)-16384, 16));
355 SET_OUTPUT_OFFSETS(0, 0, 0);
356 }
357 else if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709)
358 {
359 SET_COEFS(76284, 0, 117506, 76284, MOS_BITFIELD_VALUE((uint32_t)-13958, 19), MOS_BITFIELD_VALUE((uint32_t)-34930, 19), 76284, 138412, 0);
360
361 SET_INPUT_OFFSETS(MOS_BITFIELD_VALUE((uint32_t)-2048, 16),
362 MOS_BITFIELD_VALUE((uint32_t)-16384, 16),
363 MOS_BITFIELD_VALUE((uint32_t)-16384, 16));
364 SET_OUTPUT_OFFSETS(0, 0, 0);
365 }
366 else
367 {
368 MHW_ASSERT(false);
369 }
370 }
371 }
372 else if (pVeboxIecpParams->bCSCEnable)
373 {
374 pVeboxIecpState->CscState.DW0.TransformEnable = true;
375
376 // Coeff is S2.16, so multiply the floating value by 65536
377 SET_COEFS(
378 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[0] * 65536.0F)),
379 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[1] * 65536.0F)),
380 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[2] * 65536.0F)),
381 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[3] * 65536.0F)),
382 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[4] * 65536.0F)),
383 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[5] * 65536.0F)),
384 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[6] * 65536.0F)),
385 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[7] * 65536.0F)),
386 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[8] * 65536.0F)));
387
388 // Offset is S15, but the SW offsets are calculated as 8bits,
389 // so left shift them 7bits to be in the position of MSB
390 SET_INPUT_OFFSETS(
391 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[0] * 128.0F)),
392 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[1] * 128.0F)),
393 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[2] * 128.0F)));
394 SET_OUTPUT_OFFSETS(
395 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[0] * 128.0F)),
396 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[1] * 128.0F)),
397 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[2] * 128.0F)));
398 }
399
400 pVeboxIecpState->AlphaAoiState.DW0.AlphaFromStateSelect = pVeboxIecpParams->bAlphaEnable;
401
402 if (pVeboxIecpParams->dstFormat == Format_Y416)
403 {
404 pVeboxIecpState->AlphaAoiState.DW0.ColorPipeAlpha = pVeboxIecpParams->wAlphaValue;
405 }
406 else
407 {
408 // Alpha is U16, but the SW alpha is calculated as 8bits,
409 // so left shift it 8bits to be in the position of MSB
410 pVeboxIecpState->AlphaAoiState.DW0.ColorPipeAlpha = pVeboxIecpParams->wAlphaValue * 256;
411 }
412
413 #undef SET_COEFS
414 #undef SET_INPUT_OFFSETS
415 #undef SET_OUTPUT_OFFSETS
416
417 return MOS_STATUS_SUCCESS;
418 }
419
420 //!
421 //! \brief Set Vebox Iecp State Color Correction Matrix
422 //! \details Set Color Correction Matrix of the VEBOX IECP States
423 //! \param [in] pVeboxIecpState
424 //! Pointer to VEBOX IECP States
425 //! \param [in] pCapPipeParams
426 //! Pointer to Capture Pipe Params
427 //! \param [in] const unsigned int uCoeffValue
428 //! the coeffs's miltiply floating value.
429 //! Coeff is S4.12, then multiply the floating value by 4096
430 //! Coeff is S4.16, then multiply the floating value by 65536
431 //! \return void
432 //!
SetVeboxIecpStateCcm(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD * pVeboxIecpState,PMHW_CAPPIPE_PARAMS pCapPipeParams,const unsigned int uCoeffValue)433 void SetVeboxIecpStateCcm(
434 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD* pVeboxIecpState,
435 PMHW_CAPPIPE_PARAMS pCapPipeParams,
436 const unsigned int uCoeffValue)
437 {
438 MHW_FUNCTION_ENTER;
439
440 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_CCM_STATE_CMD *pCcm = nullptr;
441
442 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpState);
443 MHW_CHK_NULL_NO_STATUS_RETURN(pCapPipeParams);
444
445 pCcm = &pVeboxIecpState->CcmState;
446
447 if (pCapPipeParams->ColorCorrectionParams.bActive)
448 {
449 MHW_CHK_NULL_NO_STATUS_RETURN(pCcm);
450 pCcm->DW0.ColorCorrectionMatrixEnable = true;
451
452 pCcm->DW0.C1 =
453 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[0][1] * uCoeffValue);
454 pCcm->DW1.C0 =
455 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[0][0] * uCoeffValue);
456 pCcm->DW2.C3 =
457 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[1][0] * uCoeffValue);
458 pCcm->DW3.C2 =
459 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[0][2] * uCoeffValue);
460 pCcm->DW4.C5 =
461 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[1][2] * uCoeffValue);
462 pCcm->DW5.C4 =
463 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[1][1] * uCoeffValue);
464 pCcm->DW6.C7 =
465 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[2][1] * uCoeffValue);
466 pCcm->DW7.C6 =
467 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[2][0] * uCoeffValue);
468 pCcm->DW8.C8 =
469 (uint32_t)(pCapPipeParams->ColorCorrectionParams.CCM[2][2] * uCoeffValue);
470 }
471 }
472
473 //!
474 //! \brief Set Vebox Iecp State ProcAmp
475 //! \details Set ProcAmp part of the VEBOX IECP States
476 //! \param [in] pVeboxProcampState
477 //! Pointer to VEBOX IECP Procamp States
478 //! \param [in] pProcAmpParams
479 //! Pointer to ProcAmp Params
480 //! \return void
481 //!
SetVeboxIecpStateProcAmp(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_PROCAMP_STATE_CMD * pVeboxProcampState,PMHW_PROCAMP_PARAMS pProcAmpParams)482 void SetVeboxIecpStateProcAmp(
483 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_PROCAMP_STATE_CMD *pVeboxProcampState,
484 PMHW_PROCAMP_PARAMS pProcAmpParams)
485 {
486 MHW_FUNCTION_ENTER;
487
488 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxProcampState);
489 MHW_CHK_NULL_NO_STATUS_RETURN(pProcAmpParams);
490
491 pVeboxProcampState->DW0.ProcampEnable = true;
492 pVeboxProcampState->DW0.Brightness = pProcAmpParams->brightness; // S7.4
493 pVeboxProcampState->DW0.Contrast = pProcAmpParams->contrast; // U4.7
494 pVeboxProcampState->DW1.SinCS = pProcAmpParams->sinCS; // S7.8
495 pVeboxProcampState->DW1.CosCS = pProcAmpParams->cosCS; // S7.8
496 }
497
498 //!
499 //! \brief Add VEBOX Capture pipe state
500 //! \details Add VEBOX Capture pipe state
501 //! \param [in] pCapPipeParams
502 //! Pointer to capture pipe parameters
503 //! \return void
504 //!
SetVeboxCapPipeState(PMHW_CAPPIPE_PARAMS pCapPipeParams)505 void SetVeboxCapPipeState(
506 PMHW_CAPPIPE_PARAMS pCapPipeParams)
507 {
508 MHW_FUNCTION_ENTER;
509
510 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_CAPTURE_PIPE_STATE_CMD *pVeboxCapPipeState, CapPipCmd;
511
512 PMHW_VEBOX_HEAP pVeboxHeap;
513 uint32_t uiOffset;
514
515 MHW_CHK_NULL_NO_STATUS_RETURN(pCapPipeParams);
516 MHW_CHK_NULL_NO_STATUS_RETURN(m_veboxHeap);
517
518 pVeboxHeap = m_veboxHeap;
519 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
520
521 pVeboxCapPipeState =
522 (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_CAPTURE_PIPE_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
523 pVeboxHeap->uiCapturePipeStateOffset +
524 uiOffset);
525 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxCapPipeState);
526 *pVeboxCapPipeState = CapPipCmd;
527
528 if (pCapPipeParams->BlackLevelParams.bActive)
529 {
530 pVeboxCapPipeState->DW2.BlackPointCorrectionEnable = true;
531 // Red
532 pVeboxCapPipeState->DW2.BlackPointOffsetRedMsb =
533 (pCapPipeParams->BlackLevelParams.R & MOS_BITFIELD_BIT_N(16)) >> 16;
534 pVeboxCapPipeState->DW3.BlackPointOffsetRed =
535 pCapPipeParams->BlackLevelParams.R & MOS_MASK(0, 15);
536 // Green Top
537 pVeboxCapPipeState->DW2.BlackPointOffsetGreenTopMsb =
538 (pCapPipeParams->BlackLevelParams.G1 & MOS_BITFIELD_BIT_N(16)) >> 16;
539 pVeboxCapPipeState->DW3.BlackPointOffsetGreenTop =
540 pCapPipeParams->BlackLevelParams.G1 & MOS_MASK(0, 15);
541 // Green Bottom
542 pVeboxCapPipeState->DW2.BlackPointOffsetGreenBottomMsb =
543 (pCapPipeParams->BlackLevelParams.G0 & MOS_BITFIELD_BIT_N(16)) >> 16;
544 pVeboxCapPipeState->DW4.BlackPointOffsetGreenBottom =
545 pCapPipeParams->BlackLevelParams.G0 & MOS_MASK(0, 15);
546 // Blue
547 pVeboxCapPipeState->DW2.BlackPointOffsetBlueMsb =
548 (pCapPipeParams->BlackLevelParams.B & MOS_BITFIELD_BIT_N(16)) >> 16;
549 pVeboxCapPipeState->DW4.BlackPointOffsetBlue =
550 pCapPipeParams->BlackLevelParams.B & MOS_MASK(0, 15);
551 }
552
553 if (pCapPipeParams->WhiteBalanceParams.bActive &&
554 pCapPipeParams->WhiteBalanceParams.Mode == MHW_WB_MANUAL)
555 {
556 pVeboxCapPipeState->DW2.WhiteBalanceCorrectionEnable = true;
557
558 // Is U4.12, so multiply the floating value by 4096
559 // Red
560 pVeboxCapPipeState->DW5.WhiteBalanceRedCorrection =
561 (uint32_t)(pCapPipeParams->WhiteBalanceParams.RedCorrection * 4096);
562
563 // Greep Top
564 pVeboxCapPipeState->DW5.WhiteBalanceGreenTopCorrection =
565 (uint32_t)(pCapPipeParams->WhiteBalanceParams.GreenTopCorrection * 4096);
566
567 // Green Bottom
568 pVeboxCapPipeState->DW6.WhiteBalanceGreenBottomCorrection =
569 (uint32_t)(pCapPipeParams->WhiteBalanceParams.GreenBottomCorrection * 4096);
570
571 // Blue
572 pVeboxCapPipeState->DW6.WhiteBalanceBlueCorrection =
573 (uint32_t)(pCapPipeParams->WhiteBalanceParams.BlueCorrection * 4096);
574 }
575 }
576
577 //!
578 //! \brief Add VEBOX ACE/LACE States
579 //! \details Add Vebox ACE, Lace states
580 //! \param [in] pVeboxIecpParams
581 //! Pointer to VEBOX IECP State Params
582 //! \return voild
583 //!
SetVeboxAceLaceState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD * pVeboxIecpState)584 void SetVeboxAceLaceState(
585 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
586 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState)
587 {
588 MHW_FUNCTION_ENTER;
589
590 PMHW_ACE_PARAMS pAceParams;
591 PMHW_VEBOX_HEAP pVeboxHeap;
592 int32_t uiOffset;
593 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
594
595 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpParams);
596
597 if (pVeboxIecpParams->ColorPipeParams.bActive &&
598 pVeboxIecpParams->ColorPipeParams.bEnableACE)
599 {
600 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpState);
601 pAceParams = &pVeboxIecpParams->AceParams;
602 MHW_ASSERT(pAceParams->bActive);
603
604 // Y is input, use wPWLF_X, Y4 as Max. Populate Y5-Ymax with max Y to
605 // avoid artifact
606 pVeboxIecpState->AceState.DW1.Ymin = pAceParams->wACEPWLF_X[0] >> 2;
607 pVeboxIecpState->AceState.DW1.Y1 = pAceParams->wACEPWLF_X[1] >> 2;
608 pVeboxIecpState->AceState.DW1.Y2 = pAceParams->wACEPWLF_X[2] >> 2;
609 pVeboxIecpState->AceState.DW1.Y3 = pAceParams->wACEPWLF_X[3] >> 2;
610 pVeboxIecpState->AceState.DW2.Y4 =
611 pVeboxIecpState->AceState.DW2.Y5 =
612 pVeboxIecpState->AceState.DW2.Y6 =
613 pVeboxIecpState->AceState.DW2.Y7 =
614 pVeboxIecpState->AceState.DW3.Y8 =
615 pVeboxIecpState->AceState.DW3.Y9 =
616 pVeboxIecpState->AceState.DW3.Y10 =
617 pVeboxIecpState->AceState.DW3.Ymax = pAceParams->wACEPWLF_X[4] >> 2;
618
619 // the bias is the output, therefore the Y in algorithm
620 pVeboxIecpState->AceState.DW4.B1 = pAceParams->wACEPWLF_Y[1] >> 2;
621 pVeboxIecpState->AceState.DW4.B2 = pAceParams->wACEPWLF_Y[2] >> 2;
622 pVeboxIecpState->AceState.DW4.B3 = pAceParams->wACEPWLF_Y[3] >> 2;
623
624 // need to double check if slope is set incorrectly
625 pVeboxIecpState->AceState.DW7.S0 = pAceParams->wACEPWLF_S[0];
626 pVeboxIecpState->AceState.DW7.S1 = pAceParams->wACEPWLF_S[1];
627 pVeboxIecpState->AceState.DW8.S2 = pAceParams->wACEPWLF_S[2];
628 pVeboxIecpState->AceState.DW8.S3 = pAceParams->wACEPWLF_S[3];
629 }
630 }
631
SetVeboxVertexTable(MHW_CSPACE ColorSpace)632 MOS_STATUS SetVeboxVertexTable(
633 MHW_CSPACE ColorSpace)
634 {
635 MHW_FUNCTION_ENTER;
636
637 MHW_VEBOX_HEAP *pVeboxHeap;
638 uint32_t uiOffset;
639 uint32_t uSize;
640 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
641 typename mhw::vebox::xe2_hpm_next::Cmd::VEBOX_VERTEX_TABLE_CMD* pVertexTable;
642
643 MHW_CHK_NULL_RETURN(m_veboxHeap);
644
645 pVeboxHeap = m_veboxHeap;
646 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
647 uSize = sizeof(typename mhw::vebox::xe2_hpm_next::Cmd::VEBOX_VERTEX_TABLE_CMD);
648 pVertexTable = (typename mhw::vebox::xe2_hpm_next::Cmd::VEBOX_VERTEX_TABLE_CMD*)(pVeboxHeap->pLockedDriverResourceMem +
649 pVeboxHeap->uiVertexTableOffset +
650 uiOffset);
651 memset(pVertexTable, 0, uSize);
652 if (ColorSpace == MHW_CSpace_BT601 || ColorSpace == MHW_CSpace_xvYCC601)
653 {
654 MOS_SecureMemcpy(pVertexTable, uSize, g_VeboxVertexTableBT601, uSize);
655 }
656 else if (ColorSpace == MHW_CSpace_BT709 || ColorSpace == MHW_CSpace_xvYCC709)
657 {
658 MOS_SecureMemcpy(pVertexTable, uSize, g_VeboxVertexTableBT709, uSize);
659 }
660 else
661 {
662 MHW_NORMALMESSAGE("Unhandled ColorSpace");
663 }
664
665 return eStatus;
666 }
667
setVeboxPrologCmd(std::shared_ptr<mhw::mi::Itf> miItf,PMOS_COMMAND_BUFFER CmdBuffer)668 MOS_STATUS setVeboxPrologCmd(
669 std::shared_ptr<mhw::mi::Itf> miItf,
670 PMOS_COMMAND_BUFFER CmdBuffer)
671 {
672 MHW_FUNCTION_ENTER;
673
674 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
675 uint64_t auxTableBaseAddr = 0;
676
677 MHW_CHK_NULL_RETURN(miItf);
678 MHW_CHK_NULL_RETURN(CmdBuffer);
679 MHW_CHK_NULL_RETURN(this->m_osItf);
680
681 auxTableBaseAddr = this->m_osItf->pfnGetAuxTableBaseAddr(this->m_osItf);
682
683 if (auxTableBaseAddr)
684 {
685 auto& par = miItf->MHW_GETPAR_F(MI_LOAD_REGISTER_IMM)();
686 par = {};
687 par.dwData = (auxTableBaseAddr & 0xffffffff);
688 par.dwRegister = miItf->GetMmioInterfaces(mhw::mi::MHW_MMIO_VE0_AUX_TABLE_BASE_LOW);
689 miItf->MHW_ADDCMD_F(MI_LOAD_REGISTER_IMM)(CmdBuffer);
690
691 par.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
692 par.dwRegister = miItf->GetMmioInterfaces(mhw::mi::MHW_MMIO_VE0_AUX_TABLE_BASE_HIGH);
693 miItf->MHW_ADDCMD_F(MI_LOAD_REGISTER_IMM)(CmdBuffer);
694 }
695
696 return eStatus;
697 }
698
AddVeboxHdrState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)699 MOS_STATUS AddVeboxHdrState(
700 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
701 {
702 MHW_FUNCTION_ENTER;
703
704 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
705 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_HDR_STATE_CMD * pVeboxHdrState = nullptr;
706 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *pIecpState = nullptr;
707 MHW_VEBOX_HEAP *pVeboxHeap = nullptr;
708 uint32_t uiOffset = 0;
709
710 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
711 MHW_CHK_NULL_RETURN(m_veboxHeap);
712
713 pVeboxHeap = m_veboxHeap;
714 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
715
716 pVeboxHdrState =
717 (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_HDR_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
718 pVeboxHeap->uiHdrStateOffset +
719 uiOffset);
720
721 pIecpState =
722 (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
723 pVeboxHeap->uiIecpStateOffset +
724 uiOffset);
725
726 MHW_CHK_NULL_RETURN(pVeboxHdrState);
727 MHW_CHK_NULL_RETURN(pIecpState);
728
729 // Program 1DLUT in Inverse Gamma with 1024 entries / 16bit precision from API level
730 if (pVeboxIecpParams->s1DLutParams.bActive && (pVeboxIecpParams->s1DLutParams.LUTSize == 1024))
731 {
732 // HW provides 4K 1DLUT inverse gamma
733 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_HDR_INV_GAMMA_CORRECTION_STATE_CMD *pInverseGamma = pVeboxHdrState->PRGBCorrectedValue;
734 uint16_t * p1DLut = (uint16_t *)pVeboxIecpParams->s1DLutParams.p1DLUT;
735 for (uint32_t i = 0; i < pVeboxIecpParams->s1DLutParams.LUTSize; i++)
736 {
737 pInverseGamma[i].DW0.Value = 0;
738 pInverseGamma[i].DW1.InverseRChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 1]); // 32 bit precision
739 pInverseGamma[i].DW2.InverseGChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 2]); // 32 bit precision
740 pInverseGamma[i].DW3.InverseBChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 3]); // 32 bit precision
741 }
742 for (uint32_t i = pVeboxIecpParams->s1DLutParams.LUTSize; i < 4096; i++)
743 {
744 pInverseGamma[i].DW0.Value = 0;
745 pInverseGamma[i].DW1.InverseRChannelGammaCorrectionValue = 0;
746 pInverseGamma[i].DW2.InverseGChannelGammaCorrectionValue = 0;
747 pInverseGamma[i].DW3.InverseBChannelGammaCorrectionValue = 0;
748 }
749
750 pVeboxHdrState->DW17440.ToneMappingEnable = false;
751
752 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_HDR_FWD_GAMMA_CORRECTION_STATE_CMD *pForwardGamma = pVeboxHdrState->ForwardGammaLUTvalue;
753 for (uint32_t i = 0; i < 254; i++)
754 {
755 pForwardGamma[i].DW0.PointValueForForwardGammaLut = 256 * i;
756 pForwardGamma[i].DW1.ForwardRChannelGammaCorrectionValue = 256 * i;
757 pForwardGamma[i].DW2.ForwardGChannelGammaCorrectionValue = 256 * i;
758 pForwardGamma[i].DW3.ForwardBChannelGammaCorrectionValue = 256 * i;
759 }
760
761 pForwardGamma[254].DW0.PointValueForForwardGammaLut = 0xffff;
762 pForwardGamma[254].DW1.ForwardRChannelGammaCorrectionValue = 0xffff;
763 pForwardGamma[254].DW2.ForwardGChannelGammaCorrectionValue = 0xffff;
764 pForwardGamma[254].DW3.ForwardBChannelGammaCorrectionValue = 0xffff;
765
766 pForwardGamma[255].DW0.PointValueForForwardGammaLut = 0xffffffff;
767 pForwardGamma[255].DW1.ForwardRChannelGammaCorrectionValue = 0xffff;
768 pForwardGamma[255].DW2.ForwardGChannelGammaCorrectionValue = 0xffff;
769 pForwardGamma[255].DW3.ForwardBChannelGammaCorrectionValue = 0xffff;
770
771 // Program CCM as identity matrix
772 pIecpState->CcmState.DW0.ColorCorrectionMatrixEnable = false;
773 pIecpState->CcmState.DW1.C0 = 0x400000;
774 pIecpState->CcmState.DW0.C1 = 0;
775 pIecpState->CcmState.DW3.C2 = 0;
776 pIecpState->CcmState.DW2.C3 = 0;
777 pIecpState->CcmState.DW5.C4 = 0x400000;
778 pIecpState->CcmState.DW4.C5 = 0;
779 pIecpState->CcmState.DW7.C6 = 0;
780 pIecpState->CcmState.DW6.C7 = 0;
781 pIecpState->CcmState.DW8.C8 = 0x400000;
782 pIecpState->CcmState.DW9.OffsetInR = 0;
783 pIecpState->CcmState.DW10.OffsetInG = 0;
784 pIecpState->CcmState.DW11.OffsetInB = 0;
785 pIecpState->CcmState.DW12.OffsetOutR = 0;
786 pIecpState->CcmState.DW13.OffsetOutG = 0;
787 pIecpState->CcmState.DW14.OffsetOutB = 0;
788 }
789 else if (pVeboxIecpParams->bCcmCscEnable)
790 {
791 uint32_t nLutInBitDepth = 12;
792 uint32_t nLutOutBitDepth = 32;
793 uint64_t maxValLutIn = (((uint64_t)1) << nLutInBitDepth) - 1;
794 uint64_t maxValLutOut = (((uint64_t)1) << nLutOutBitDepth) - 1;
795
796 // HW provides 4K 1DLUT inverse gamma and fill in with identity
797 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_HDR_INV_GAMMA_CORRECTION_STATE_CMD *pInverseGamma = pVeboxHdrState->PRGBCorrectedValue;
798 for (uint32_t i = 0; i < 4096; i++)
799 {
800 float x = (float)(i) / maxValLutIn;
801 uint32_t nCorrectedValue = (i < 4095) ? (uint32_t)(x * maxValLutOut + 0.5) : (uint32_t)(maxValLutOut);
802 pInverseGamma[i].DW0.Value = 0;
803 pInverseGamma[i].DW1.InverseRChannelGammaCorrectionValue = nCorrectedValue;
804 pInverseGamma[i].DW2.InverseGChannelGammaCorrectionValue = nCorrectedValue;
805 pInverseGamma[i].DW3.InverseBChannelGammaCorrectionValue = nCorrectedValue;
806 }
807 pVeboxHdrState->DW17440.ToneMappingEnable = false;
808 pIecpState->CcmState.DW0.ColorCorrectionMatrixEnable = false;
809 if ((pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ||
810 (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709_FullRange))
811 {
812 pIecpState->CcmState.DW1.C0 = 0x00009937;
813 pIecpState->CcmState.DW0.C1 = 0x000115f6;
814 pIecpState->CcmState.DW3.C2 = 0;
815 pIecpState->CcmState.DW2.C3 = 0x00009937;
816 pIecpState->CcmState.DW5.C4 = 0x07ffe3f1;
817 pIecpState->CcmState.DW4.C5 = 0x07ffb9e0;
818 pIecpState->CcmState.DW7.C6 = 0x00009937;
819 pIecpState->CcmState.DW6.C7 = 0;
820 pIecpState->CcmState.DW8.C8 = 0x0000ebe6;
821 pIecpState->CcmState.DW9.OffsetInR = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ? 0xf8000000 : 0;
822 pIecpState->CcmState.DW10.OffsetInG = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ? 0xc0000000 : 0;
823 pIecpState->CcmState.DW11.OffsetInB = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ? 0xc0000000 : 0;
824 pIecpState->CcmState.DW12.OffsetOutR = 0;
825 pIecpState->CcmState.DW13.OffsetOutG = 0;
826 pIecpState->CcmState.DW14.OffsetOutB = 0;
827 }
828 else if ((pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ||
829 (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020_FullRange))
830 {
831 pIecpState->CcmState.DW1.C0 = 0x00009937;
832 pIecpState->CcmState.DW0.C1 = 0x000119d4;
833 pIecpState->CcmState.DW3.C2 = 0;
834 pIecpState->CcmState.DW2.C3 = 0x00009937;
835 pIecpState->CcmState.DW5.C4 = 0x07ffe75a;
836 pIecpState->CcmState.DW4.C5 = 0x07ffaa6a;
837 pIecpState->CcmState.DW7.C6 = 0x00009937;
838 pIecpState->CcmState.DW6.C7 = 0;
839 pIecpState->CcmState.DW8.C8 = 0x0000dce4;
840 pIecpState->CcmState.DW9.OffsetInR = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ? 0xf8000000 : 0;
841 pIecpState->CcmState.DW10.OffsetInG = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ? 0xc0000000 : 0;
842 pIecpState->CcmState.DW11.OffsetInB = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ? 0xc0000000 : 0;
843 pIecpState->CcmState.DW12.OffsetOutR = 0;
844 pIecpState->CcmState.DW13.OffsetOutG = 0;
845 pIecpState->CcmState.DW14.OffsetOutB = 0;
846 }
847 else
848 {
849 MHW_ASSERTMESSAGE("Unsupported Input Color Space!");
850 }
851 }
852
853 return eStatus;
854 }
855
SetVeboxGamutState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)856 MOS_STATUS SetVeboxGamutState(
857 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
858 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
859 {
860 MHW_FUNCTION_ENTER;
861
862 MHW_VEBOX_HEAP *pVeboxHeap;
863 uint32_t uiOffset;
864 uint32_t i;
865 double dInverseGamma = 0;
866 double dForwardGamma = 1.0; // init as 1.0 as default to avoid divisor be 0
867 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
868 uint16_t usGE_Values[256][8] = {0};
869 bool bEnableCCM = false;
870
871 MHW_1DLUT_PARAMS *p1DLutParams = nullptr;
872 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD * pIecpState;
873 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_GAMUT_CONTROL_STATE_CMD *pGamutState, gamutCmd;
874 mhw::vebox::xe2_hpm_next::Cmd::Gamut_Expansion_Gamma_Correction_CMD *pVeboxGEGammaCorrection, VeboxGEGammaCorrection;
875
876 MHW_CHK_NULL_RETURN(pVeboxGamutParams);
877 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
878 MHW_CHK_NULL_RETURN(m_veboxHeap);
879
880 pVeboxHeap = m_veboxHeap;
881 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
882
883 pIecpState =
884 (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
885 pVeboxHeap->uiIecpStateOffset +
886 uiOffset);
887 pVeboxGEGammaCorrection =
888 (mhw::vebox::xe2_hpm_next::Cmd::Gamut_Expansion_Gamma_Correction_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
889 pVeboxHeap->uiGamutStateOffset +
890 uiOffset);
891
892 MHW_CHK_NULL_RETURN(pIecpState);
893 MHW_CHK_NULL_RETURN(pVeboxGEGammaCorrection);
894
895 // Must initialize VeboxIecpState even if it is not used because GCE
896 // requires GlobalIECP enable bit to be turned on
897 if (!pVeboxIecpParams)
898 {
899 IecpStateInitialization(pIecpState);
900 }
901 pGamutState = &pIecpState->GamutState;
902 MHW_CHK_NULL_RETURN(pGamutState);
903
904 if (pVeboxGamutParams->GCompMode != MHW_GAMUT_MODE_NONE)
905 {
906 if (pVeboxGamutParams->GCompMode == MHW_GAMUT_MODE_BASIC)
907 {
908 pGamutState->DW15.Fullrangemappingenable = false;
909
910 if (pVeboxGamutParams->GCompBasicMode == gamutCmd.GCC_BASICMODESELECTION_SCALINGFACTOR)
911 {
912 pGamutState->DW17.GccBasicmodeselection = gamutCmd.GCC_BASICMODESELECTION_SCALINGFACTOR;
913 pGamutState->DW17.Basicmodescalingfactor =
914 pVeboxGamutParams->iBasicModeScalingFactor;
915 }
916 }
917 else if (pVeboxGamutParams->GCompMode == MHW_GAMUT_MODE_ADVANCED)
918 {
919 pGamutState->DW15.Fullrangemappingenable = true;
920 pGamutState->DW15.D1Out = pVeboxGamutParams->iDout;
921 pGamutState->DW15.DOutDefault = pVeboxGamutParams->iDoutDefault;
922 pGamutState->DW15.DInDefault = pVeboxGamutParams->iDinDefault;
923 pGamutState->DW16.D1In = pVeboxGamutParams->iDin;
924 }
925 else
926 {
927 MHW_ASSERTMESSAGE("Invalid GAMUT MODE");
928 }
929
930 // Set Vertex Table if Gamut Compression is enabled
931 SetVeboxVertexTable(pVeboxGamutParams->ColorSpace);
932 }
933
934 // Initialize the Gamut_Expansion_Gamma_Correction.
935 *pVeboxGEGammaCorrection = VeboxGEGammaCorrection;
936 if (pVeboxGamutParams->bColorBalance)
937 {
938 // Need to convert YUV input to RGB before GE
939 pIecpState->CscState.DW0.TransformEnable = true;
940 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
941 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601 ||
942 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
943 {
944 pIecpState->CscState.DW0.C0 = 76309;
945 pIecpState->CscState.DW1.C1 = 0;
946 pIecpState->CscState.DW2.C2 = 104597;
947 pIecpState->CscState.DW3.C3 = 76309;
948 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-25675, 19);
949 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-53279, 19);
950 pIecpState->CscState.DW6.C6 = 76309;
951 pIecpState->CscState.DW7.C7 = 132201;
952 pIecpState->CscState.DW8.C8 = 0;
953 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
954 pIecpState->CscState.DW9.OffsetOut1 = 0;
955 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
956 pIecpState->CscState.DW10.OffsetOut2 = 0;
957 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
958 pIecpState->CscState.DW11.OffsetOut3 = 0;
959 }
960 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
961 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709 ||
962 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
963 {
964 pIecpState->CscState.DW0.C0 = 76309;
965 pIecpState->CscState.DW1.C1 = 0;
966 pIecpState->CscState.DW2.C2 = 117489;
967 pIecpState->CscState.DW3.C3 = 76309;
968 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-13975, 19);
969 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-34925, 19);
970 pIecpState->CscState.DW6.C6 = 76309;
971 pIecpState->CscState.DW7.C7 = 138438;
972 pIecpState->CscState.DW8.C8 = 0;
973 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
974 pIecpState->CscState.DW9.OffsetOut1 = 0;
975 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
976 pIecpState->CscState.DW10.OffsetOut2 = 0;
977 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
978 pIecpState->CscState.DW11.OffsetOut3 = 0;
979 }
980 else
981 {
982 MHW_ASSERTMESSAGE("Unknown primary");
983 }
984
985 pGamutState->DW0.GlobalModeEnable = true;
986 pGamutState->DW1.CmW = 1023;
987
988 pGamutState->DW1.C0 = pVeboxGamutParams->Matrix[0][0];
989 pGamutState->DW0.C1 = pVeboxGamutParams->Matrix[0][1];
990 pGamutState->DW3.C2 = pVeboxGamutParams->Matrix[0][2];
991 pGamutState->DW2.C3 = pVeboxGamutParams->Matrix[1][0];
992 pGamutState->DW5.C4 = pVeboxGamutParams->Matrix[1][1];
993 pGamutState->DW4.C5 = pVeboxGamutParams->Matrix[1][2];
994 pGamutState->DW7.C6 = pVeboxGamutParams->Matrix[2][0];
995 pGamutState->DW6.C7 = pVeboxGamutParams->Matrix[2][1];
996 pGamutState->DW8.C8 = pVeboxGamutParams->Matrix[2][2];
997 pGamutState->DW9.OffsetInR = 0;
998 pGamutState->DW10.OffsetInG = 0;
999 pGamutState->DW11.OffsetInB = 0;
1000 pGamutState->DW12.OffsetOutR = 0;
1001 pGamutState->DW13.OffsetOutG = 0;
1002 pGamutState->DW14.OffsetOutB = 0;
1003
1004 for (i = 0; i < 256; i++)
1005 {
1006 usGE_Values[i][0] = 257 * i;
1007 usGE_Values[i][1] =
1008 usGE_Values[i][2] =
1009 usGE_Values[i][3] = 257 * i;
1010
1011 usGE_Values[i][4] = 257 * i;
1012 usGE_Values[i][5] =
1013 usGE_Values[i][6] =
1014 usGE_Values[i][7] = 257 * i;
1015 }
1016 // Copy two uint16_t to one DW (UNT32).
1017 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1018 }
1019 else if(pVeboxGamutParams->GExpMode != MHW_GAMUT_MODE_NONE)
1020 {
1021 // Need to convert YUV input to RGB before GE
1022 pIecpState->CscState.DW0.TransformEnable = true;
1023 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
1024 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601 ||
1025 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
1026 {
1027 pIecpState->CscState.DW0.C0 = 1192;
1028 pIecpState->CscState.DW1.C1 = MOS_BITFIELD_VALUE((uint32_t)-2, 19);
1029 pIecpState->CscState.DW2.C2 = 1634;
1030 pIecpState->CscState.DW3.C3 = 1192;
1031 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-401, 19);
1032 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-833, 19);
1033 pIecpState->CscState.DW6.C6 = 1192;
1034 pIecpState->CscState.DW7.C7 = 2066;
1035 pIecpState->CscState.DW8.C8 = MOS_BITFIELD_VALUE((uint32_t)-1, 19);
1036 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-64, 16);
1037 pIecpState->CscState.DW9.OffsetOut1 = 0;
1038 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1039 pIecpState->CscState.DW10.OffsetOut2 = 0;
1040 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1041 pIecpState->CscState.DW11.OffsetOut3 = 0;
1042 }
1043 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
1044 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709 ||
1045 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
1046 {
1047 pIecpState->CscState.DW0.C0 = 1192;
1048 pIecpState->CscState.DW1.C1 = MOS_BITFIELD_VALUE((uint32_t)-1, 19);
1049 pIecpState->CscState.DW2.C2 = 1835;
1050 pIecpState->CscState.DW3.C3 = 1192;
1051 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-218, 19);
1052 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-537, 19);
1053 pIecpState->CscState.DW6.C6 = 1192;
1054 pIecpState->CscState.DW7.C7 = 2164;
1055 pIecpState->CscState.DW8.C8 = 1;
1056 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-64, 16);
1057 pIecpState->CscState.DW9.OffsetOut1 = 0;
1058 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1059 pIecpState->CscState.DW10.OffsetOut2 = 0;
1060 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1061 pIecpState->CscState.DW11.OffsetOut3 = 0;
1062 }
1063 else
1064 {
1065 MHW_ASSERTMESSAGE("Unknown primary");
1066 }
1067
1068 if (pVeboxGamutParams->GExpMode == MHW_GAMUT_MODE_BASIC)
1069 {
1070 pGamutState->DW0.GlobalModeEnable = true;
1071 pGamutState->DW1.CmW = 1023;
1072 }
1073 else if (pVeboxGamutParams->GExpMode == MHW_GAMUT_MODE_ADVANCED)
1074 {
1075 pGamutState->DW0.GlobalModeEnable = false;
1076 }
1077 else
1078 {
1079 MHW_ASSERTMESSAGE("Invalid GAMUT MODE");
1080 }
1081
1082 pGamutState->DW1.C0 = pVeboxGamutParams->Matrix[0][0];
1083 pGamutState->DW0.C1 = pVeboxGamutParams->Matrix[0][1];
1084 pGamutState->DW3.C2 = pVeboxGamutParams->Matrix[0][2];
1085 pGamutState->DW2.C3 = pVeboxGamutParams->Matrix[1][0];
1086 pGamutState->DW5.C4 = pVeboxGamutParams->Matrix[1][1];
1087 pGamutState->DW4.C5 = pVeboxGamutParams->Matrix[1][2];
1088 pGamutState->DW7.C6 = pVeboxGamutParams->Matrix[2][0];
1089 pGamutState->DW6.C7 = pVeboxGamutParams->Matrix[2][1];
1090 pGamutState->DW8.C8 = pVeboxGamutParams->Matrix[2][2];
1091 }
1092 else if (pVeboxGamutParams->bGammaCorr)
1093 {
1094 // Need to convert YUV input to RGB before Gamma Correction
1095 pIecpState->CscState.DW0.TransformEnable = true;
1096 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
1097 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601 ||
1098 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
1099 {
1100 pIecpState->CscState.DW0.C0 = 76309;
1101 pIecpState->CscState.DW1.C1 = 0;
1102 pIecpState->CscState.DW2.C2 = 104597;
1103 pIecpState->CscState.DW3.C3 = 76309;
1104 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-25675, 19);
1105 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-53279, 19);
1106 pIecpState->CscState.DW6.C6 = 76309;
1107 pIecpState->CscState.DW7.C7 = 132201;
1108 pIecpState->CscState.DW8.C8 = 0;
1109 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1110 pIecpState->CscState.DW9.OffsetOut1 = 0;
1111 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1112 pIecpState->CscState.DW10.OffsetOut2 = 0;
1113 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1114 pIecpState->CscState.DW11.OffsetOut3 = 0;
1115 }
1116 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
1117 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709 ||
1118 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
1119 {
1120 pIecpState->CscState.DW0.C0 = 76309;
1121 pIecpState->CscState.DW1.C1 = 0;
1122 pIecpState->CscState.DW2.C2 = 117489;
1123 pIecpState->CscState.DW3.C3 = 76309;
1124 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-13975, 19);
1125 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-34925, 19);
1126 pIecpState->CscState.DW6.C6 = 76309;
1127 pIecpState->CscState.DW7.C7 = 138438;
1128 pIecpState->CscState.DW8.C8 = 0;
1129 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1130 pIecpState->CscState.DW9.OffsetOut1 = 0;
1131 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1132 pIecpState->CscState.DW10.OffsetOut2 = 0;
1133 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1134 pIecpState->CscState.DW11.OffsetOut3 = 0;
1135 }
1136 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020 ||
1137 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange)
1138 {
1139 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1140 }
1141 else
1142 {
1143 MHW_ASSERTMESSAGE("Unknown primary");
1144 }
1145
1146 // CCM is needed for CSC(BT2020->BT709/BT601 or vice versa with Different Gamma).
1147 bEnableCCM = (pVeboxGamutParams->InputGammaValue == pVeboxGamutParams->OutputGammaValue) ? false : true;
1148 pGamutState->DW0.GlobalModeEnable = true;
1149 pGamutState->DW1.CmW = 1023;
1150 if ((pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020) && bEnableCCM)
1151 {
1152 if (pVeboxGamutParams->dstColorSpace == MHW_CSpace_BT709)
1153 {
1154 pGamutState->DW1.C0 = 108190;
1155 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38288, 21);
1156 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4747, 21);
1157 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-7967, 21);
1158 pGamutState->DW5.C4 = 74174;
1159 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-557, 21);
1160 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1198, 21);
1161 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6587, 21);
1162 pGamutState->DW8.C8 = 73321;
1163 }
1164 else
1165 {
1166 pGamutState->DW1.C0 = 116420;
1167 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-45094, 21);
1168 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-5785, 21);
1169 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-10586, 21);
1170 pGamutState->DW5.C4 = 77814;
1171 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-1705, 21);
1172 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1036, 21);
1173 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6284, 21);
1174 pGamutState->DW8.C8 = 72864;
1175 }
1176 }
1177 else
1178 {
1179 pGamutState->DW1.C0 = 65536;
1180 pGamutState->DW0.C1 = 0;
1181 pGamutState->DW3.C2 = 0;
1182 pGamutState->DW2.C3 = 0;
1183 pGamutState->DW5.C4 = 65536;
1184 pGamutState->DW4.C5 = 0;
1185 pGamutState->DW7.C6 = 0;
1186 pGamutState->DW6.C7 = 0;
1187 pGamutState->DW8.C8 = 65536;
1188 pGamutState->DW9.OffsetInR = 0;
1189 pGamutState->DW10.OffsetInG = 0;
1190 pGamutState->DW11.OffsetInB = 0;
1191 pGamutState->DW12.OffsetOutR = 0;
1192 pGamutState->DW13.OffsetOutG = 0;
1193 pGamutState->DW14.OffsetOutB = 0;
1194 }
1195
1196 if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_1P0)
1197 {
1198 dInverseGamma = 1.0;
1199 }
1200 else if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_2P2)
1201 {
1202 dInverseGamma = 2.2;
1203 }
1204 else if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_2P6)
1205 {
1206 dInverseGamma = 2.6;
1207 }
1208 else
1209 {
1210 MHW_ASSERTMESSAGE("Invalid InputGammaValue");
1211 }
1212
1213 if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_1P0)
1214 {
1215 dForwardGamma = 1.0;
1216 }
1217 else if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_2P2)
1218 {
1219 dForwardGamma = 2.2;
1220 }
1221 else if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_2P6)
1222 {
1223 dForwardGamma = 2.6;
1224 }
1225 else
1226 {
1227 MHW_ASSERTMESSAGE("Invalid OutputGammaValue");
1228 }
1229 if ((pVeboxGamutParams->InputGammaValue == MHW_GAMMA_1P0) && (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_1P0))
1230 {
1231 for (i = 0; i < 256; i++)
1232 {
1233 usGE_Values[i][0] = 257 * i;
1234 usGE_Values[i][1] =
1235 usGE_Values[i][2] =
1236 usGE_Values[i][3] = 257 * i;
1237
1238 usGE_Values[i][4] = 257 * i;
1239 usGE_Values[i][5] =
1240 usGE_Values[i][6] =
1241 usGE_Values[i][7] = 257 * i;
1242 }
1243 // Copy two uint16_t to one DW (UNT32).
1244 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1245 }
1246 else
1247 {
1248 for (i = 0; i < 255; i++)
1249 {
1250 usGE_Values[i][0] = 256 * i;
1251 usGE_Values[i][1] =
1252 usGE_Values[i][2] =
1253 usGE_Values[i][3] = (uint16_t)MOS_F_ROUND(pow((double)((double)i / 256), dInverseGamma) * 65536);
1254
1255 usGE_Values[i][4] = 256 * i;
1256 usGE_Values[i][5] =
1257 usGE_Values[i][6] =
1258 usGE_Values[i][7] = (uint16_t)MOS_F_ROUND(pow((double)((double)i / 256), 1 / dForwardGamma) * 65536);
1259 }
1260 // Copy two uint16_t to one DW (UNT32).
1261 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1020, usGE_Values, sizeof(uint16_t) * 8 * 255);
1262 }
1263 }
1264 else if (pVeboxGamutParams->bH2S)
1265 {
1266 VeboxInterface_H2SManualMode(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1267 }
1268 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020 ||
1269 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange) // BT2020 CSC case
1270 {
1271 if (pVeboxIecpParams->s1DLutParams.bActive)
1272 {
1273 //CCM setting if 1Dlut VEBOX HDR enabled
1274 p1DLutParams = &pVeboxIecpParams->s1DLutParams;
1275
1276 pIecpState->CcmState.DW1.C0 = p1DLutParams->pCCM[0];
1277 pIecpState->CcmState.DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[1], 27);
1278 pIecpState->CcmState.DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[2], 27);
1279 pIecpState->CcmState.DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[3], 27);
1280 pIecpState->CcmState.DW5.C4 = p1DLutParams->pCCM[4];
1281 pIecpState->CcmState.DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[5], 27);
1282 pIecpState->CcmState.DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[6], 27);
1283 pIecpState->CcmState.DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[7], 27);
1284 pIecpState->CcmState.DW8.C8 = p1DLutParams->pCCM[8];
1285 pIecpState->CcmState.DW9.OffsetInR = p1DLutParams->pCCM[9];
1286 pIecpState->CcmState.DW10.OffsetInG = p1DLutParams->pCCM[10];
1287 pIecpState->CcmState.DW11.OffsetInB = p1DLutParams->pCCM[11];
1288 pIecpState->CcmState.DW12.OffsetOutR = p1DLutParams->pCCM[12];
1289 pIecpState->CcmState.DW13.OffsetOutG = p1DLutParams->pCCM[13];
1290 pIecpState->CcmState.DW14.OffsetOutB = p1DLutParams->pCCM[14];
1291
1292 pGamutState->DW0.GlobalModeEnable = false;
1293 // Still need to set CSC params here
1294 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1295
1296 return eStatus;
1297 }
1298
1299 pGamutState->DW0.GlobalModeEnable = true;
1300 pGamutState->DW1.CmW = 1023; // Colorimetric accurate image
1301 if (pVeboxGamutParams->dstColorSpace == MHW_CSpace_BT601)
1302 {
1303 pGamutState->DW1.C0 = 116420;
1304 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-45094, 21);
1305 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-5785, 21);
1306 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-10586, 21);
1307 pGamutState->DW5.C4 = 77814;
1308 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-1705, 21);
1309 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1036, 21);
1310 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6284, 21);
1311 pGamutState->DW8.C8 = 72864;
1312 }
1313 else //BT709, sRGB has same chromaticity CIE 1931
1314 {
1315 pGamutState->DW1.C0 = 108190;
1316 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38288, 21);
1317 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4747, 21);
1318 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-7967, 21);
1319 pGamutState->DW5.C4 = 74174;
1320 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-557, 21);
1321 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1198, 21);
1322 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6587, 21);
1323 pGamutState->DW8.C8 = 73321;
1324 }
1325
1326 for (i = 0; i < 256; i++)
1327 {
1328 usGE_Values[i][0] = (uint16_t)g_Vebox_BT2020_Inverse_Pixel_Value[i];
1329 usGE_Values[i][1] =
1330 usGE_Values[i][2] =
1331 usGE_Values[i][3] = (uint16_t)g_Vebox_BT2020_Inverse_Gamma_LUT[i];
1332
1333 usGE_Values[i][4] = (uint16_t)g_Vebox_BT2020_Forward_Pixel_Value[i];
1334 usGE_Values[i][5] =
1335 usGE_Values[i][6] =
1336 usGE_Values[i][7] = (uint16_t)g_Vebox_BT2020_Forward_Gamma_LUT[i];
1337 }
1338 // Copy two UNT16 to one DW(UNT32).
1339 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1340 // Back end CSC setting, need to convert BT2020 YUV input to RGB before GE
1341 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1342 }
1343 else if (pVeboxIecpParams && pVeboxIecpParams->s1DLutParams.bActive && (pVeboxIecpParams->s1DLutParams.LUTSize == 256))
1344 {
1345 uint16_t in_val = 0, vchan1_y = 0, vchan2_u = 0, vchan3_v = 0;
1346 uint32_t nIndex = 0;
1347 uint16_t *pForwardGamma = (uint16_t *)pVeboxIecpParams->s1DLutParams.p1DLUT;
1348 MHW_CHK_NULL_RETURN(pForwardGamma);
1349
1350 // Gamut Expansion setting
1351 pGamutState->DW0.GlobalModeEnable = true;
1352 pGamutState->DW1.CmW = 1023;
1353 dInverseGamma = 1.0;
1354
1355 for (uint32_t i = 0; i < pVeboxIecpParams->s1DLutParams.LUTSize; i++)
1356 {
1357 usGE_Values[i][0] = 257 * i;
1358 usGE_Values[i][1] =
1359 usGE_Values[i][2] =
1360 usGE_Values[i][3] = 257 * i;
1361
1362 nIndex = 4 * i;
1363 in_val = pForwardGamma[nIndex];
1364 vchan1_y = pForwardGamma[nIndex + 1];
1365 vchan2_u = pForwardGamma[nIndex + 2];
1366 vchan3_v = pForwardGamma[nIndex + 3];
1367
1368 // ayuv: in_val, vchan1_y, vchan2_u, vchan3_v
1369 usGE_Values[i][4] = (i == 0) ? 0 : ((i == 255) ? 0xffff : in_val);
1370 usGE_Values[i][5] = vchan1_y;
1371 usGE_Values[i][6] = vchan2_u;
1372 usGE_Values[i][7] = vchan3_v;
1373 }
1374 pGamutState->DW1.C0 = 65536;
1375 pGamutState->DW0.C1 = 0;
1376 pGamutState->DW3.C2 = 0;
1377 pGamutState->DW2.C3 = 0;
1378 pGamutState->DW5.C4 = 65536;
1379 pGamutState->DW4.C5 = 0;
1380 pGamutState->DW7.C6 = 0;
1381 pGamutState->DW6.C7 = 0;
1382 pGamutState->DW8.C8 = 65536;
1383 pGamutState->DW9.OffsetInR = 0;
1384 pGamutState->DW10.OffsetInG = 0;
1385 pGamutState->DW11.OffsetInB = 0;
1386 pGamutState->DW12.OffsetOutR = 0;
1387 pGamutState->DW13.OffsetOutG = 0;
1388 pGamutState->DW14.OffsetOutB = 0;
1389 // Copy two uint16_t to one DW (UNT32).
1390 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1391 }
1392 else
1393 {
1394 MHW_ASSERTMESSAGE("Unknown branch!");
1395 }
1396
1397 return eStatus;
1398 }
1399
ForceGNEParams(uint8_t * pDndiSate)1400 MOS_STATUS ForceGNEParams(uint8_t *pDndiSate)
1401 {
1402 MHW_FUNCTION_ENTER;
1403 MHW_CHK_NULL_RETURN(pDndiSate);
1404 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD *pVeboxDndiState = (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD *)pDndiSate;
1405
1406 //used by both SGNE and TGNE
1407 pVeboxDndiState->DW6.BlockNoiseEstimateEdgeThreshold = 900;
1408 pVeboxDndiState->DW4.BlockNoiseEstimateNoiseThreshold = 720;
1409 pVeboxDndiState->DW30.EightDirectionEdgeThreshold = 1800;
1410
1411 //SGNE
1412 pVeboxDndiState->DW31.LargeSobelThreshold = 1290;
1413 pVeboxDndiState->DW33.MaxSobelThreshold = 1440;
1414 pVeboxDndiState->DW31.SmallSobelThreshold = 480;
1415 pVeboxDndiState->DW32.BlockSigmaDiffThreshold = dwBSDThreshold;
1416 pVeboxDndiState->DW31.SmallSobelCountThreshold = 6;
1417 pVeboxDndiState->DW32.LargeSobelCountThreshold = 6;
1418 pVeboxDndiState->DW32.MedianSobelCountThreshold = 40;
1419
1420 //TGNE
1421 pVeboxDndiState->DW50.LumaUniformityLowTh1 = 1;
1422 pVeboxDndiState->DW50.LumaUniformityLowTh2 = 1;
1423 pVeboxDndiState->DW50.LumaUniformityHighTh1 = 6;
1424 pVeboxDndiState->DW50.LumaUniformityHighTh2 = 0;
1425 pVeboxDndiState->DW49.LumaStadTh = 250;
1426
1427 //Chroma
1428 pVeboxDndiState->DW8.ChromaDenoiseMovingPixelThreshold = 2; //m_chromaParams.dwHotPixelThresholdChromaV;
1429 pVeboxDndiState->DW8.ChromaDenoiseAsdThreshold = 512;
1430 pVeboxDndiState->DW8.ChromaDenoiseThresholdForSumOfComplexityMeasure = 512;
1431
1432 return MOS_STATUS_SUCCESS;
1433 }
1434
SetVeboxTGNEDndiState(uint8_t * pDndiSate)1435 MOS_STATUS SetVeboxTGNEDndiState(uint8_t *pDndiSate)
1436 {
1437 MHW_FUNCTION_ENTER;
1438 MHW_CHK_NULL_RETURN(pDndiSate);
1439 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD *pVeboxDndiState = (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD *)pDndiSate;
1440
1441 if (bHVSAutoBdrateEnable)
1442 {
1443 pVeboxDndiState->DW3.TemporalGneEnable = bTGNEEnable;
1444 pVeboxDndiState->DW30.ValidPixelThreshold = 336;
1445 pVeboxDndiState->DW52._4X4TemporalGneThresholdCount = dw4X4TGNEThCnt;
1446 pVeboxDndiState->DW2.InitialDenoiseHistory = dwHistoryInit;
1447 pVeboxDndiState->DW33.MaxSobelThreshold = 448; //for SGNE
1448 //for chroma
1449 pVeboxDndiState->DW49.ChromaStadTh = dwChromaStadTh;
1450 pVeboxDndiState->DW51.ChromaUniformityHighTh2 = 0;
1451 pVeboxDndiState->DW51.ChromaUniformityHighTh1 = 9;
1452 pVeboxDndiState->DW51.ChromaUniformityLowTh2 = 2;
1453 pVeboxDndiState->DW51.ChromaUniformityLowTh1 = 1;
1454
1455 ForceGNEParams((uint8_t *)pVeboxDndiState);
1456 pVeboxDndiState->DW2.InitialDenoiseHistory = dwHistoryInit;
1457 }
1458 else if (bHVSAutoSubjectiveEnable)
1459 {
1460 pVeboxDndiState->DW3.TemporalGneEnable = bTGNEEnable;
1461 pVeboxDndiState->DW4.BlockNoiseEstimateNoiseThreshold = 720;
1462 pVeboxDndiState->DW6.BlockNoiseEstimateEdgeThreshold = 200;
1463 pVeboxDndiState->DW30.EightDirectionEdgeThreshold = 3200;
1464 pVeboxDndiState->DW30.ValidPixelThreshold = 336;
1465 pVeboxDndiState->DW33.MaxSobelThreshold = 1440;
1466 pVeboxDndiState->DW49.ChromaStadTh = dwChromaStadTh;
1467 pVeboxDndiState->DW49.LumaStadTh = dwLumaStadTh;
1468 pVeboxDndiState->DW50.LumaUniformityHighTh2 = 50;
1469 pVeboxDndiState->DW50.LumaUniformityHighTh1 = 15;
1470 pVeboxDndiState->DW50.LumaUniformityLowTh2 = 2;
1471 pVeboxDndiState->DW50.LumaUniformityLowTh1 = 2;
1472 pVeboxDndiState->DW51.ChromaUniformityHighTh2 = 30;
1473 pVeboxDndiState->DW51.ChromaUniformityHighTh1 = 15;
1474 pVeboxDndiState->DW51.ChromaUniformityLowTh2 = 2;
1475 pVeboxDndiState->DW51.ChromaUniformityLowTh1 = 1;
1476 pVeboxDndiState->DW52._4X4TemporalGneThresholdCount = dw4X4TGNEThCnt;
1477 }
1478 else
1479 {
1480 pVeboxDndiState->DW3.TemporalGneEnable = bTGNEEnable;
1481 pVeboxDndiState->DW4.BlockNoiseEstimateNoiseThreshold = 320;
1482 pVeboxDndiState->DW49.ChromaStadTh = dwChromaStadTh;
1483 pVeboxDndiState->DW49.LumaStadTh = dwLumaStadTh;
1484 pVeboxDndiState->DW50.LumaUniformityHighTh2 = 50;
1485 pVeboxDndiState->DW50.LumaUniformityHighTh1 = 10;
1486 pVeboxDndiState->DW50.LumaUniformityLowTh2 = 2;
1487 pVeboxDndiState->DW50.LumaUniformityLowTh1 = 1;
1488 pVeboxDndiState->DW51.ChromaUniformityHighTh2 = 30;
1489 pVeboxDndiState->DW51.ChromaUniformityHighTh1 = 15;
1490 pVeboxDndiState->DW51.ChromaUniformityLowTh2 = 2;
1491 pVeboxDndiState->DW51.ChromaUniformityLowTh1 = 1;
1492 pVeboxDndiState->DW52._4X4TemporalGneThresholdCount = dw4X4TGNEThCnt;
1493 }
1494 return MOS_STATUS_SUCCESS;
1495 }
1496
SetVeboxSGNEDndiState(uint8_t * pDndiSate)1497 MOS_STATUS SetVeboxSGNEDndiState(uint8_t *pDndiSate)
1498 {
1499 MHW_FUNCTION_ENTER;
1500 MHW_CHK_NULL_RETURN(pDndiSate);
1501 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD *pVeboxDndiState = (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD *)pDndiSate;
1502
1503 if (bHVSAutoBdrateEnable)
1504 {
1505 pVeboxDndiState->DW3.TemporalGneEnable = 0;
1506 pVeboxDndiState->DW30.ValidPixelThreshold = 336;
1507 pVeboxDndiState->DW33.MaxSobelThreshold = 448;
1508 pVeboxDndiState->DW2.InitialDenoiseHistory = dwHistoryInit;
1509
1510 pVeboxDndiState->DW49.ChromaStadTh = 0;
1511 pVeboxDndiState->DW51.ChromaUniformityHighTh2 = 0;
1512 pVeboxDndiState->DW51.ChromaUniformityHighTh1 = 0;
1513 pVeboxDndiState->DW51.ChromaUniformityLowTh2 = 0;
1514 pVeboxDndiState->DW51.ChromaUniformityLowTh1 = 0;
1515 pVeboxDndiState->DW52._4X4TemporalGneThresholdCount = 0;
1516
1517 ForceGNEParams((uint8_t *)pVeboxDndiState);
1518
1519 pVeboxDndiState->DW49.LumaStadTh = 0;
1520 pVeboxDndiState->DW50.LumaUniformityHighTh2 = 0;
1521 pVeboxDndiState->DW50.LumaUniformityHighTh1 = 0;
1522 pVeboxDndiState->DW50.LumaUniformityLowTh2 = 0;
1523 pVeboxDndiState->DW50.LumaUniformityLowTh1 = 0;
1524 }
1525 else if (bHVSAutoSubjectiveEnable)
1526 {
1527 pVeboxDndiState->DW3.TemporalGneEnable = 0;
1528 pVeboxDndiState->DW4.BlockNoiseEstimateNoiseThreshold = 720;
1529 pVeboxDndiState->DW6.BlockNoiseEstimateEdgeThreshold = 200;
1530 pVeboxDndiState->DW30.EightDirectionEdgeThreshold = 3200;
1531 pVeboxDndiState->DW30.ValidPixelThreshold = 336;
1532 pVeboxDndiState->DW33.MaxSobelThreshold = 1440;
1533 pVeboxDndiState->DW49.ChromaStadTh = 0;
1534 pVeboxDndiState->DW49.LumaStadTh = 0;
1535 pVeboxDndiState->DW50.LumaUniformityHighTh2 = 0;
1536 pVeboxDndiState->DW50.LumaUniformityHighTh1 = 0;
1537 pVeboxDndiState->DW50.LumaUniformityLowTh2 = 0;
1538 pVeboxDndiState->DW50.LumaUniformityLowTh1 = 0;
1539 pVeboxDndiState->DW51.ChromaUniformityHighTh2 = 0;
1540 pVeboxDndiState->DW51.ChromaUniformityHighTh1 = 0;
1541 pVeboxDndiState->DW51.ChromaUniformityLowTh2 = 0;
1542 pVeboxDndiState->DW51.ChromaUniformityLowTh1 = 0;
1543 pVeboxDndiState->DW52._4X4TemporalGneThresholdCount = 0;
1544 }
1545 else
1546 {
1547 pVeboxDndiState->DW3.TemporalGneEnable = 0;
1548 pVeboxDndiState->DW4.BlockNoiseEstimateNoiseThreshold = 320;
1549 pVeboxDndiState->DW49.ChromaStadTh = 0;
1550 pVeboxDndiState->DW49.LumaStadTh = 0;
1551 pVeboxDndiState->DW50.LumaUniformityHighTh2 = 0;
1552 pVeboxDndiState->DW50.LumaUniformityHighTh1 = 0;
1553 pVeboxDndiState->DW50.LumaUniformityLowTh2 = 0;
1554 pVeboxDndiState->DW50.LumaUniformityLowTh1 = 0;
1555 pVeboxDndiState->DW51.ChromaUniformityHighTh2 = 0;
1556 pVeboxDndiState->DW51.ChromaUniformityHighTh1 = 0;
1557 pVeboxDndiState->DW51.ChromaUniformityLowTh2 = 0;
1558 pVeboxDndiState->DW51.ChromaUniformityLowTh1 = 0;
1559 pVeboxDndiState->DW52._4X4TemporalGneThresholdCount = 0;
1560 }
1561
1562 return MOS_STATUS_SUCCESS;
1563 }
1564
DumpDNDIStates(uint8_t * pDndiSate)1565 MOS_STATUS DumpDNDIStates(uint8_t *pDndiSate)
1566 {
1567 MHW_FUNCTION_ENTER;
1568 MHW_CHK_NULL_RETURN(pDndiSate);
1569 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD *pVeboxDndiState = (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD *)pDndiSate;
1570
1571 MHW_VERBOSEMESSAGE("VeboxDndiState, DW 34-47 is DI related DW, others is DN.");
1572 MHW_VERBOSEMESSAGE("DW0:DenoiseMaximumHistory %d, DenoiseStadThreshold %d", pVeboxDndiState->DW0.DenoiseMaximumHistory, pVeboxDndiState->DW0.DenoiseStadThreshold);
1573 MHW_VERBOSEMESSAGE("DW1:DenoiseAsdThreshold %d, DenoiseHistoryIncrease %d, DenoiseMovingPixelThreshold %d", pVeboxDndiState->DW1.DenoiseAsdThreshold, pVeboxDndiState->DW1.DenoiseHistoryIncrease, pVeboxDndiState->DW1.DenoiseMovingPixelThreshold);
1574 MHW_VERBOSEMESSAGE("DW2:InitialDenoiseHistory %d, TemporalDifferenceThreshold %d", pVeboxDndiState->DW2.InitialDenoiseHistory, pVeboxDndiState->DW2.TemporalDifferenceThreshold);
1575 MHW_VERBOSEMESSAGE("DW3:HotPixelCountLuma %d, LowTemporalDifferenceThreshold %d, ProgressiveDn %d, TemporalGneEnable %d", pVeboxDndiState->DW3.HotPixelCountLuma, pVeboxDndiState->DW3.LowTemporalDifferenceThreshold, pVeboxDndiState->DW3.ProgressiveDn, pVeboxDndiState->DW3.TemporalGneEnable);
1576 MHW_VERBOSEMESSAGE("DW4:BlockNoiseEstimateNoiseThreshold %d, DenoiseThresholdForSumOfComplexityMeasureLuma %d, DW4.HotPixelThresholdLuma %d", pVeboxDndiState->DW4.BlockNoiseEstimateNoiseThreshold, pVeboxDndiState->DW4.DenoiseThresholdForSumOfComplexityMeasureLuma, pVeboxDndiState->DW4.HotPixelThresholdLuma);
1577 MHW_VERBOSEMESSAGE("DW5:ChromaDenoiseStadThreshold %d, HotPixelCountChromaU %d, HotPixelThresholdChromaU %d", pVeboxDndiState->DW5.ChromaDenoiseStadThreshold, pVeboxDndiState->DW5.HotPixelCountChromaU, pVeboxDndiState->DW5.HotPixelThresholdChromaU);
1578 MHW_VERBOSEMESSAGE("DW6:BlockNoiseEstimateEdgeThreshold %d, ChromaDenoiseEnable %d, ChromaTemporalDifferenceThreshold %d", pVeboxDndiState->DW6.BlockNoiseEstimateEdgeThreshold, pVeboxDndiState->DW6.ChromaDenoiseEnable, pVeboxDndiState->DW6.ChromaTemporalDifferenceThreshold);
1579 MHW_VERBOSEMESSAGE("DW7:ChromaLowTemporalDifferenceThreshold %d, HotPixelCountChromaV %d, HotPixelThresholdChromaV %d", pVeboxDndiState->DW7.ChromaLowTemporalDifferenceThreshold, pVeboxDndiState->DW7.HotPixelCountChromaV, pVeboxDndiState->DW7.HotPixelThresholdChromaV);
1580 MHW_VERBOSEMESSAGE("DW8:ChromaDenoiseAsdThreshold %d, ChromaDenoiseMovingPixelThreshold %d, ChromaDenoiseThresholdForSumOfComplexityMeasure %d", pVeboxDndiState->DW8.ChromaDenoiseAsdThreshold, pVeboxDndiState->DW8.ChromaDenoiseMovingPixelThreshold, pVeboxDndiState->DW8.ChromaDenoiseThresholdForSumOfComplexityMeasure);
1581 MHW_VERBOSEMESSAGE("DW9:DnyWr040 %d, DnyWr140 %d, DnyWr240 %d, DnyWr340 %d, DnyWr440 %d, DnyWr540 %d", pVeboxDndiState->DW9.DnyWr040, pVeboxDndiState->DW9.DnyWr140, pVeboxDndiState->DW9.DnyWr240, pVeboxDndiState->DW9.DnyWr340, pVeboxDndiState->DW9.DnyWr440, pVeboxDndiState->DW9.DnyWr540);
1582 MHW_VERBOSEMESSAGE("DW10:DnyThmax120 %d, DnyThmin120 %d, DW11: DnyDynThmin120 %d, DnyPrt5120 %d", pVeboxDndiState->DW10.DnyThmax120, pVeboxDndiState->DW10.DnyThmin120, pVeboxDndiState->DW11.DnyDynThmin120, pVeboxDndiState->DW11.DnyPrt5120);
1583 MHW_VERBOSEMESSAGE("DW12:DnyPrt3120 %d, DnyPrt4120 %d, DW13:DnyPrt1120 %d, DnyPrt2120 %d", pVeboxDndiState->DW12.DnyPrt3120, pVeboxDndiState->DW12.DnyPrt4120, pVeboxDndiState->DW13.DnyPrt1120, pVeboxDndiState->DW13.DnyPrt2120);
1584 MHW_VERBOSEMESSAGE("DW14:DnyPrt0120 %d, DnyWd2040 %d, DnyWd2140 %d, DnyWd2240 %d", pVeboxDndiState->DW14.DnyPrt0120, pVeboxDndiState->DW14.DnyWd2040, pVeboxDndiState->DW14.DnyWd2140, pVeboxDndiState->DW14.DnyWd2240);
1585 MHW_VERBOSEMESSAGE("DW15:DnyWd0040 %d, DnyWd0140 %d, DnyWd0240 %d, DnyWd1040 %d, DnyWd1140 %d, DnyWd1240 %d", pVeboxDndiState->DW15.DnyWd0040, pVeboxDndiState->DW15.DnyWd0140, pVeboxDndiState->DW15.DnyWd0240, pVeboxDndiState->DW15.DnyWd1040, pVeboxDndiState->DW15.DnyWd1140, pVeboxDndiState->DW15.DnyWd1240);
1586 MHW_VERBOSEMESSAGE("DW16:DnuWr040 %d, DnuWr140 %d, DnuWr240 %d, DnuWr340 %d, DnuWr440 %d, DnuWr540 %d", pVeboxDndiState->DW16.DnuWr040, pVeboxDndiState->DW16.DnuWr140, pVeboxDndiState->DW16.DnuWr240, pVeboxDndiState->DW16.DnuWr340, pVeboxDndiState->DW16.DnuWr440, pVeboxDndiState->DW16.DnuWr540);
1587 MHW_VERBOSEMESSAGE("DW17:DnuThmax120 %d, DnuThmin120 %d", pVeboxDndiState->DW17.DnuThmax120, pVeboxDndiState->DW17.DnuThmin120);
1588 MHW_VERBOSEMESSAGE("DW18:DnuDynThmin120 %d, DnuPrt5120 %d", pVeboxDndiState->DW18.DnuDynThmin120, pVeboxDndiState->DW18.DnuPrt5120);
1589 MHW_VERBOSEMESSAGE("DW19:DnuPrt3120 %d, DnuPrt4120 %d, DW20:DnuPrt1120 %d, DnuPrt2120 %d", pVeboxDndiState->DW19.DnuPrt3120, pVeboxDndiState->DW19.DnuPrt4120, pVeboxDndiState->DW20.DnuPrt1120, pVeboxDndiState->DW20.DnuPrt2120);
1590 MHW_VERBOSEMESSAGE("DW21:DnuPrt0120 %d, DnuWd2040 %d, DnuWd2140 %d, DnuWd2240 %d", pVeboxDndiState->DW21.DnuPrt0120, pVeboxDndiState->DW21.DnuWd2040, pVeboxDndiState->DW21.DnuWd2140, pVeboxDndiState->DW21.DnuWd2240);
1591 MHW_VERBOSEMESSAGE("DW22:DnuWd0040 %d, DnuWd0140 %d, DnuWd0240 %d, DnuWd1040 %d, DnuWd1140 %d, DnuWd1240 %d", pVeboxDndiState->DW22.DnuWd0040, pVeboxDndiState->DW22.DnuWd0140, pVeboxDndiState->DW22.DnuWd0240, pVeboxDndiState->DW22.DnuWd1040, pVeboxDndiState->DW22.DnuWd1140, pVeboxDndiState->DW22.DnuWd1240);
1592 MHW_VERBOSEMESSAGE("DW23:DnvWr040 %d, DnvWr240 %d, DnvWr340 %d, DnvWr440 %d, DnvWr5140 %d, DnvWr540", pVeboxDndiState->DW23.DnvWr040, pVeboxDndiState->DW23.DnvWr240, pVeboxDndiState->DW23.DnvWr340, pVeboxDndiState->DW23.DnvWr440, pVeboxDndiState->DW23.DnvWr5140, pVeboxDndiState->DW23.DnvWr540);
1593 MHW_VERBOSEMESSAGE("DW24:DnvThmax120 %d, DnvThmin120 %d, DW25:DnvDynThmin120 %d, DnvPrt5120 %d", pVeboxDndiState->DW24.DnvThmax120, pVeboxDndiState->DW24.DnvThmin120, pVeboxDndiState->DW25.DnvDynThmin120, pVeboxDndiState->DW25.DnvPrt5120);
1594 MHW_VERBOSEMESSAGE("DW26:DnvPrt3120 %d, DnvPrt4120 %d, DW27:DnvPrt1120 %d, DnvPrt2120 %d", pVeboxDndiState->DW26.DnvPrt3120, pVeboxDndiState->DW26.DnvPrt4120, pVeboxDndiState->DW27.DnvPrt1120, pVeboxDndiState->DW27.DnvPrt2120);
1595 MHW_VERBOSEMESSAGE("DW28:DnvPrt0120 %d, DnvWd2040 %d, DnvWd2140 %d, DnvWd2240 %d", pVeboxDndiState->DW28.DnvPrt0120, pVeboxDndiState->DW28.DnvWd2040, pVeboxDndiState->DW28.DnvWd2140, pVeboxDndiState->DW28.DnvWd2240);
1596 MHW_VERBOSEMESSAGE("DW29:DnvWd0040 %d, DnvWd0140 %d, DnvWd0240 %d, DnvWd1040 %d, DnvWd1140 %d, DnvWd1240 %d", pVeboxDndiState->DW29.DnvWd0040, pVeboxDndiState->DW29.DnvWd0140, pVeboxDndiState->DW29.DnvWd0240, pVeboxDndiState->DW29.DnvWd1040, pVeboxDndiState->DW29.DnvWd1140, pVeboxDndiState->DW29.DnvWd1240);
1597 MHW_VERBOSEMESSAGE("DW30:EightDirectionEdgeThreshold %d, ValidPixelThreshold %d", pVeboxDndiState->DW30.EightDirectionEdgeThreshold, pVeboxDndiState->DW30.ValidPixelThreshold);
1598 MHW_VERBOSEMESSAGE("DW31:LargeSobelThreshold %d, SmallSobelCountThreshold %d, SmallSobelThreshold %d", pVeboxDndiState->DW31.LargeSobelThreshold, pVeboxDndiState->DW31.SmallSobelCountThreshold, pVeboxDndiState->DW31.SmallSobelThreshold);
1599 MHW_VERBOSEMESSAGE("DW32:BlockSigmaDiffThreshold %d, LargeSobelCountThreshold %d, MedianSobelCountThreshold %d, DW33:MaxSobelThreshold %d", pVeboxDndiState->DW32.BlockSigmaDiffThreshold, pVeboxDndiState->DW32.LargeSobelCountThreshold, pVeboxDndiState->DW32.MedianSobelCountThreshold, pVeboxDndiState->DW33.MaxSobelThreshold);
1600 MHW_VERBOSEMESSAGE("DW34:SmoothMvThreshold %d, SadTightThreshold %d, ContentAdaptiveThresholdSlope %d, StmmC2 %d, SignBitForSmoothMvThreshold %d, SignBitForMaximumStmm %d, SignBitForMinimumStmm %d, Reserved1104 %d",
1601 pVeboxDndiState->DW34.SmoothMvThreshold,pVeboxDndiState->DW34.SadTightThreshold,pVeboxDndiState->DW34.ContentAdaptiveThresholdSlope,pVeboxDndiState->DW34.StmmC2,pVeboxDndiState->DW34.SignBitForSmoothMvThreshold,pVeboxDndiState->DW34.SignBitForMaximumStmm, pVeboxDndiState->DW34.SignBitForMinimumStmm,pVeboxDndiState->DW34.Reserved1104);
1602 MHW_VERBOSEMESSAGE("DW35:MaximumStmm %d, MultiplierForVecm %d, Reserved1134 %d, BlendingConstantAcrossTimeForSmallValuesOfStmm %d, BlendingConstantAcrossTimeForLargeValuesOfStmm %d, StmmBlendingConstantSelect %d",
1603 pVeboxDndiState->DW35.MaximumStmm,pVeboxDndiState->DW35.MultiplierForVecm,pVeboxDndiState->DW35.Reserved1134,pVeboxDndiState->DW35.BlendingConstantAcrossTimeForSmallValuesOfStmm,pVeboxDndiState->DW35.BlendingConstantAcrossTimeForLargeValuesOfStmm,pVeboxDndiState->DW35.StmmBlendingConstantSelect);
1604 MHW_VERBOSEMESSAGE("DW36:FmdTemporalDifferenceThreshold %d, LumatdmWt %d, ChromatdmWt %d, StmmOutputShift %d, StmmShiftUp %d, StmmShiftDown %d, MinimumStmm %d",
1605 pVeboxDndiState->DW36.FmdTemporalDifferenceThreshold,pVeboxDndiState->DW36.LumatdmWt,pVeboxDndiState->DW36.ChromatdmWt,pVeboxDndiState->DW36.StmmOutputShift,pVeboxDndiState->DW36.StmmShiftUp,pVeboxDndiState->DW36.StmmShiftDown,pVeboxDndiState->DW36.MinimumStmm);
1606 MHW_VERBOSEMESSAGE("DW37:CoringThresholdForSvcm %d, DeltabitValueForSvcm %d, Reserved1196 %d, CoringThresholdForShcm %d, DeltabitValueForShcm %d, Reserved1212 %d",
1607 pVeboxDndiState->DW37.CoringThresholdForSvcm,pVeboxDndiState->DW37.DeltabitValueForSvcm,pVeboxDndiState->DW37.Reserved1196,pVeboxDndiState->DW37.CoringThresholdForShcm,pVeboxDndiState->DW37.DeltabitValueForShcm,pVeboxDndiState->DW37.Reserved1212);
1608 MHW_VERBOSEMESSAGE("DW38:Reserved1216 %d, DnDiTopFirst %d, Reserved1220 %d, McdiEnable %d, FmdTearThreshold %d, CatThreshold %d, Fmd2VerticalDifferenceThreshold %d, Fmd1VerticalDifferenceThreshold %d",
1609 pVeboxDndiState->DW38.Reserved1216,pVeboxDndiState->DW38.DnDiTopFirst,pVeboxDndiState->DW38.Reserved1220,pVeboxDndiState->DW38.McdiEnable,pVeboxDndiState->DW38.FmdTearThreshold,pVeboxDndiState->DW38.CatThreshold,pVeboxDndiState->DW38.Fmd2VerticalDifferenceThreshold,pVeboxDndiState->DW38.Fmd1VerticalDifferenceThreshold);
1610 MHW_VERBOSEMESSAGE("DW39:SadTha %d, SadThb %d, ProgressiveCadenceReconstructionFor1StFieldOfCurrentFrame %d, McPixelConsistencyThreshold %d, ProgressiveCadenceReconstructionForSecondFieldOfPreviousFrame %d, Reserved1266 %d, NeighborPixelThreshold %d, ChromaSmallerWindowForTdm %d, LumaSmallerWindowForTdm %d, Fastercovergence %d, Reserved1274 %d",
1611 pVeboxDndiState->DW39.SadTha,pVeboxDndiState->DW39.SadThb,pVeboxDndiState->DW39.ProgressiveCadenceReconstructionFor1StFieldOfCurrentFrame,pVeboxDndiState->DW39.McPixelConsistencyThreshold,pVeboxDndiState->DW39.ProgressiveCadenceReconstructionForSecondFieldOfPreviousFrame,
1612 pVeboxDndiState->DW39.Reserved1266,pVeboxDndiState->DW39.NeighborPixelThreshold,pVeboxDndiState->DW39.ChromaSmallerWindowForTdm, pVeboxDndiState->DW39.LumaSmallerWindowForTdm,pVeboxDndiState->DW39.Fastercovergence,pVeboxDndiState->DW39.Reserved1274);
1613 MHW_VERBOSEMESSAGE("DW40:SadWt0 %d, SadWt1 %d, SadWt2 %d, SadWt3 %d", pVeboxDndiState->DW40.SadWt0, pVeboxDndiState->DW40.SadWt1, pVeboxDndiState->DW40.SadWt2, pVeboxDndiState->DW40.SadWt3);
1614 MHW_VERBOSEMESSAGE("DW41:SadWt4 %d, SadWt6 %d, CoringThresholdForLumaSadCalculation %d, CoringThresholdForChromaSadCalculation %d", pVeboxDndiState->DW41.SadWt4, pVeboxDndiState->DW41.SadWt6, pVeboxDndiState->DW41.CoringThresholdForLumaSadCalculation, pVeboxDndiState->DW41.CoringThresholdForChromaSadCalculation);
1615 MHW_VERBOSEMESSAGE("DW42:ParDiffcheckslackthreshold %d, ParTearinghighthreshold %d, ParTearinglowthreshold %d, ParDirectioncheckth %d, ParSyntheticcontentcheck %d, ParLocalcheck %d, ParUsesyntheticcontentmedian %d, BypassDeflicker %d, Reserved1375 %d",
1616 pVeboxDndiState->DW42.ParDiffcheckslackthreshold,pVeboxDndiState->DW42.ParTearinghighthreshold,pVeboxDndiState->DW42.ParTearinglowthreshold,pVeboxDndiState->DW42.ParDirectioncheckth,pVeboxDndiState->DW42.ParSyntheticcontentcheck,
1617 pVeboxDndiState->DW42.ParLocalcheck,pVeboxDndiState->DW42.ParUsesyntheticcontentmedian,pVeboxDndiState->DW42.BypassDeflicker, pVeboxDndiState->DW42.Reserved1375);
1618 MHW_VERBOSEMESSAGE("DW43:Lpfwtlut0 %d, Lpfwtlut1 %d, Lpfwtlut2 %d, Lpfwtlut3 %d", pVeboxDndiState->DW43.Lpfwtlut0, pVeboxDndiState->DW43.Lpfwtlut1, pVeboxDndiState->DW43.Lpfwtlut2, pVeboxDndiState->DW43.Lpfwtlut3);
1619 MHW_VERBOSEMESSAGE("DW44:Lpfwtlut4 %d, Lpfwtlut5 %d, Lpfwtlut6 %d, Lpfwtlut7 %d", pVeboxDndiState->DW44.Lpfwtlut4, pVeboxDndiState->DW44.Lpfwtlut5, pVeboxDndiState->DW44.Lpfwtlut6, pVeboxDndiState->DW44.Lpfwtlut7);
1620 MHW_VERBOSEMESSAGE("DW45:TdmUvThreshold %d, HvUvThreshold %d, TdmHarmonicFactorSynthetic %d, TdmHarmonicFactorNatural %d, SynthticFrame %d, SyntheticContentThreshold %d", pVeboxDndiState->DW45.TdmUvThreshold, pVeboxDndiState->DW45.HvUvThreshold, pVeboxDndiState->DW45.TdmHarmonicFactorSynthetic, pVeboxDndiState->DW45.TdmHarmonicFactorNatural, pVeboxDndiState->DW45.SynthticFrame, pVeboxDndiState->DW45.SyntheticContentThreshold);
1621 MHW_VERBOSEMESSAGE("DW46:SvcmHarmonicFactorSynthetic %d, ShcmHarmonicFactorSynthetic %d, SvcmHarmonicFactorNatural %d, ShcmHarmonicFactorNatural %d, HarmonicCounterThreshold %d, MaxHarmonicCounterThreshold %d, NaturalContentThreshold %d, Reserved1501 %d",
1622 pVeboxDndiState->DW46.SvcmHarmonicFactorSynthetic, pVeboxDndiState->DW46.ShcmHarmonicFactorSynthetic, pVeboxDndiState->DW46.SvcmHarmonicFactorNatural, pVeboxDndiState->DW46.ShcmHarmonicFactorNatural, pVeboxDndiState->DW46.HarmonicCounterThreshold, pVeboxDndiState->DW46.MaxHarmonicCounterThreshold, pVeboxDndiState->DW46.NaturalContentThreshold, pVeboxDndiState->DW46.Reserved1501);
1623 MHW_VERBOSEMESSAGE("DW47:MaximumValue %d, DW48:ShiftingValue %d, HvYThreshold %d, NumInlinerNumeratorThreshold %d, NumInlinerDenominatorThreshold %d, Reserved1556 %d", pVeboxDndiState->DW47.MaximumValue, pVeboxDndiState->DW48.ShiftingValue, pVeboxDndiState->DW48.HvYThreshold, pVeboxDndiState->DW48.NumInlinerNumeratorThreshold, pVeboxDndiState->DW48.NumInlinerDenominatorThreshold, pVeboxDndiState->DW48.Reserved1556);
1624 MHW_VERBOSEMESSAGE("DW49:ChromaStadTh %d, LumaStadTh %d", pVeboxDndiState->DW49.ChromaStadTh, pVeboxDndiState->DW49.LumaStadTh);
1625 MHW_VERBOSEMESSAGE("DW50:LumaUniformityHighTh1 %d, LumaUniformityHighTh2 %d, LumaUniformityLowTh1 %d, LumaUniformityLowTh2 %d", pVeboxDndiState->DW50.LumaUniformityHighTh1, pVeboxDndiState->DW50.LumaUniformityHighTh2, pVeboxDndiState->DW50.LumaUniformityLowTh1, pVeboxDndiState->DW50.LumaUniformityLowTh2);
1626 MHW_VERBOSEMESSAGE("DW51: ChromaUniformityHighTh1 %d, ChromaUniformityHighTh2 %d, ChromaUniformityLowTh1 %d, ChromaUniformityLowTh2 %d", pVeboxDndiState->DW51.ChromaUniformityHighTh1, pVeboxDndiState->DW51.ChromaUniformityHighTh2, pVeboxDndiState->DW51.ChromaUniformityLowTh1, pVeboxDndiState->DW51.ChromaUniformityLowTh2);
1627 MHW_VERBOSEMESSAGE("DW52:_4X4TemporalGneThresholdCount %d", pVeboxDndiState->DW52._4X4TemporalGneThresholdCount);
1628
1629 return MOS_STATUS_SUCCESS;
1630 }
1631
SetVeboxDndiState(PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams)1632 MOS_STATUS SetVeboxDndiState(
1633 PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams)
1634 {
1635 MHW_FUNCTION_ENTER;
1636
1637 MHW_VEBOX_HEAP *pVeboxHeap = nullptr;
1638 uint32_t uiOffset = 0;
1639 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1640
1641 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD *pVeboxDndiState, mVeboxDndiState;
1642
1643 MHW_CHK_NULL_RETURN(pVeboxDndiParams);
1644 MHW_CHK_NULL_RETURN(m_veboxHeap);
1645 pVeboxHeap = m_veboxHeap;
1646
1647 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
1648 pVeboxDndiState =
1649 (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
1650 pVeboxHeap->uiDndiStateOffset +
1651 uiOffset);
1652
1653 MHW_CHK_NULL_RETURN(pVeboxDndiState);
1654
1655 *pVeboxDndiState = mVeboxDndiState;
1656
1657 pVeboxDndiState->DW0.DenoiseMaximumHistory = pVeboxDndiParams->dwDenoiseMaximumHistory;
1658 pVeboxDndiState->DW0.DenoiseStadThreshold = pVeboxDndiParams->dwDenoiseSTADThreshold > 4095 ? 4095 : pVeboxDndiParams->dwDenoiseSTADThreshold;
1659 pVeboxDndiState->DW1.DenoiseAsdThreshold = pVeboxDndiParams->dwDenoiseASDThreshold;
1660 pVeboxDndiState->DW1.DenoiseHistoryIncrease = pVeboxDndiParams->dwDenoiseHistoryDelta;
1661 pVeboxDndiState->DW1.DenoiseMovingPixelThreshold = pVeboxDndiParams->dwDenoiseMPThreshold;
1662 pVeboxDndiState->DW2.TemporalDifferenceThreshold = pVeboxDndiParams->dwTDThreshold;
1663 pVeboxDndiState->DW3.LowTemporalDifferenceThreshold = pVeboxDndiParams->dwLTDThreshold;
1664 pVeboxDndiState->DW3.ProgressiveDn = pVeboxDndiParams->bProgressiveDN;
1665 pVeboxDndiState->DW3.HotPixelCountLuma = pVeboxDndiParams->dwHotPixelCount;
1666 pVeboxDndiState->DW4.DenoiseThresholdForSumOfComplexityMeasureLuma = pVeboxDndiParams->dwDenoiseSCMThreshold;
1667 pVeboxDndiState->DW4.HotPixelThresholdLuma = pVeboxDndiParams->dwHotPixelThreshold;
1668 pVeboxDndiState->DW5.ChromaDenoiseStadThreshold = pVeboxDndiParams->dwChromaSTADThreshold;
1669 pVeboxDndiState->DW5.HotPixelCountChromaU = m_chromaParams.dwHotPixelCountChromaU;
1670 pVeboxDndiState->DW5.HotPixelThresholdChromaU = m_chromaParams.dwHotPixelThresholdChromaU;
1671 pVeboxDndiState->DW6.ChromaDenoiseEnable = pVeboxDndiParams->bChromaDNEnable;
1672 pVeboxDndiState->DW6.ChromaTemporalDifferenceThreshold = pVeboxDndiParams->dwChromaTDThreshold;
1673 pVeboxDndiState->DW7.ChromaLowTemporalDifferenceThreshold = pVeboxDndiParams->dwChromaLTDThreshold;
1674 pVeboxDndiState->DW7.HotPixelCountChromaV = m_chromaParams.dwHotPixelCountChromaV;
1675 pVeboxDndiState->DW7.HotPixelThresholdChromaV = m_chromaParams.dwHotPixelThresholdChromaV;
1676 pVeboxDndiState->DW8.ChromaDenoiseMovingPixelThreshold = m_chromaParams.dwHotPixelThresholdChromaV;
1677
1678 pVeboxDndiState->DW9.DnyWr040 = pVeboxDndiParams->dwPixRangeWeight[0];
1679 pVeboxDndiState->DW9.DnyWr140 = pVeboxDndiParams->dwPixRangeWeight[1];
1680 pVeboxDndiState->DW9.DnyWr240 = pVeboxDndiParams->dwPixRangeWeight[2];
1681 pVeboxDndiState->DW9.DnyWr340 = pVeboxDndiParams->dwPixRangeWeight[3];
1682 pVeboxDndiState->DW9.DnyWr440 = pVeboxDndiParams->dwPixRangeWeight[4];
1683 pVeboxDndiState->DW9.DnyWr540 = pVeboxDndiParams->dwPixRangeWeight[5];
1684
1685 pVeboxDndiState->DW11.DnyPrt5120 = pVeboxDndiParams->dwPixRangeThreshold[5];
1686 pVeboxDndiState->DW12.DnyPrt4120 = pVeboxDndiParams->dwPixRangeThreshold[4];
1687 pVeboxDndiState->DW12.DnyPrt3120 = pVeboxDndiParams->dwPixRangeThreshold[3];
1688 pVeboxDndiState->DW13.DnyPrt2120 = pVeboxDndiParams->dwPixRangeThreshold[2];
1689 pVeboxDndiState->DW13.DnyPrt1120 = pVeboxDndiParams->dwPixRangeThreshold[1];
1690 pVeboxDndiState->DW14.DnyPrt0120 = pVeboxDndiParams->dwPixRangeThreshold[0];
1691
1692 pVeboxDndiState->DW16.DnuWr040 = m_chromaParams.dwPixRangeWeightChromaU[0];
1693 pVeboxDndiState->DW16.DnuWr140 = m_chromaParams.dwPixRangeWeightChromaU[1];
1694 pVeboxDndiState->DW16.DnuWr240 = m_chromaParams.dwPixRangeWeightChromaU[2];
1695 pVeboxDndiState->DW16.DnuWr340 = m_chromaParams.dwPixRangeWeightChromaU[3];
1696 pVeboxDndiState->DW16.DnuWr440 = m_chromaParams.dwPixRangeWeightChromaU[4];
1697 pVeboxDndiState->DW16.DnuWr540 = m_chromaParams.dwPixRangeWeightChromaU[5];
1698
1699 pVeboxDndiState->DW18.DnuPrt5120 = m_chromaParams.dwPixRangeThresholdChromaU[5];
1700 pVeboxDndiState->DW19.DnuPrt4120 = m_chromaParams.dwPixRangeThresholdChromaU[4];
1701 pVeboxDndiState->DW19.DnuPrt3120 = m_chromaParams.dwPixRangeThresholdChromaU[3];
1702 pVeboxDndiState->DW20.DnuPrt2120 = m_chromaParams.dwPixRangeThresholdChromaU[2];
1703 pVeboxDndiState->DW20.DnuPrt1120 = m_chromaParams.dwPixRangeThresholdChromaU[1];
1704 pVeboxDndiState->DW21.DnuPrt0120 = m_chromaParams.dwPixRangeThresholdChromaU[0];
1705
1706 pVeboxDndiState->DW23.DnvWr040 = m_chromaParams.dwPixRangeWeightChromaV[0];
1707 pVeboxDndiState->DW23.DnvWr5140 = m_chromaParams.dwPixRangeWeightChromaV[1];
1708 pVeboxDndiState->DW23.DnvWr240 = m_chromaParams.dwPixRangeWeightChromaV[2];
1709 pVeboxDndiState->DW23.DnvWr340 = m_chromaParams.dwPixRangeWeightChromaV[3];
1710 pVeboxDndiState->DW23.DnvWr440 = m_chromaParams.dwPixRangeWeightChromaV[4];
1711 pVeboxDndiState->DW23.DnvWr540 = m_chromaParams.dwPixRangeWeightChromaV[5];
1712
1713 pVeboxDndiState->DW25.DnvPrt5120 = m_chromaParams.dwPixRangeThresholdChromaV[5];
1714 pVeboxDndiState->DW26.DnvPrt4120 = m_chromaParams.dwPixRangeThresholdChromaV[4];
1715 pVeboxDndiState->DW26.DnvPrt3120 = m_chromaParams.dwPixRangeThresholdChromaV[3];
1716 pVeboxDndiState->DW27.DnvPrt2120 = m_chromaParams.dwPixRangeThresholdChromaV[2];
1717 pVeboxDndiState->DW27.DnvPrt1120 = m_chromaParams.dwPixRangeThresholdChromaV[1];
1718 pVeboxDndiState->DW28.DnvPrt0120 = m_chromaParams.dwPixRangeThresholdChromaV[0];
1719
1720 pVeboxDndiState->DW38.DnDiTopFirst = pVeboxDndiParams->bDNDITopFirst;
1721
1722 pVeboxDndiState->DW39.ProgressiveCadenceReconstructionFor1StFieldOfCurrentFrame = pVeboxDndiParams->dwFMDFirstFieldCurrFrame;
1723 pVeboxDndiState->DW39.ProgressiveCadenceReconstructionForSecondFieldOfPreviousFrame = pVeboxDndiParams->dwFMDSecondFieldPrevFrame;
1724
1725 // Improved Deinterlacing
1726 pVeboxDndiState->DW36.LumatdmWt = pVeboxDndiParams->dwLumaTDMWeight;
1727 pVeboxDndiState->DW36.ChromatdmWt = pVeboxDndiParams->dwChromaTDMWeight;
1728
1729 pVeboxDndiState->DW37.CoringThresholdForSvcm = pVeboxDndiParams->dwSVCMThreshold;
1730 pVeboxDndiState->DW37.DeltabitValueForSvcm = pVeboxDndiParams->dwSVCMDelta;
1731 pVeboxDndiState->DW37.CoringThresholdForShcm = pVeboxDndiParams->dwSHCMThreshold;
1732 pVeboxDndiState->DW37.DeltabitValueForShcm = pVeboxDndiParams->dwSHCMDelta;
1733
1734 pVeboxDndiState->DW39.ChromaSmallerWindowForTdm = pVeboxDndiParams->bTDMChromaSmallerWindow;
1735 pVeboxDndiState->DW39.LumaSmallerWindowForTdm = pVeboxDndiParams->bTDMLumaSmallerWindow;
1736 pVeboxDndiState->DW39.Fastercovergence = pVeboxDndiParams->bFasterConvergence;
1737
1738 pVeboxDndiState->DW40.SadWt0 = pVeboxDndiParams->dwSADWT0;
1739 pVeboxDndiState->DW40.SadWt1 = pVeboxDndiParams->dwSADWT1;
1740 pVeboxDndiState->DW40.SadWt2 = pVeboxDndiParams->dwSADWT2;
1741 pVeboxDndiState->DW40.SadWt3 = pVeboxDndiParams->dwSADWT3;
1742 pVeboxDndiState->DW41.SadWt4 = pVeboxDndiParams->dwSADWT4;
1743 pVeboxDndiState->DW41.SadWt6 = pVeboxDndiParams->dwSADWT6;
1744
1745 pVeboxDndiState->DW41.CoringThresholdForLumaSadCalculation = pVeboxDndiParams->dwLumaTDMCoringThreshold;
1746 pVeboxDndiState->DW41.CoringThresholdForChromaSadCalculation = pVeboxDndiParams->dwChromaTDMCoringThreshold;
1747
1748 pVeboxDndiState->DW42.ParDiffcheckslackthreshold = pVeboxDndiParams->dwDiffCheckSlackThreshold;
1749 pVeboxDndiState->DW42.ParTearinghighthreshold = pVeboxDndiParams->dwTearingHighThreshold;
1750 pVeboxDndiState->DW42.ParTearinglowthreshold = pVeboxDndiParams->dwTearingLowThreshold;
1751 pVeboxDndiState->DW42.ParDirectioncheckth = pVeboxDndiParams->dwDirectionCheckThreshold;
1752 pVeboxDndiState->DW42.ParSyntheticcontentcheck = pVeboxDndiParams->bSyntheticContentCheck;
1753 pVeboxDndiState->DW42.ParLocalcheck = pVeboxDndiParams->bLocalCheck;
1754 pVeboxDndiState->DW42.ParUsesyntheticcontentmedian = pVeboxDndiParams->bUseSyntheticContentMedian;
1755 pVeboxDndiState->DW42.BypassDeflicker = pVeboxDndiParams->bBypassDeflickerFilter;
1756
1757 pVeboxDndiState->DW43.Lpfwtlut0 = pVeboxDndiParams->dwLPFWtLUT0;
1758 pVeboxDndiState->DW43.Lpfwtlut1 = pVeboxDndiParams->dwLPFWtLUT1;
1759 pVeboxDndiState->DW43.Lpfwtlut2 = pVeboxDndiParams->dwLPFWtLUT2;
1760 pVeboxDndiState->DW43.Lpfwtlut3 = pVeboxDndiParams->dwLPFWtLUT3;
1761 pVeboxDndiState->DW44.Lpfwtlut4 = pVeboxDndiParams->dwLPFWtLUT4;
1762 pVeboxDndiState->DW44.Lpfwtlut5 = pVeboxDndiParams->dwLPFWtLUT5;
1763 pVeboxDndiState->DW44.Lpfwtlut6 = pVeboxDndiParams->dwLPFWtLUT6;
1764 pVeboxDndiState->DW44.Lpfwtlut7 = pVeboxDndiParams->dwLPFWtLUT7;
1765
1766 pVeboxDndiState->DW10.DnyThmin120 = 512;
1767 pVeboxDndiState->DW10.DnyThmax120 = 2048;
1768 pVeboxDndiState->DW11.DnyDynThmin120 = 256;
1769
1770 pVeboxDndiState->DW14.DnyWd2040 = 10;
1771 pVeboxDndiState->DW14.DnyWd2140 = 10;
1772 pVeboxDndiState->DW14.DnyWd2240 = 8;
1773 pVeboxDndiState->DW15.DnyWd0040 = 12;
1774 pVeboxDndiState->DW15.DnyWd0140 = 12;
1775 pVeboxDndiState->DW15.DnyWd0240 = 10;
1776 pVeboxDndiState->DW15.DnyWd1040 = 12;
1777 pVeboxDndiState->DW15.DnyWd1140 = 11;
1778 pVeboxDndiState->DW15.DnyWd1240 = 10;
1779
1780 pVeboxDndiState->DW17.DnuThmin120 = 512;
1781 pVeboxDndiState->DW17.DnuThmax120 = 2048;
1782 pVeboxDndiState->DW18.DnuDynThmin120 = 256;
1783
1784 pVeboxDndiState->DW21.DnuWd2040 = 10;
1785 pVeboxDndiState->DW21.DnuWd2140 = 10;
1786 pVeboxDndiState->DW21.DnuWd2240 = 8;
1787 pVeboxDndiState->DW22.DnuWd0040 = 12;
1788 pVeboxDndiState->DW22.DnuWd0140 = 12;
1789 pVeboxDndiState->DW22.DnuWd0240 = 10;
1790 pVeboxDndiState->DW22.DnuWd1040 = 12;
1791 pVeboxDndiState->DW22.DnuWd1140 = 11;
1792 pVeboxDndiState->DW22.DnuWd1240 = 10;
1793
1794 pVeboxDndiState->DW24.DnvThmin120 = 512;
1795 pVeboxDndiState->DW24.DnvThmax120 = 2048;
1796 pVeboxDndiState->DW25.DnvDynThmin120 = 256;
1797
1798 pVeboxDndiState->DW28.DnvWd2040 = 10;
1799 pVeboxDndiState->DW28.DnvWd2140 = 10;
1800 pVeboxDndiState->DW28.DnvWd2240 = 8;
1801 pVeboxDndiState->DW29.DnvWd0040 = 12;
1802 pVeboxDndiState->DW29.DnvWd0140 = 12;
1803 pVeboxDndiState->DW29.DnvWd0240 = 10;
1804 pVeboxDndiState->DW29.DnvWd1040 = 12;
1805 pVeboxDndiState->DW29.DnvWd1140 = 11;
1806 pVeboxDndiState->DW29.DnvWd1240 = 10;
1807
1808 pVeboxDndiState->DW31.SmallSobelCountThreshold = 6;
1809 pVeboxDndiState->DW32.LargeSobelCountThreshold = 6;
1810 pVeboxDndiState->DW32.MedianSobelCountThreshold = 40;
1811
1812 pVeboxDndiState->DW34.StmmC2 = 2;
1813 pVeboxDndiState->DW35.MaximumStmm = 150;
1814 pVeboxDndiState->DW35.MultiplierForVecm = 30;
1815 pVeboxDndiState->DW35.BlendingConstantAcrossTimeForSmallValuesOfStmm = 125;
1816 pVeboxDndiState->DW35.BlendingConstantAcrossTimeForLargeValuesOfStmm = 64;
1817
1818 pVeboxDndiState->DW36.FmdTemporalDifferenceThreshold = 175;
1819 pVeboxDndiState->DW36.StmmOutputShift = 5;
1820 pVeboxDndiState->DW36.StmmShiftUp = 1;
1821 pVeboxDndiState->DW36.MinimumStmm = 118;
1822
1823 pVeboxDndiState->DW38.McdiEnable = 1;
1824 pVeboxDndiState->DW38.FmdTearThreshold = 2;
1825 pVeboxDndiState->DW38.Fmd2VerticalDifferenceThreshold = 100;
1826 pVeboxDndiState->DW38.Fmd1VerticalDifferenceThreshold = 16;
1827
1828 pVeboxDndiState->DW45.SynthticFrame = pVeboxDndiParams->bSyntheticFrame;
1829
1830 // copy the DW0-DW33 SLIM_IPU_DN_PARAMS to VEBOX_DNDI_STATE, DW34-DW48 for DI according to DI DDI setting.
1831 if (pVeboxDndiParams->bEnableSlimIPUDenoise)
1832 {
1833 uint32_t slimIpuDnCmdSize = MHW_VEBOX_SLIM_IPU_DN_CMD_SIZE_INUSE * sizeof(pVeboxDndiState->DW0); //buffer size in use for SLIM IPU DN
1834
1835 if (nullptr == pVeboxDndiParams->pSystemMem || pVeboxDndiParams->MemSizeInBytes != sizeof(*pVeboxDndiState) || pVeboxDndiParams->MemSizeInBytes < slimIpuDnCmdSize)
1836 {
1837 MHW_ASSERTMESSAGE("SlimIPUDenoise size is invaild");
1838 return MOS_STATUS_INVALID_PARAMETER;
1839 }
1840
1841 MOS_SecureMemcpy(pVeboxDndiState, sizeof(*pVeboxDndiState), pVeboxDndiParams->pSystemMem, slimIpuDnCmdSize); // only copy dw0 - dw33 for DN
1842
1843 pVeboxDndiState->DW3.ProgressiveDn = pVeboxDndiParams->bProgressiveDN;
1844 }
1845
1846 if (pVeboxDndiParams->bSCDEnable)
1847 {
1848 pVeboxDndiState->DW34.SignBitForMinimumStmm = 1;
1849 pVeboxDndiState->DW34.SignBitForMaximumStmm = 1;
1850 pVeboxDndiState->DW34.SignBitForSmoothMvThreshold = 1;
1851 }
1852 else
1853 {
1854 pVeboxDndiState->DW34.SignBitForMinimumStmm = 0;
1855 pVeboxDndiState->DW34.SignBitForMaximumStmm = 0;
1856 pVeboxDndiState->DW34.SignBitForSmoothMvThreshold = 0;
1857 }
1858
1859 // GNE setting
1860 if (bTGNEEnable)
1861 {
1862 SetVeboxTGNEDndiState((uint8_t *)pVeboxDndiState);
1863 }
1864 else
1865 {
1866 SetVeboxSGNEDndiState((uint8_t *)pVeboxDndiState);
1867 }
1868
1869 DumpDNDIStates((uint8_t *)pVeboxDndiState);
1870
1871 return eStatus;
1872 }
1873
1874 //!
1875 //! \brief Set Vebox Iecp STDSTE State
1876 //! \details Set STE part of the VEBOX IECP States
1877 //! \param [in] pVeboxStdSteState
1878 //! Pointer to VEBOX IECP STD/E States
1879 //! \param [in] pColorPipeParams
1880 //! Pointer to COLOR PIPE Params
1881 //! \return void
1882 //!
SetVeboxIecpStateSTE(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_STD_STE_STATE_CMD * pVeboxStdSteState,PMHW_COLORPIPE_PARAMS pColorPipeParams)1883 MOS_STATUS SetVeboxIecpStateSTE(
1884 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_STD_STE_STATE_CMD* pVeboxStdSteState,
1885 PMHW_COLORPIPE_PARAMS pColorPipeParams)
1886 {
1887 MHW_FUNCTION_ENTER;
1888
1889 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1890
1891 MHW_CHK_NULL_RETURN(pVeboxStdSteState);
1892 MHW_CHK_NULL_RETURN(pColorPipeParams);
1893
1894 // STD detects the skin like colors and passes a grade of skin tone
1895 // color to STE (Skin Tone Enhancement). STD operates in the YUV color
1896 // space.The level of skin tone detection is determined through skin
1897 // tone factors in UV plane. If skin tone detection in VY plane is also
1898 // enabled, the final skin tone factor is given by the minimum of STD
1899 // in the (U, V) plane and (V, Y) plane.
1900 //
1901 // The skin tone factor will also be passed to ACE and TCC to indicate
1902 // the strength of skin tone likelihood.
1903 pVeboxStdSteState->DW0.StdEnable = true;
1904
1905 // Enable skin tone detection in VY plane
1906 pVeboxStdSteState->DW3.VyStdEnable = true;
1907
1908 // Enable STE (Skin Tone Enhancement)
1909 // STE modify the saturation and hue of the pixels which were detected
1910 // as the skin-tone pixels by STD
1911 if (pColorPipeParams->bEnableSTE &&
1912 pColorPipeParams->SteParams.dwSTEFactor > 0)
1913 {
1914 pVeboxStdSteState->DW0.SteEnable = true;
1915
1916 if (pColorPipeParams->SteParams.dwSTEFactor <= MHW_STE_OPTIMAL)
1917 {
1918 pVeboxStdSteState->DW15.Satb1 = MOS_BITFIELD_VALUE((uint32_t)-8, 10);
1919 pVeboxStdSteState->DW15.Satp3 = 31;
1920 pVeboxStdSteState->DW15.Satp2 = 6;
1921 pVeboxStdSteState->DW15.Satp1 = pColorPipeParams->SteParams.satP1;
1922
1923 pVeboxStdSteState->DW16.Sats0 = pColorPipeParams->SteParams.satS0;
1924 pVeboxStdSteState->DW16.Satb3 = 124;
1925 pVeboxStdSteState->DW16.Satb2 = 8;
1926
1927 pVeboxStdSteState->DW17.Sats2 = 297;
1928 pVeboxStdSteState->DW17.Sats1 = pColorPipeParams->SteParams.satS1;
1929
1930 pVeboxStdSteState->DW18.Huep3 = 14;
1931 pVeboxStdSteState->DW18.Huep2 = 6;
1932 pVeboxStdSteState->DW18.Huep1 = MOS_BITFIELD_VALUE((uint32_t)-6, 7);
1933 pVeboxStdSteState->DW18.Sats3 = 256;
1934
1935 pVeboxStdSteState->DW19.Hueb3 = 56;
1936 pVeboxStdSteState->DW19.Hueb2 = 8;
1937 pVeboxStdSteState->DW19.Hueb1 = MOS_BITFIELD_VALUE((uint32_t)-8, 10);
1938
1939 pVeboxStdSteState->DW20.Hues1 = 85;
1940 pVeboxStdSteState->DW20.Hues0 = 384;
1941
1942 pVeboxStdSteState->DW21.Hues3 = 256;
1943 pVeboxStdSteState->DW21.Hues2 = 384;
1944 }
1945 else // if (pColorPipeParams->SteParams.dwSTEFactor > MHW_STE_OPTIMAL)
1946 {
1947 pVeboxStdSteState->DW15.Satb1 = 0;
1948 pVeboxStdSteState->DW15.Satp3 = 31;
1949 pVeboxStdSteState->DW15.Satp2 = 31;
1950 pVeboxStdSteState->DW15.Satp1 = pColorPipeParams->SteParams.satP1;
1951
1952 pVeboxStdSteState->DW16.Sats0 = pColorPipeParams->SteParams.satS0;
1953 pVeboxStdSteState->DW16.Satb3 = 124;
1954 pVeboxStdSteState->DW16.Satb2 = 124;
1955
1956 pVeboxStdSteState->DW17.Sats2 = 256;
1957 pVeboxStdSteState->DW17.Sats1 = pColorPipeParams->SteParams.satS1;
1958
1959 pVeboxStdSteState->DW18.Huep3 = 14;
1960 pVeboxStdSteState->DW18.Huep2 = 14;
1961 pVeboxStdSteState->DW18.Huep1 = 14;
1962 pVeboxStdSteState->DW18.Sats3 = 256;
1963
1964 pVeboxStdSteState->DW19.Hueb3 = 56;
1965 pVeboxStdSteState->DW19.Hueb2 = 56;
1966 pVeboxStdSteState->DW19.Hueb1 = 56;
1967
1968 pVeboxStdSteState->DW20.Hues1 = 256;
1969 pVeboxStdSteState->DW20.Hues0 = 256;
1970
1971 pVeboxStdSteState->DW21.Hues3 = 256;
1972 pVeboxStdSteState->DW21.Hues2 = 256;
1973 }
1974 }
1975 else if (pColorPipeParams->bEnableSTD)
1976 {
1977 if (nullptr == pColorPipeParams->StdParams.param || pColorPipeParams->StdParams.paraSizeInBytes > pVeboxStdSteState->byteSize)
1978 {
1979 MHW_CHK_STATUS_RETURN(MOS_STATUS_INVALID_PARAMETER);
1980 }
1981
1982 MOS_SecureMemcpy(pVeboxStdSteState, pColorPipeParams->StdParams.paraSizeInBytes, pColorPipeParams->StdParams.param, pColorPipeParams->StdParams.paraSizeInBytes);
1983 }
1984
1985 // Enable Skin Score Output surface to be written by Vebox
1986 pVeboxStdSteState->DW1.StdScoreOutput = (pColorPipeParams->bEnableLACE && pColorPipeParams->LaceParams.bSTD) || pColorPipeParams->bEnableSTD;
1987
1988 return eStatus;
1989 }
1990
1991 //!
1992 //! \brief Set VEBOX IECP TCC State
1993 //! \details Set Vebox TCC state
1994 //! \param [in] pVeboxTccState
1995 //! Pointer to VEBOX IECP TCC States
1996 //! \param [in] pColorPipeParams
1997 //! Pointer to COLOR PIPE Params
1998 //! \return void
1999 //!
SetVeboxIecpStateTCC(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_TCC_STATE_CMD * pVeboxTccState,PMHW_COLORPIPE_PARAMS pColorPipeParams)2000 void SetVeboxIecpStateTCC(
2001 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_TCC_STATE_CMD* pVeboxTccState,
2002 PMHW_COLORPIPE_PARAMS pColorPipeParams)
2003 {
2004 MHW_FUNCTION_ENTER;
2005
2006 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxTccState);
2007 MHW_CHK_NULL_NO_STATUS_RETURN(pColorPipeParams);
2008
2009 // TCC allows users to custom the color scheme by choosing different
2010 // grades of saturation for each of the six basic colors (red, green,
2011 // blue, magenta, yellow, and cyan).
2012 pVeboxTccState->DW0.TccEnable = true;
2013 pVeboxTccState->DW0.Satfactor1 = pColorPipeParams->TccParams.Magenta;
2014 pVeboxTccState->DW0.Satfactor2 = pColorPipeParams->TccParams.Red;
2015 pVeboxTccState->DW0.Satfactor3 = pColorPipeParams->TccParams.Yellow;
2016 pVeboxTccState->DW1.Satfactor4 = pColorPipeParams->TccParams.Green;
2017 pVeboxTccState->DW1.Satfactor5 = pColorPipeParams->TccParams.Cyan;
2018 pVeboxTccState->DW1.Satfactor6 = pColorPipeParams->TccParams.Blue;
2019 }
2020
2021 //!
2022 //! \brief Set Vebox Iecp ACE/LACE State
2023 //! \details Set VEBOX IECP Ace and Lace States
2024 //! \param [in, out] pVeboxAceLaceState
2025 //! Pointer to VEBOX IECP ACE/LACE States
2026 //! \param [in, out] pVeboxAlphaAoiState
2027 //! Pointer to VEBOX IECP ALPHA/AOI States
2028 //! \param [in] bEnableLACE
2029 //! LACE enabled or not
2030 //! \return void
2031 //!
SetVeboxIecpStateACELACE(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_ACE_LACE_STATE_CMD * pVeboxAceLaceState,mhw::vebox::xe2_hpm_next::Cmd::VEBOX_ALPHA_AOI_STATE_CMD * pVeboxAlphaAoiState,bool bEnableLACE)2032 void SetVeboxIecpStateACELACE(
2033 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_ACE_LACE_STATE_CMD* pVeboxAceLaceState,
2034 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_ALPHA_AOI_STATE_CMD* pVeboxAlphaAoiState,
2035 bool bEnableLACE)
2036 {
2037 MHW_FUNCTION_ENTER;
2038
2039 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxAceLaceState);
2040 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxAlphaAoiState);
2041
2042 // ACE improves the overall contrast of the image and emphasizing
2043 // details when relevant (such as in dark areas)
2044 pVeboxAceLaceState->DW0.AceEnable = true;
2045
2046 // On SKL FullImageHistogram is set in Alpha/AOI state
2047 pVeboxAlphaAoiState->DW0.FullImageHistogram = true;
2048
2049 if (bEnableLACE)
2050 {
2051 // Enable Block level histogram generation
2052 pVeboxAceLaceState->DW0.LaceHistogramEnable = true;
2053 }
2054 else
2055 {
2056 pVeboxAceLaceState->DW0.LaceHistogramEnable = false;
2057 }
2058 }
2059
SetVeboxIecpState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)2060 MOS_STATUS SetVeboxIecpState(
2061 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
2062 {
2063 MHW_FUNCTION_ENTER;
2064
2065 bool bEnableFECSC = false;
2066 PMHW_FORWARD_GAMMA_SEG pFwdGammaSeg;
2067 uint8_t * p3DLUT;
2068 MHW_VEBOX_HEAP *pVeboxHeap;
2069 uint32_t uiOffset;
2070 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2071
2072 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState;
2073
2074 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
2075 MHW_CHK_NULL_RETURN(m_veboxHeap);
2076
2077 pVeboxHeap = m_veboxHeap;
2078 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2079 pVeboxIecpState = (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
2080 pVeboxHeap->uiIecpStateOffset +
2081 uiOffset);
2082
2083 MHW_CHK_NULL_RETURN(pVeboxIecpState);
2084 if (pVeboxIecpParams->iecpstateforFDFB)
2085 {
2086 IecpStateInitializationforFDFB(pVeboxIecpState);
2087 return MOS_STATUS_SUCCESS;
2088 }
2089 else
2090 {
2091 IecpStateInitialization(pVeboxIecpState);
2092 }
2093
2094 if (pVeboxIecpParams->ColorPipeParams.bActive)
2095 {
2096 // Enable STD/E (Skin Tone Detection/Enhancement)
2097 SetVeboxIecpStateSTE(
2098 &pVeboxIecpState->StdSteState,
2099 &pVeboxIecpParams->ColorPipeParams);
2100
2101 // Enable TCC (Total Color Control)
2102 if (pVeboxIecpParams->ColorPipeParams.bEnableTCC)
2103 {
2104 SetVeboxIecpStateTCC(
2105 &pVeboxIecpState->TccState,
2106 &pVeboxIecpParams->ColorPipeParams);
2107 }
2108 }
2109
2110 // Enable ACE (Automatic Contrast Enhancement). Enable LACE if it's enabled.
2111 if (pVeboxIecpParams->bAce ||
2112 (pVeboxIecpParams->ColorPipeParams.bActive &&
2113 pVeboxIecpParams->ColorPipeParams.bEnableACE))
2114 {
2115 SetVeboxIecpStateACELACE(
2116 &pVeboxIecpState->AceState,
2117 &pVeboxIecpState->AlphaAoiState,
2118 (pVeboxIecpParams->ColorPipeParams.bEnableLACE == true) ? true : false);
2119 }
2120
2121 if (pVeboxIecpParams->CapPipeParams.bActive)
2122 {
2123 // IECP needs to operate in YUV space
2124 if ((pVeboxIecpParams->srcFormat != Format_AYUV) &&
2125 (pVeboxIecpParams->dstFormat == Format_AYUV ||
2126 pVeboxIecpParams->dstFormat == Format_Y416 ||
2127 pVeboxIecpParams->ProcAmpParams.bActive ||
2128 pVeboxIecpParams->ColorPipeParams.bActive))
2129 {
2130 bEnableFECSC = true;
2131 }
2132 else if (pVeboxIecpParams->CapPipeParams.FECSCParams.bActive)
2133 {
2134 bEnableFECSC = true;
2135 }
2136 else
2137 {
2138 bEnableFECSC = false;
2139 }
2140
2141 // Enable Front End CSC so that input to IECP will be in YUV color space
2142 if (bEnableFECSC)
2143 {
2144 SetVeboxIecpStateFecsc(&pVeboxIecpState->FrontEndCsc, pVeboxIecpParams);
2145 }
2146
2147 // Enable Color Correction Matrix
2148 if (pVeboxIecpParams->CapPipeParams.ColorCorrectionParams.bActive)
2149 {
2150 SetVeboxIecpStateCcm(
2151 pVeboxIecpState,
2152 &pVeboxIecpParams->CapPipeParams,
2153 65536);
2154 }
2155 }
2156
2157 // Enable Back End CSC for capture pipeline or Vebox output pipe
2158 if (pVeboxIecpParams->CapPipeParams.bActive ||
2159 pVeboxIecpParams->bCSCEnable)
2160 {
2161 SetVeboxIecpStateBecsc(
2162 pVeboxIecpState,
2163 pVeboxIecpParams,
2164 bEnableFECSC);
2165 }
2166
2167 // Enable ProcAmp
2168 if (pVeboxIecpParams->ProcAmpParams.bActive &&
2169 pVeboxIecpParams->ProcAmpParams.bEnabled)
2170 {
2171 SetVeboxIecpStateProcAmp(
2172 &pVeboxIecpState->ProcampState,
2173 &pVeboxIecpParams->ProcAmpParams);
2174 }
2175
2176 if (pVeboxIecpParams && pVeboxIecpParams->CapPipeParams.bActive)
2177 {
2178 SetVeboxCapPipeState(
2179 &pVeboxIecpParams->CapPipeParams);
2180 }
2181
2182 if (pVeboxIecpParams &&
2183 pVeboxIecpParams->CapPipeParams.bActive &&
2184 pVeboxIecpParams->CapPipeParams.FwdGammaParams.bActive)
2185 {
2186 pFwdGammaSeg =
2187 (PMHW_FORWARD_GAMMA_SEG)(pVeboxHeap->pLockedDriverResourceMem +
2188 pVeboxHeap->uiGammaCorrectionStateOffset +
2189 uiOffset);
2190
2191 MHW_CHK_NULL_RETURN(pFwdGammaSeg);
2192 MOS_SecureMemcpy(
2193 pFwdGammaSeg,
2194 sizeof(MHW_FORWARD_GAMMA_SEG) * MHW_FORWARD_GAMMA_SEGMENT_CONTROL_POINT,
2195 &pVeboxIecpParams->CapPipeParams.FwdGammaParams.Segment[0],
2196 sizeof(MHW_FORWARD_GAMMA_SEG) * MHW_FORWARD_GAMMA_SEGMENT_CONTROL_POINT);
2197 }
2198
2199 return eStatus;
2200 }
2201
SetVeboxIecpAceState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)2202 MOS_STATUS SetVeboxIecpAceState(
2203 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
2204 {
2205 MHW_FUNCTION_ENTER;
2206
2207 MHW_ACE_PARAMS *pAceParams;
2208 MHW_LACE_PARAMS *pLaceParams;
2209 MHW_VEBOX_HEAP *pVeboxHeap;
2210 int32_t uiOffset;
2211 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2212 const uint32_t uiFullRangeYOffsetInU16 = 0;
2213 const uint32_t uiLimitedRangeYOffsetInU16 = 4096;
2214 const uint32_t uiUOffsetInU16 = 32768;
2215 const uint32_t uiVOffsetInU16 = 32768;
2216
2217 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *pVeboxIecpState;
2218
2219 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
2220 MHW_CHK_NULL_RETURN(m_veboxHeap);
2221
2222 pVeboxHeap = m_veboxHeap;
2223 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2224
2225 pVeboxIecpState = (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
2226 pVeboxHeap->uiIecpStateOffset +
2227 uiOffset);
2228
2229 MHW_CHK_NULL_RETURN(pVeboxIecpState);
2230
2231 SetVeboxAceLaceState(pVeboxIecpParams, pVeboxIecpState);
2232
2233 if (pVeboxIecpParams->ColorPipeParams.bActive &&
2234 pVeboxIecpParams->ColorPipeParams.bEnableLACE)
2235 {
2236 pLaceParams = &pVeboxIecpParams->ColorPipeParams.LaceParams;
2237
2238 pVeboxIecpState->AceState.DW0.MinAceLuma = pLaceParams->wMinAceLuma;
2239 pVeboxIecpState->AceState.DW12.MaxAceLuma = pLaceParams->wMaxAceLuma;
2240
2241 pVeboxIecpState->AceState.DW13.LaceColorCorrectionEnable = m_laceColorCorrection.bColorCorrectionEnable;
2242 if (m_laceColorCorrection.bYUVFullRange)
2243 {
2244 pVeboxIecpState->AceState.DW13.LaceYOffset = uiFullRangeYOffsetInU16;
2245 pVeboxIecpState->AceState.DW14.LaceUOffset = uiUOffsetInU16;
2246 pVeboxIecpState->AceState.DW14.LaceVOffset = uiVOffsetInU16;
2247 }
2248 else
2249 {
2250 pVeboxIecpState->AceState.DW13.LaceYOffset = uiLimitedRangeYOffsetInU16;
2251 pVeboxIecpState->AceState.DW14.LaceUOffset = uiUOffsetInU16;
2252 pVeboxIecpState->AceState.DW14.LaceVOffset = uiVOffsetInU16;
2253 }
2254
2255 pVeboxIecpState->AceState.DW15.LaceGammaCurveBias0 = m_laceColorCorrection.colorWeightLut.iBias[0];
2256 pVeboxIecpState->AceState.DW15.LaceGammaCurvePoint0 = m_laceColorCorrection.colorWeightLut.iPoint[0];
2257 pVeboxIecpState->AceState.DW15.LaceGammaCurveSlope0 = m_laceColorCorrection.colorWeightLut.iSlope[0];
2258
2259 pVeboxIecpState->AceState.DW16.LaceGammaCurveBias1 = m_laceColorCorrection.colorWeightLut.iBias[1];
2260 pVeboxIecpState->AceState.DW16.LaceGammaCurvePoint1 = m_laceColorCorrection.colorWeightLut.iPoint[1];
2261 pVeboxIecpState->AceState.DW16.LaceGammaCurveSlope1 = m_laceColorCorrection.colorWeightLut.iSlope[1];
2262
2263 pVeboxIecpState->AceState.DW17.LaceGammaCurveBias2 = m_laceColorCorrection.colorWeightLut.iBias[2];
2264 pVeboxIecpState->AceState.DW17.LaceGammaCurvePoint2 = m_laceColorCorrection.colorWeightLut.iPoint[2];
2265 pVeboxIecpState->AceState.DW17.LaceGammaCurveSlope2 = m_laceColorCorrection.colorWeightLut.iSlope[2];
2266
2267 pVeboxIecpState->AceState.DW18.LaceGammaCurveBias3 = m_laceColorCorrection.colorWeightLut.iBias[3];
2268 pVeboxIecpState->AceState.DW18.LaceGammaCurvePoint3 = m_laceColorCorrection.colorWeightLut.iPoint[3];
2269 pVeboxIecpState->AceState.DW18.LaceGammaCurveSlope3 = m_laceColorCorrection.colorWeightLut.iSlope[3];
2270
2271 pVeboxIecpState->AceState.DW19.LaceGammaCurveBias4 = m_laceColorCorrection.colorWeightLut.iBias[4];
2272 pVeboxIecpState->AceState.DW19.LaceGammaCurvePoint4 = m_laceColorCorrection.colorWeightLut.iPoint[4];
2273 pVeboxIecpState->AceState.DW19.LaceGammaCurveSlope4 = m_laceColorCorrection.colorWeightLut.iSlope[4];
2274
2275 pVeboxIecpState->AceState.DW20.LaceGammaCurveBias5 = m_laceColorCorrection.colorWeightLut.iBias[5];
2276 pVeboxIecpState->AceState.DW20.LaceGammaCurvePoint5 = m_laceColorCorrection.colorWeightLut.iPoint[5];
2277 pVeboxIecpState->AceState.DW20.LaceGammaCurveSlope5 = m_laceColorCorrection.colorWeightLut.iSlope[5];
2278
2279 pVeboxIecpState->AceState.DW21.LaceGammaCurveBias6 = m_laceColorCorrection.colorWeightLut.iBias[6];
2280 pVeboxIecpState->AceState.DW21.LaceGammaCurvePoint6 = m_laceColorCorrection.colorWeightLut.iPoint[6];
2281 pVeboxIecpState->AceState.DW21.LaceGammaCurveSlope6 = m_laceColorCorrection.colorWeightLut.iSlope[6];
2282
2283 pVeboxIecpState->AceState.DW22.LaceGammaCurveBias7 = m_laceColorCorrection.colorWeightLut.iBias[7];
2284 pVeboxIecpState->AceState.DW22.LaceGammaCurvePoint7 = m_laceColorCorrection.colorWeightLut.iPoint[7];
2285 pVeboxIecpState->AceState.DW22.LaceGammaCurveSlope7 = m_laceColorCorrection.colorWeightLut.iSlope[7];
2286
2287 pVeboxIecpState->AceState.DW23.LaceGammaCurveBias8 = m_laceColorCorrection.colorWeightLut.iBias[8];
2288 pVeboxIecpState->AceState.DW23.LaceGammaCurvePoint8 = m_laceColorCorrection.colorWeightLut.iPoint[8];
2289 pVeboxIecpState->AceState.DW23.LaceGammaCurveSlope8 = m_laceColorCorrection.colorWeightLut.iSlope[8];
2290
2291 pVeboxIecpState->AceState.DW24.LaceGammaCurveBias9 = m_laceColorCorrection.colorWeightLut.iBias[9];
2292 pVeboxIecpState->AceState.DW24.LaceGammaCurvePoint9 = m_laceColorCorrection.colorWeightLut.iPoint[9];
2293 pVeboxIecpState->AceState.DW24.LaceGammaCurveSlope9 = m_laceColorCorrection.colorWeightLut.iSlope[9];
2294
2295 pVeboxIecpState->AceState.DW25.LaceGammaCurveBias10 = m_laceColorCorrection.colorWeightLut.iBias[10];
2296 pVeboxIecpState->AceState.DW25.LaceGammaCurvePoint10 = m_laceColorCorrection.colorWeightLut.iPoint[10];
2297 pVeboxIecpState->AceState.DW25.LaceGammaCurveSlope10 = m_laceColorCorrection.colorWeightLut.iSlope[10];
2298
2299 pVeboxIecpState->AceState.DW26.LaceGammaCurveBias11 = m_laceColorCorrection.colorWeightLut.iBias[11];
2300 pVeboxIecpState->AceState.DW26.LaceGammaCurvePoint11 = m_laceColorCorrection.colorWeightLut.iPoint[11];
2301 pVeboxIecpState->AceState.DW26.LaceGammaCurveSlope11 = m_laceColorCorrection.colorWeightLut.iSlope[11];
2302
2303 pVeboxIecpState->AceState.DW27.LaceGammaCurveBias12 = m_laceColorCorrection.colorWeightLut.iBias[12];
2304 pVeboxIecpState->AceState.DW27.LaceGammaCurvePoint12 = m_laceColorCorrection.colorWeightLut.iPoint[12];
2305 pVeboxIecpState->AceState.DW27.LaceGammaCurveSlope12 = m_laceColorCorrection.colorWeightLut.iSlope[12];
2306
2307 pVeboxIecpState->AceState.DW28.LaceGammaCurveBias13 = m_laceColorCorrection.colorWeightLut.iBias[13];
2308 pVeboxIecpState->AceState.DW28.LaceGammaCurvePoint13 = m_laceColorCorrection.colorWeightLut.iPoint[13];
2309 pVeboxIecpState->AceState.DW28.LaceGammaCurveSlope13 = m_laceColorCorrection.colorWeightLut.iSlope[13];
2310
2311 pVeboxIecpState->AceState.DW29.LaceGammaCurveBias14 = m_laceColorCorrection.colorWeightLut.iBias[14];
2312 pVeboxIecpState->AceState.DW29.LaceGammaCurvePoint14 = m_laceColorCorrection.colorWeightLut.iPoint[14];
2313 pVeboxIecpState->AceState.DW29.LaceGammaCurveSlope14 = m_laceColorCorrection.colorWeightLut.iSlope[14];
2314
2315 pVeboxIecpState->AceState.DW30.LaceGammaCurveBias15 = m_laceColorCorrection.colorWeightLut.iBias[15];
2316 pVeboxIecpState->AceState.DW30.LaceGammaCurvePoint15 = m_laceColorCorrection.colorWeightLut.iPoint[15];
2317 pVeboxIecpState->AceState.DW30.LaceGammaCurveSlope15 = m_laceColorCorrection.colorWeightLut.iSlope[15];
2318 }
2319
2320 return eStatus;
2321 }
2322
VeboxInterface_BT2020YUVToRGB(PMHW_VEBOX_HEAP pVeboxHeapInput,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)2323 MOS_STATUS VeboxInterface_BT2020YUVToRGB(
2324 PMHW_VEBOX_HEAP pVeboxHeapInput,
2325 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
2326 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
2327 {
2328 MHW_FUNCTION_ENTER;
2329
2330 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *pIecpState;
2331 MHW_VEBOX_HEAP *pVeboxHeap;
2332 uint32_t uiOffset;
2333 MOS_STATUS eStatus = MOS_STATUS_NULL_POINTER;
2334
2335 MHW_CHK_NULL_RETURN(pVeboxHeapInput);
2336
2337 MOS_UNUSED(pVeboxIecpParams);
2338 MOS_UNUSED(pVeboxGamutParams);
2339
2340 pVeboxHeap = pVeboxHeapInput;
2341 MHW_CHK_NULL_RETURN(pVeboxHeap);
2342
2343 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2344 pIecpState = (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem + pVeboxHeap->uiIecpStateOffset + uiOffset);
2345
2346 MHW_CHK_NULL_RETURN(pIecpState);
2347
2348 pIecpState->CscState.DW0.TransformEnable = true;
2349
2350 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020) // Limited->Full
2351 {
2352 if (pVeboxIecpParams->s1DLutParams.bActive)
2353 {
2354 // The updated value for TGL VEBOX HDR and Fp16 path
2355 pIecpState->CscState.DW0.C0 = 76533;
2356 pIecpState->CscState.DW1.C1 = 0;
2357 pIecpState->CscState.DW2.C2 = 110337;
2358 pIecpState->CscState.DW3.C3 = 76533;
2359 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-12312, 19);
2360 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-42751, 19);
2361 pIecpState->CscState.DW6.C6 = 76533;
2362 pIecpState->CscState.DW7.C7 = 140776;
2363 pIecpState->CscState.DW8.C8 = 0;
2364
2365 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
2366 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2367 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2368
2369 pIecpState->CscState.DW9.OffsetOut1 = 0;
2370 pIecpState->CscState.DW10.OffsetOut2 = 0;
2371 pIecpState->CscState.DW11.OffsetOut3 = 0;
2372 }
2373 else
2374 {
2375 pIecpState->CscState.DW0.C0 = 76607;
2376 pIecpState->CscState.DW1.C1 = 0;
2377 pIecpState->CscState.DW2.C2 = 110443;
2378 pIecpState->CscState.DW3.C3 = 76607;
2379 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-12325, 19);
2380 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-42793, 19);
2381 pIecpState->CscState.DW6.C6 = 76607;
2382 pIecpState->CscState.DW7.C7 = 140911;
2383 pIecpState->CscState.DW8.C8 = 0;
2384
2385 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
2386 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2387 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2388
2389 pIecpState->CscState.DW9.OffsetOut1 = 0;
2390 pIecpState->CscState.DW10.OffsetOut2 = 0;
2391 pIecpState->CscState.DW11.OffsetOut3 = 0;
2392 }
2393 }
2394 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange) // Full->Full
2395 {
2396 pIecpState->CscState.DW0.C0 = 65536;
2397 pIecpState->CscState.DW1.C1 = 0;
2398 pIecpState->CscState.DW2.C2 = 96639;
2399 pIecpState->CscState.DW3.C3 = 65536;
2400 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-10784, 19);
2401 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-37444, 19);
2402 pIecpState->CscState.DW6.C6 = 65536;
2403 pIecpState->CscState.DW7.C7 = 123299;
2404 pIecpState->CscState.DW8.C8 = 0;
2405
2406 pIecpState->CscState.DW9.OffsetIn1 = 0;
2407 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2408 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2409
2410 pIecpState->CscState.DW9.OffsetOut1 = 0;
2411 pIecpState->CscState.DW10.OffsetOut2 = 0;
2412 pIecpState->CscState.DW11.OffsetOut3 = 0;
2413 }
2414 else
2415 {
2416 MHW_ASSERTMESSAGE("Unsupported BeCSC input color space");
2417 }
2418
2419 eStatus = MOS_STATUS_SUCCESS;
2420
2421 return eStatus;
2422 }
2423
VeboxInterface_H2SManualMode(PMHW_VEBOX_HEAP pVeboxHeapInput,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)2424 MOS_STATUS VeboxInterface_H2SManualMode(
2425 PMHW_VEBOX_HEAP pVeboxHeapInput,
2426 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
2427 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
2428 {
2429 MHW_FUNCTION_ENTER;
2430
2431 MHW_VEBOX_HEAP *pVeboxHeap;
2432 uint32_t uiOffset;
2433
2434 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD * pIecpState;
2435 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_GAMUT_CONTROL_STATE_CMD *pGamutState;
2436 mhw::vebox::xe2_hpm_next::Cmd::Gamut_Expansion_Gamma_Correction_CMD *pVeboxGEGammaCorrection, VeboxGeGammaCorrection;
2437 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2438
2439 // HDR H2S algorithm related
2440 int32_t iToneMappingX[5] = {40, 200, 1000, 2000, 4000};
2441 int32_t iToneMappingY[4] = {2500, 5000, 10000, 10000};
2442 float fPivotX[5] = {0.0, 0.0, 0.0, 0.0, 0.0};
2443 float fPivotY[4] = {0.0, 0.0, 0.0, 0.0};
2444 float fSlope[5] = {0.0, 0.0, 0.0, 0.0, 0.0};
2445 float fMaxCLL = 0.0;
2446 // OETF parameters, corresponding to input
2447 uint32_t uiOETF[HDR_OETF_1DLUT_POINT_NUMBER] = {0};
2448 uint16_t usGE_Values[256][8] = {0};
2449
2450 MHW_CHK_NULL_RETURN(pVeboxGamutParams);
2451 MHW_CHK_NULL_RETURN(pVeboxHeapInput);
2452 MHW_CHK_NULL_RETURN(pVeboxIecpParams);
2453
2454 pVeboxHeap = pVeboxHeapInput;
2455 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2456 pIecpState = (mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem + pVeboxHeap->uiIecpStateOffset + uiOffset);
2457 pVeboxGEGammaCorrection = (mhw::vebox::xe2_hpm_next::Cmd::Gamut_Expansion_Gamma_Correction_CMD *)(pVeboxHeap->pLockedDriverResourceMem + pVeboxHeap->uiGamutStateOffset + uiOffset);
2458 fMaxCLL = (65535 * (float)pVeboxGamutParams->uiMaxCLL) / 10000;
2459
2460 MHW_CHK_NULL_RETURN(pIecpState);
2461 MHW_CHK_NULL_RETURN(pVeboxGEGammaCorrection);
2462
2463 // Must initialize VeboxIecpState even if it is not used because GCE
2464 // requires GlobalIECP enable bit to be turned on
2465 if (!pVeboxIecpParams)
2466 {
2467 IecpStateInitialization(pIecpState);
2468 }
2469 pGamutState = &pIecpState->GamutState;
2470
2471 for (int32_t i = 0; i < 4; i++)
2472 {
2473 fPivotX[i] = (iToneMappingY[i] < 10000) ? (65535 * (float)iToneMappingX[i]) / 10000 : MOS_MIN((65535 * (float)iToneMappingX[i]) / 10000, fMaxCLL);
2474 fPivotY[i] = (65535 * (float)iToneMappingY[i]) / 10000;
2475 }
2476 fPivotX[4] = MOS_MIN((65535 * (float)iToneMappingX[4]) / 10000, fMaxCLL);
2477
2478 // Slope
2479 fSlope[0] = fPivotX[0] > 0 ? (float)(fPivotY[0] / fPivotX[0]) : 0;
2480 fPivotY[0] = fSlope[0] * fPivotX[0];
2481 for (int32_t i = 1; i < 4; i++)
2482 {
2483 fSlope[i] = (fPivotX[i] - fPivotX[i - 1]) > 0 ? (float)(fPivotY[i] - fPivotY[i - 1]) / (fPivotX[i] - fPivotX[i - 1]) : 0;
2484 fPivotY[i] = fSlope[i] * (fPivotX[i] - fPivotX[i - 1]) + fPivotY[i - 1];
2485 }
2486 fSlope[4] = (fPivotX[4] - fPivotX[3]) > 0 ? (float)(65535 - fPivotY[3]) / (fPivotX[4] - fPivotX[3]) : 0;
2487
2488 // Linear Operation
2489 for (int32_t n = 1; n < HDR_OETF_1DLUT_POINT_NUMBER; n++)
2490 {
2491 if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] < fSlope[0] * fPivotX[0])
2492 {
2493 uiOETF[n] = (uint32_t)((float)(g_Hdr_ColorCorrect_OETF_Rec709_Input[n]) / fSlope[0]);
2494 }
2495 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] < fSlope[1] * (fPivotX[1] - fPivotX[0]) + fPivotY[0])
2496 {
2497 uiOETF[n] = (uint32_t)(((float)(g_Hdr_ColorCorrect_OETF_Rec709_Input[n]) - fPivotY[0]) / fSlope[1] + fPivotX[0]);
2498 }
2499 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] < fSlope[2] * (fPivotX[2] - fPivotX[1]) + fPivotY[1])
2500 {
2501 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] - fPivotY[1]) / fSlope[2] + fPivotX[1]);
2502 }
2503 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] < fSlope[3] * (fPivotX[3] - fPivotX[2]) + fPivotY[2])
2504 {
2505 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] - fPivotY[2]) / fSlope[3] + fPivotX[2]);
2506 }
2507 else
2508 {
2509 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input[n] - fPivotY[3]) / fSlope[4] + fPivotX[3]);
2510 }
2511 }
2512 uiOETF[0] = 0;
2513 uiOETF[255] = 65535;
2514
2515 // Back end CSC setting, need to convert BT2020 YUV input to RGB before GE
2516 VeboxInterface_BT2020YUVToRGB(pVeboxHeap, pVeboxIecpParams, pVeboxGamutParams);
2517
2518 // Global setting
2519 pGamutState->DW0.GlobalModeEnable = true;
2520 pGamutState->DW1.CmW = 1023; // Colorimetric accurate image
2521
2522 // CCM
2523 pGamutState->DW1.C0 = 108822;
2524 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38511, 21);
2525 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4774, 21);
2526 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-8163, 21);
2527 pGamutState->DW5.C4 = 74246;
2528 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-547, 21);
2529 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1190, 21);
2530 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6592, 21);
2531 pGamutState->DW8.C8 = 73317;
2532
2533 // Gamma Expansion
2534 *pVeboxGEGammaCorrection = VeboxGeGammaCorrection;
2535 for (int32_t i = 0; i < 255; i++)
2536 {
2537 usGE_Values[i][0] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Input[i];
2538 usGE_Values[i][1] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output[i];
2539 usGE_Values[i][2] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output[i];
2540 usGE_Values[i][3] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output[i];
2541
2542 usGE_Values[i][4] = (uint16_t)uiOETF[i];
2543 usGE_Values[i][5] = g_Hdr_ColorCorrect_OETF_Rec709_Output[i];
2544 usGE_Values[i][6] = g_Hdr_ColorCorrect_OETF_Rec709_Output[i];
2545 usGE_Values[i][7] = g_Hdr_ColorCorrect_OETF_Rec709_Output[i];
2546 }
2547 // Keep the last 4 DWs' value as defult 65535.See mhw_vebox_g10_X::Gamut_Expansion_Gamma_Correction_CMD();
2548 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1020, usGE_Values, sizeof(uint16_t) * 2040);
2549
2550 return eStatus;
2551 }
2552
SetVeboxSurfaceControlBits(PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams,uint32_t * pSurfCtrlBits)2553 MOS_STATUS SetVeboxSurfaceControlBits(
2554 PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams,
2555 uint32_t * pSurfCtrlBits)
2556 {
2557 MHW_FUNCTION_ENTER;
2558
2559 PLATFORM Platform = {};
2560 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2561
2562 mhw::vebox::xe2_hpm_next::Cmd::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD *pVeboxSurfCtrlBits;
2563 MEDIA_FEATURE_TABLE * skuTable = nullptr;
2564
2565 MHW_CHK_NULL_RETURN(pVeboxSurfCntlParams);
2566 MHW_CHK_NULL_RETURN(pSurfCtrlBits);
2567 MHW_CHK_NULL_RETURN(this->m_osItf);
2568
2569 this->m_osItf->pfnGetPlatform(this->m_osItf, &Platform);
2570 skuTable = this->m_osItf->pfnGetSkuTable(this->m_osItf);
2571 MHW_CHK_NULL_RETURN(skuTable);
2572
2573 pVeboxSurfCtrlBits = (mhw::vebox::xe2_hpm_next::Cmd::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD *)pSurfCtrlBits;
2574
2575 return eStatus;
2576 }
2577
VeboxInputFormat(PMHW_VEBOX_SURFACE_PARAMS pCurrSurf,uint32_t * dwFormat)2578 MOS_STATUS VeboxInputFormat(
2579 PMHW_VEBOX_SURFACE_PARAMS pCurrSurf,
2580 uint32_t *dwFormat)
2581 {
2582 MHW_FUNCTION_ENTER;
2583
2584 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2585 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_SURFACE_STATE_CMD VeboxSurfaceState;
2586
2587 switch (pCurrSurf->Format)
2588 {
2589 case Format_NV12:
2590 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR4208;
2591 break;
2592
2593 case Format_YUYV:
2594 case Format_YUY2:
2595 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBNORMAL;
2596 break;
2597
2598 case Format_UYVY:
2599 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPY;
2600 break;
2601
2602 case Format_AYUV:
2603 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED444A8;
2604 break;
2605
2606 case Format_Y416:
2607 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44416;
2608 break;
2609
2610 case Format_Y410:
2611 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44410;
2612 break;
2613
2614 case Format_YVYU:
2615 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUV;
2616 break;
2617
2618 case Format_VYUY:
2619 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUVY;
2620 break;
2621
2622 case Format_A8B8G8R8:
2623 case Format_X8B8G8R8:
2624 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
2625 break;
2626
2627 case Format_A16B16G16R16:
2628 case Format_A16R16G16B16:
2629 case Format_A16B16G16R16F:
2630 case Format_A16R16G16B16F:
2631 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R16G16B16A16;
2632 break;
2633
2634 case Format_L8:
2635 case Format_P8:
2636 case Format_Y8:
2637 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y8UNORM;
2638 break;
2639
2640 case Format_IRW0:
2641 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2642 break;
2643
2644 case Format_IRW1:
2645 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2646 break;
2647
2648 case Format_IRW2:
2649 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2650 break;
2651
2652 case Format_IRW3:
2653 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2654 break;
2655
2656 case Format_IRW4:
2657 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2658 break;
2659
2660 case Format_IRW5:
2661 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2662 break;
2663
2664 case Format_IRW6:
2665 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2666 break;
2667
2668 case Format_IRW7:
2669 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2670 break;
2671
2672 case Format_P010:
2673 case Format_P016:
2674 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42016;
2675 break;
2676
2677 case Format_A8R8G8B8:
2678 case Format_X8R8G8B8:
2679 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
2680 break;
2681
2682 case Format_R10G10B10A2:
2683 case Format_B10G10R10A2:
2684 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R10G10B10A2UNORMR10G10B10A2UNORMSRGB;
2685 break;
2686
2687 case Format_Y216:
2688 case Format_Y210:
2689 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED42216;
2690 break;
2691
2692 case Format_P216:
2693 case Format_P210:
2694 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42216;
2695 break;
2696
2697 case Format_Y16S:
2698 case Format_Y16U:
2699 *dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y16UNORM;
2700 break;
2701
2702 default:
2703 MHW_ASSERTMESSAGE("Unsupported format.");
2704 break;
2705 }
2706
2707 return eStatus;
2708 }
2709
AddVeboxTilingConvert(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VEBOX_SURFACE_PARAMS inSurParams,PMHW_VEBOX_SURFACE_PARAMS outSurParams)2710 MOS_STATUS AddVeboxTilingConvert(
2711 PMOS_COMMAND_BUFFER cmdBuffer,
2712 PMHW_VEBOX_SURFACE_PARAMS inSurParams,
2713 PMHW_VEBOX_SURFACE_PARAMS outSurParams)
2714 {
2715 MHW_FUNCTION_ENTER;
2716
2717 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2718 PMOS_RESOURCE surface = nullptr;
2719 PMOS_RESOURCE inputSurface;
2720 PMOS_RESOURCE outputSurface;
2721 mhw::vebox::xe2_hpm_next::Cmd::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD veboxInputSurfCtrlBits, veboxOutputSurfCtrlBits;
2722 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_TILING_CONVERT_CMD cmd;
2723 MHW_RESOURCE_PARAMS ResourceParams = {0};
2724
2725 MHW_CHK_NULL_RETURN(cmdBuffer);
2726 MHW_CHK_NULL_RETURN(this->m_osItf);
2727 MHW_CHK_NULL_RETURN(inSurParams);
2728 MHW_CHK_NULL_RETURN(outSurParams);
2729
2730 inputSurface = inSurParams->pOsResource;
2731 outputSurface = outSurParams->pOsResource;
2732
2733 MHW_CHK_NULL_RETURN(inputSurface);
2734 MHW_CHK_NULL_RETURN(outputSurface);
2735
2736 // Set up VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS
2737 MOS_ZeroMemory(&veboxInputSurfCtrlBits, sizeof(veboxInputSurfCtrlBits));
2738 MOS_ZeroMemory(&veboxOutputSurfCtrlBits, sizeof(veboxOutputSurfCtrlBits));
2739
2740 switch (inputSurface->TileType)
2741 {
2742 case MOS_TILE_YF:
2743 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYF;
2744 break;
2745 case MOS_TILE_YS:
2746 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYS;
2747 break;
2748 default:
2749 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_NONE;
2750 break;
2751 }
2752
2753 surface = outputSurface;
2754
2755 if (surface)
2756 {
2757 switch (surface->TileType)
2758 {
2759 case MOS_TILE_YF:
2760 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYF;
2761 break;
2762 case MOS_TILE_YS:
2763 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYS;
2764 break;
2765 default:
2766 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_NONE;
2767 break;
2768 }
2769 }
2770
2771 veboxInputSurfCtrlBits.DW0.IndexToMemoryObjectControlStateMocsTables =
2772 veboxOutputSurfCtrlBits.DW0.IndexToMemoryObjectControlStateMocsTables =
2773 (this->m_osItf->pfnCachePolicyGetMemoryObject(
2774 MOS_MP_RESOURCE_USAGE_DEFAULT,
2775 this->m_osItf->pfnGetGmmClientContext(this->m_osItf)))
2776 .XE_LPG.Index;
2777
2778 MOS_ZeroMemory(&ResourceParams, sizeof(MHW_RESOURCE_PARAMS));
2779 InitMocsParams(ResourceParams, &cmd.DW1_2.Value[0], 1, 6);
2780 ResourceParams.presResource = inputSurface;
2781 ResourceParams.HwCommandType = MOS_VEBOX_TILING_CONVERT;
2782
2783 // set up DW[2:1], input graphics address
2784 ResourceParams.dwLocationInCmd = 1;
2785 ResourceParams.pdwCmd = &(cmd.DW1_2.Value[0]);
2786 ResourceParams.bIsWritable = false;
2787 ResourceParams.dwOffset = inSurParams->dwOffset + veboxInputSurfCtrlBits.DW0.Value;
2788 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
2789 this->m_osItf,
2790 cmdBuffer,
2791 &ResourceParams));
2792 cmd.DW1_2.InputSurfaceControlBits = veboxInputSurfCtrlBits.DW0.Value;
2793
2794 MOS_ZeroMemory(&ResourceParams, sizeof(MHW_RESOURCE_PARAMS));
2795 InitMocsParams(ResourceParams, &cmd.DW3_4.Value[0], 1, 6);
2796 ResourceParams.presResource = outputSurface;
2797 ResourceParams.HwCommandType = MOS_VEBOX_TILING_CONVERT;
2798
2799 // set up DW[4:3], output graphics address
2800 ResourceParams.dwLocationInCmd = 3;
2801 ResourceParams.pdwCmd = &(cmd.DW3_4.Value[0]);
2802 ResourceParams.bIsWritable = true;
2803 ResourceParams.dwOffset = outSurParams->dwOffset + veboxOutputSurfCtrlBits.DW0.Value;;
2804 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
2805 this->m_osItf,
2806 cmdBuffer,
2807 &ResourceParams));
2808
2809 cmd.DW3_4.OutputSurfaceControlBits = veboxOutputSurfCtrlBits.DW0.Value;
2810 m_osItf->pfnAddCommand(cmdBuffer, &cmd, cmd.byteSize);
2811
2812 return eStatus;
2813 }
2814
SetVeboxSurfaces(PMHW_VEBOX_SURFACE_PARAMS pInputSurfaceParam,PMHW_VEBOX_SURFACE_PARAMS pOutputSurfaceParam,PMHW_VEBOX_SURFACE_PARAMS pDerivedSurfaceParam,PMHW_VEBOX_SURFACE_PARAMS pSkinScoreSurfaceParam,bool bIsOutputSurface,bool bDIEnable,PMOS_COMMAND_BUFFER pCmdBufferInUse)2815 void SetVeboxSurfaces(
2816 PMHW_VEBOX_SURFACE_PARAMS pInputSurfaceParam,
2817 PMHW_VEBOX_SURFACE_PARAMS pOutputSurfaceParam,
2818 PMHW_VEBOX_SURFACE_PARAMS pDerivedSurfaceParam,
2819 PMHW_VEBOX_SURFACE_PARAMS pSkinScoreSurfaceParam,
2820 bool bIsOutputSurface,
2821 bool bDIEnable,
2822 PMOS_COMMAND_BUFFER pCmdBufferInUse)
2823 {
2824 MHW_FUNCTION_ENTER;
2825
2826 uint32_t dwFormat = 0;
2827 uint32_t dwInputFormat = 0;
2828 uint32_t dwSurfaceWidth = 0;
2829 uint32_t dwSurfaceHeight = 0;
2830 uint32_t dwSurfacePitch = 0;
2831 bool bHalfPitchForChroma = false;
2832 bool bInterleaveChroma = false;
2833 uint16_t wUXOffset = 0;
2834 uint16_t wUYOffset = 0;
2835 uint16_t wVXOffset = 0;
2836 uint16_t wVYOffset = 0;
2837 uint8_t bBayerOffset = 0;
2838 uint8_t bBayerStride = 0;
2839 uint8_t bBayerInputAlignment = 0;
2840 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam = nullptr;
2841
2842 mhw::vebox::xe2_hpm_next::Cmd::VEBOX_SURFACE_STATE_CMD VeboxSurfaceState;
2843
2844 MHW_CHK_NULL_NO_STATUS_RETURN(pInputSurfaceParam);
2845 MHW_CHK_NULL_NO_STATUS_RETURN(pOutputSurfaceParam);
2846
2847 if (!bIsOutputSurface)
2848 {
2849 pSurfaceParam = pInputSurfaceParam;
2850 }
2851 else
2852 {
2853 pSurfaceParam = pOutputSurfaceParam;
2854 }
2855
2856 switch (pSurfaceParam->Format)
2857 {
2858 case Format_NV12:
2859 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR4208;
2860 bInterleaveChroma = true;
2861 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
2862 break;
2863
2864 case Format_YUYV:
2865 case Format_YUY2:
2866 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBNORMAL;
2867 break;
2868
2869 case Format_UYVY:
2870 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPY;
2871 break;
2872
2873 case Format_AYUV:
2874 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED444A8;
2875 break;
2876
2877 case Format_Y416:
2878 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44416;
2879 break;
2880
2881 case Format_Y410:
2882 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44410;
2883 break;
2884
2885 case Format_YVYU:
2886 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUV;
2887 break;
2888
2889 case Format_VYUY:
2890 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUVY;
2891 break;
2892
2893 case Format_A8B8G8R8:
2894 case Format_X8B8G8R8:
2895 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
2896 break;
2897
2898 case Format_A16B16G16R16:
2899 case Format_A16R16G16B16:
2900 case Format_A16B16G16R16F:
2901 case Format_A16R16G16B16F:
2902 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R16G16B16A16;
2903 break;
2904
2905 case Format_L8:
2906 case Format_P8:
2907 case Format_Y8:
2908 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y8UNORM;
2909 break;
2910
2911 case Format_IRW0:
2912 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2913 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISBLUE;
2914 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
2915 break;
2916
2917 case Format_IRW1:
2918 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2919 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISRED;
2920 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
2921 break;
2922
2923 case Format_IRW2:
2924 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2925 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISRED;
2926 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
2927 break;
2928
2929 case Format_IRW3:
2930 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2931 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISBLUE;
2932 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
2933 break;
2934
2935 case Format_IRW4:
2936 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2937 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISBLUE;
2938 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
2939 break;
2940
2941 case Format_IRW5:
2942 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2943 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISRED;
2944 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
2945 break;
2946
2947 case Format_IRW6:
2948 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2949 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISRED;
2950 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
2951 break;
2952
2953 case Format_IRW7:
2954 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
2955 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISBLUE;
2956 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
2957 break;
2958
2959 case Format_P010:
2960 case Format_P016:
2961 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42016;
2962 bInterleaveChroma = true;
2963 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
2964 break;
2965
2966 case Format_A8R8G8B8:
2967 case Format_X8R8G8B8:
2968 if (bIsOutputSurface)
2969 {
2970 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_B8G8R8A8UNORM;
2971 }
2972 else
2973 {
2974 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
2975 }
2976 break;
2977
2978 case Format_R10G10B10A2:
2979 case Format_B10G10R10A2:
2980 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R10G10B10A2UNORMR10G10B10A2UNORMSRGB;
2981 break;
2982
2983 case Format_Y216:
2984 case Format_Y210:
2985 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED42216;
2986 break;
2987
2988 case Format_P216:
2989 case Format_P210:
2990 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42216;
2991 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
2992 break;
2993
2994 case Format_Y16S:
2995 case Format_Y16U:
2996 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y16UNORM;
2997 break;
2998
2999 default:
3000 MHW_ASSERTMESSAGE("Unsupported format.");
3001 return;
3002 break;
3003 }
3004
3005 if (!bIsOutputSurface)
3006 {
3007 // camera pipe will use 10/12/14 for LSB, 0 for MSB. For other pipeline,
3008 // dwBitDepth is inherited from pSrc->dwDepth which may not among (0,10,12,14)
3009 // For such cases should use MSB as default value.
3010 switch (pSurfaceParam->dwBitDepth)
3011 {
3012 case 10:
3013 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_10BITLSBALIGNEDDATA;
3014 break;
3015
3016 case 12:
3017 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_12BITLSBALIGNEDDATA;
3018 break;
3019
3020 case 14:
3021 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_14BITLSBALIGNEDDATA;
3022 break;
3023
3024 case 0:
3025 default:
3026 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_MSBALIGNEDDATA;
3027 break;
3028 }
3029 }
3030 else
3031 {
3032 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_MSBALIGNEDDATA;
3033 }
3034
3035 // adjust boundary for vebox
3036 VeboxAdjustBoundary(
3037 pSurfaceParam,
3038 &dwSurfaceWidth,
3039 &dwSurfaceHeight,
3040 bDIEnable);
3041
3042 dwSurfacePitch = (pSurfaceParam->TileType == MOS_TILE_LINEAR) ? MOS_ALIGN_CEIL(pSurfaceParam->dwPitch, MHW_VEBOX_LINEAR_PITCH) : pSurfaceParam->dwPitch;
3043
3044 // Setup Surface State
3045 auto& par = MHW_GETPAR_F(VEBOX_SURFACE_STATE)();
3046 par = {};
3047 par.SurfaceIdentification = bIsOutputSurface;
3048 par.SurfaceFormat = dwFormat;
3049 par.Width = dwSurfaceWidth - 1;
3050 par.Height = dwSurfaceHeight - 1;
3051 par.HalfPitchForChroma = bHalfPitchForChroma;
3052 par.InterleaveChroma = bInterleaveChroma;
3053 par.BayerInputAlignment = bBayerInputAlignment;
3054 par.BayerPatternOffset = bBayerOffset;
3055 par.BayerPatternFormat = bBayerStride;
3056 par.SurfacePitch = dwSurfacePitch - 1;
3057 par.TileMode = MosGetHWTileType(pSurfaceParam->TileType, pSurfaceParam->TileModeGMM, pSurfaceParam->bGMMTileEnabled);
3058 par.XOffsetForU = wUXOffset;
3059 par.YOffsetForU = wUYOffset;
3060 par.XOffsetForV = wVXOffset;
3061 par.YOffsetForV = wVYOffset;
3062
3063 // May fix this for stereo surfaces
3064 par.YOffsetForFrame = pSurfaceParam->dwYoffset;
3065 par.XOffsetForFrame = 0;
3066
3067 par.DerivedSurfacePitch = pDerivedSurfaceParam->dwPitch - 1;
3068 par.SurfacePitchForSkinScoreOutputSurfaces = (bIsOutputSurface && pSkinScoreSurfaceParam->bActive) ? (pSkinScoreSurfaceParam->dwPitch - 1) : 0;
3069 par.CompressionFormat = pSurfaceParam->dwCompressionFormat;
3070
3071 if (bIsOutputSurface && (pInputSurfaceParam->Format == pOutputSurfaceParam->Format))
3072 {
3073 VeboxInputFormat(pInputSurfaceParam, &dwInputFormat);
3074 par.SurfaceFormat = dwInputFormat;
3075 }
3076
3077 MHW_ADDCMD_F(VEBOX_SURFACE_STATE)(pCmdBufferInUse);
3078
3079 return;
3080 }
3081
AddVeboxSurfaces(PMOS_COMMAND_BUFFER pCmdBufferInUse,PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)3082 MOS_STATUS AddVeboxSurfaces(
3083 PMOS_COMMAND_BUFFER pCmdBufferInUse,
3084 PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)
3085 {
3086 MHW_FUNCTION_ENTER;
3087
3088 MOS_STATUS eStatus;
3089 bool bOutputValid;
3090
3091 MHW_CHK_NULL_RETURN(pCmdBufferInUse);
3092 MHW_CHK_NULL_RETURN(this->m_osItf);
3093 MHW_CHK_NULL_RETURN(pVeboxSurfaceStateCmdParams);
3094 MHW_CHK_NULL_RETURN(this->m_osItf->pfnGetMemoryCompressionFormat);
3095
3096 eStatus = MOS_STATUS_SUCCESS;
3097 bOutputValid = pVeboxSurfaceStateCmdParams->bOutputValid;
3098
3099 if (!pVeboxSurfaceStateCmdParams->SurfInput.dwCompressionFormat)
3100 {
3101 this->m_osItf->pfnGetMemoryCompressionFormat(this->m_osItf, pVeboxSurfaceStateCmdParams->SurfInput.pOsResource, &pVeboxSurfaceStateCmdParams->SurfInput.dwCompressionFormat);
3102 }
3103
3104 // Setup Surface State for Input surface
3105 SetVeboxSurfaces(
3106 &pVeboxSurfaceStateCmdParams->SurfInput,
3107 &pVeboxSurfaceStateCmdParams->SurfOutput,
3108 &pVeboxSurfaceStateCmdParams->SurfSTMM,
3109 nullptr,
3110 false,
3111 pVeboxSurfaceStateCmdParams->bDIEnable,
3112 pCmdBufferInUse);
3113
3114 // Setup Surface State for Output surface
3115 if (bOutputValid)
3116 {
3117 if (!pVeboxSurfaceStateCmdParams->SurfOutput.dwCompressionFormat)
3118 this->m_osItf->pfnGetMemoryCompressionFormat(this->m_osItf, pVeboxSurfaceStateCmdParams->SurfOutput.pOsResource, &pVeboxSurfaceStateCmdParams->SurfOutput.dwCompressionFormat);
3119
3120 SetVeboxSurfaces(
3121 &pVeboxSurfaceStateCmdParams->SurfInput,
3122 &pVeboxSurfaceStateCmdParams->SurfOutput,
3123 &pVeboxSurfaceStateCmdParams->SurfDNOutput,
3124 &pVeboxSurfaceStateCmdParams->SurfSkinScoreOutput,
3125 true,
3126 pVeboxSurfaceStateCmdParams->bDIEnable,
3127 pCmdBufferInUse);
3128 }
3129
3130 return eStatus;
3131 }
3132
3133 #if (_DEBUG || _RELEASE_INTERNAL)
ValidateVeboxScalabilityConfig()3134 MOS_STATUS ValidateVeboxScalabilityConfig()
3135 {
3136 MHW_FUNCTION_ENTER;
3137
3138 MEDIA_ENGINE_INFO mediaSysInfo = {};
3139 MOS_FORCE_VEBOX eForceVebox;
3140 bool bScalableVEMode;
3141 bool bUseVE1, bUseVE2, bUseVE3, bUseVE4;
3142 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3143
3144 MHW_CHK_NULL_RETURN(this->m_osItf);
3145
3146 eForceVebox = this->m_osItf->eForceVebox;
3147 bScalableVEMode = ((this->m_osItf->bVeboxScalabilityMode) ? true : false);
3148 eStatus = this->m_osItf->pfnGetMediaEngineInfo(this->m_osItf, mediaSysInfo);
3149 MHW_CHK_STATUS_RETURN(eStatus);
3150
3151 if (eForceVebox != MOS_FORCE_VEBOX_NONE &&
3152 eForceVebox != MOS_FORCE_VEBOX_1 &&
3153 eForceVebox != MOS_FORCE_VEBOX_2 &&
3154 eForceVebox != MOS_FORCE_VEBOX_1_2 &&
3155 eForceVebox != MOS_FORCE_VEBOX_1_2_3 &&
3156 eForceVebox != MOS_FORCE_VEBOX_1_2_3_4)
3157 {
3158 eStatus = MOS_STATUS_INVALID_PARAMETER;
3159 MHW_ASSERTMESSAGE("eForceVebox value is invalid.");
3160 return eStatus;
3161 }
3162
3163 if (!bScalableVEMode &&
3164 (eForceVebox == MOS_FORCE_VEBOX_1_2 ||
3165 eForceVebox == MOS_FORCE_VEBOX_1_2_3 ||
3166 eForceVebox == MOS_FORCE_VEBOX_1_2_3_4))
3167 {
3168 eStatus = MOS_STATUS_INVALID_PARAMETER;
3169 MHW_ASSERTMESSAGE("eForceVebox value is not consistent with scalability mode.");
3170 return eStatus;
3171 }
3172
3173 if (bScalableVEMode && !m_veboxScalabilitySupported)
3174 {
3175 eStatus = MOS_STATUS_INVALID_PARAMETER;
3176 MHW_ASSERTMESSAGE("scalability mode is not allowed on current platform!");
3177 return eStatus;
3178 }
3179
3180 bUseVE1 = bUseVE2 = bUseVE3 = bUseVE4 = false;
3181 if (eForceVebox == MOS_FORCE_VEBOX_NONE)
3182 {
3183 bUseVE1 = true;
3184 }
3185 else
3186 {
3187 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_1, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE1);
3188 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_2, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE2);
3189 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_3, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE3);
3190 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_4, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE4);
3191 }
3192
3193 if (!mediaSysInfo.VEBoxInfo.IsValid ||
3194 (uint32_t)(bUseVE1 + bUseVE2 + bUseVE3 + bUseVE4) > mediaSysInfo.VEBoxInfo.NumberOfVEBoxEnabled)
3195 {
3196 eStatus = MOS_STATUS_INVALID_PARAMETER;
3197 MHW_ASSERTMESSAGE("the forced VEBOX is not enabled in current platform.");
3198 return eStatus;
3199 }
3200
3201 return eStatus;
3202 }
3203 #endif
3204
_MHW_SETCMD_OVERRIDE_DECL(VEBOX_STATE)3205 _MHW_SETCMD_OVERRIDE_DECL(VEBOX_STATE)
3206 {
3207 MHW_FUNCTION_ENTER;
3208
3209 _MHW_SETCMD_CALLBASE(VEBOX_STATE);
3210
3211 MOS_STATUS eStatus;
3212 PMOS_INTERFACE pOsInterface;
3213 PMOS_CONTEXT pOsContext = nullptr;
3214 PMOS_RESOURCE pVeboxParamResource = nullptr;
3215 PMOS_RESOURCE pVeboxHeapResource = nullptr;
3216 MHW_VEBOX_HEAP* pVeboxHeap;
3217 uint32_t uiInstanceBaseAddr = 0;
3218 MHW_RESOURCE_PARAMS ResourceParams = {};
3219 MOS_ALLOC_GFXRES_PARAMS AllocParamsForBufferLinear = {};
3220 uint32_t *pIndirectState = nullptr;
3221
3222 MHW_CHK_NULL_RETURN(this->m_osItf);
3223 MHW_CHK_NULL_RETURN(this->m_osItf->pOsContext);
3224 MHW_CHK_NULL_RETURN(this->m_currentCmdBuf);
3225
3226 // Initialize
3227 eStatus = MOS_STATUS_SUCCESS;
3228 pOsInterface = this->m_osItf;
3229 pOsContext = this->m_osItf->pOsContext;
3230
3231 if (!params.bNoUseVeboxHeap)
3232 {
3233 MHW_CHK_NULL_RETURN(m_veboxHeap);
3234
3235 pVeboxHeap = m_veboxHeap;
3236 if (params.bCmBuffer)
3237 {
3238 pVeboxParamResource = params.pVeboxParamSurf;
3239 }
3240 else
3241 {
3242 pVeboxHeapResource = params.bUseVeboxHeapKernelResource ? &pVeboxHeap->KernelResource : &pVeboxHeap->DriverResource;
3243
3244 // Calculate the instance base address
3245 uiInstanceBaseAddr = pVeboxHeap->uiInstanceSize * pVeboxHeap->uiCurState;
3246 }
3247
3248 TraceIndirectStateInfo(*this->m_currentCmdBuf, *pOsContext, params.bCmBuffer, params.bUseVeboxHeapKernelResource);
3249
3250 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3251 if (params.bCmBuffer)
3252 {
3253 ResourceParams.presResource = pVeboxParamResource;
3254 ResourceParams.dwOffset = pVeboxHeap->uiDndiStateOffset;
3255 }
3256 else
3257 {
3258 ResourceParams.presResource = pVeboxHeapResource;
3259 ResourceParams.dwOffset = pVeboxHeap->uiDndiStateOffset + uiInstanceBaseAddr;
3260 }
3261 ResourceParams.pdwCmd = &(cmd.DW2.Value);
3262 ResourceParams.dwLocationInCmd = 2;
3263 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3264
3265 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3266 pOsInterface,
3267 this->m_currentCmdBuf,
3268 &ResourceParams));
3269 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3270 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3271 {
3272 // add DNDI indirect state dump
3273 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3274 pOsInterface->pfnAddIndirectState(pOsInterface,
3275 sizeof(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_DNDI_STATE_CMD),
3276 pIndirectState,
3277 ResourceParams.pdwCmd,
3278 ResourceParams.pdwCmd + 1,
3279 "VEBOX_DNDI_STATE_CMD");
3280 }
3281 #endif
3282 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiDndiStateSize);
3283
3284 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3285 if (params.bCmBuffer)
3286 {
3287 ResourceParams.presResource = pVeboxParamResource;
3288 ResourceParams.dwOffset = pVeboxHeap->uiIecpStateOffset;
3289 }
3290 else
3291 {
3292 ResourceParams.presResource = pVeboxHeapResource;
3293 ResourceParams.dwOffset = pVeboxHeap->uiIecpStateOffset + uiInstanceBaseAddr;
3294 }
3295 ResourceParams.pdwCmd = &(cmd.DW4.Value);
3296 ResourceParams.dwLocationInCmd = 4;
3297 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3298 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3299
3300 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3301 pOsInterface,
3302 this->m_currentCmdBuf,
3303 &ResourceParams));
3304 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3305 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3306 {
3307 // add IECP indirect state dump
3308 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3309 pOsInterface->pfnAddIndirectState(pOsInterface,
3310 sizeof(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_IECP_STATE_CMD),
3311 pIndirectState,
3312 ResourceParams.pdwCmd,
3313 ResourceParams.pdwCmd + 1,
3314 "VEBOX_IECP_STATE_CMD");
3315 }
3316 #endif
3317
3318 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiIecpStateSize);
3319
3320 // Gamut Expansion, HDR and Forward Gamma Correction are mutually exclusive.
3321 if (params.VeboxMode.Hdr1DLutEnable)
3322 {
3323 // If HDR is enabled, this points to a buffer containing the HDR state.
3324 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3325 if (params.bCmBuffer)
3326 {
3327 ResourceParams.presResource = pVeboxParamResource;
3328 ResourceParams.dwOffset = pVeboxHeap->uiHdrStateOffset;
3329 }
3330 else
3331 {
3332 ResourceParams.presResource = pVeboxHeapResource;
3333 ResourceParams.dwOffset = pVeboxHeap->uiHdrStateOffset + uiInstanceBaseAddr;
3334 }
3335 ResourceParams.pdwCmd = &(cmd.DW6.Value);
3336 ResourceParams.dwLocationInCmd = 6;
3337 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3338 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3339
3340 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3341 pOsInterface,
3342 this->m_currentCmdBuf,
3343 &ResourceParams));
3344 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3345 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3346 {
3347 // add HDR indirect state dump
3348 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3349 pOsInterface->pfnAddIndirectState(pOsInterface,
3350 sizeof(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_HDR_STATE_CMD),
3351 pIndirectState,
3352 ResourceParams.pdwCmd,
3353 ResourceParams.pdwCmd + 1,
3354 "VEBOX_HDR_STATE_CMD");
3355 }
3356 #endif
3357 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiHdrStateSize);
3358 }
3359 else
3360 {
3361 // If Gamut Expansion is enabled, this points to a buffer containing the Gamut Expansion Gamma Correction state.
3362 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3363 if (params.bCmBuffer)
3364 {
3365 ResourceParams.presResource = pVeboxParamResource;
3366 ResourceParams.dwOffset = pVeboxHeap->uiGamutStateOffset;
3367 }
3368 else
3369 {
3370 ResourceParams.presResource = pVeboxHeapResource;
3371 ResourceParams.dwOffset = pVeboxHeap->uiGamutStateOffset + uiInstanceBaseAddr;
3372 }
3373 ResourceParams.pdwCmd = &(cmd.DW6.Value);
3374 ResourceParams.dwLocationInCmd = 6;
3375 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3376 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3377
3378 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3379 pOsInterface,
3380 this->m_currentCmdBuf,
3381 &ResourceParams));
3382 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3383 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3384 {
3385 // add Gamut Expansion Gamma Correctionindirect state dump
3386 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3387 pOsInterface->pfnAddIndirectState(pOsInterface,
3388 sizeof(mhw::vebox::xe2_hpm_next::Cmd::Gamut_Expansion_Gamma_Correction_CMD),
3389 pIndirectState,
3390 ResourceParams.pdwCmd,
3391 ResourceParams.pdwCmd + 1,
3392 "Gamut_Expansion_Gamma_Correction_CMD");
3393 }
3394 #endif
3395
3396 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiGamutStateSize);
3397 }
3398
3399 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3400 if (params.bCmBuffer)
3401 {
3402 ResourceParams.presResource = pVeboxParamResource;
3403 ResourceParams.dwOffset = pVeboxHeap->uiVertexTableOffset;
3404 }
3405 else
3406 {
3407 ResourceParams.presResource = pVeboxHeapResource;
3408 ResourceParams.dwOffset = pVeboxHeap->uiVertexTableOffset + uiInstanceBaseAddr;
3409 }
3410 ResourceParams.pdwCmd = &(cmd.DW8.Value);
3411 ResourceParams.dwLocationInCmd = 8;
3412 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3413 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3414
3415 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3416 pOsInterface,
3417 this->m_currentCmdBuf,
3418 &ResourceParams));
3419 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3420 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3421 {
3422 // add Vertex Table state dump
3423 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3424 pOsInterface->pfnAddIndirectState(pOsInterface,
3425 sizeof(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_VERTEX_TABLE_CMD),
3426 pIndirectState,
3427 ResourceParams.pdwCmd,
3428 ResourceParams.pdwCmd + 1,
3429 "VEBOX_VERTEX_TABLE_CMD");
3430 }
3431 #endif
3432 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiVertexTableSize);
3433
3434 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3435 if (params.bCmBuffer)
3436 {
3437 ResourceParams.presResource = pVeboxParamResource;
3438 ResourceParams.dwOffset = pVeboxHeap->uiCapturePipeStateOffset;
3439 }
3440 else
3441 {
3442 ResourceParams.presResource = pVeboxHeapResource;
3443 ResourceParams.dwOffset = pVeboxHeap->uiCapturePipeStateOffset + uiInstanceBaseAddr;
3444 }
3445
3446 ResourceParams.pdwCmd = &(cmd.DW10.Value);
3447 ResourceParams.dwLocationInCmd = 10;
3448 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3449 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3450
3451 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3452 pOsInterface,
3453 this->m_currentCmdBuf,
3454 &ResourceParams));
3455 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3456 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3457 {
3458 // add CAPTURE PIPE STATE CMD state dump
3459 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3460 pOsInterface->pfnAddIndirectState(pOsInterface,
3461 sizeof(mhw::vebox::xe2_hpm_next::Cmd::VEBOX_CAPTURE_PIPE_STATE_CMD),
3462 pIndirectState,
3463 ResourceParams.pdwCmd,
3464 ResourceParams.pdwCmd + 1,
3465 "VEBOX_CAPTURE_PIPE_STATE_CMD");
3466 }
3467 #endif
3468 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiCapturePipeStateSize);
3469
3470 if (params.pLaceLookUpTables)
3471 {
3472 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3473 ResourceParams.presResource = params.pLaceLookUpTables;
3474 ResourceParams.dwOffset = 0;
3475 ResourceParams.pdwCmd = &(cmd.DW12.Value);
3476 ResourceParams.dwLocationInCmd = 12;
3477 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3478 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3479
3480 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3481 pOsInterface,
3482 this->m_currentCmdBuf,
3483 &ResourceParams));
3484 }
3485
3486 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3487 if (params.bCmBuffer)
3488 {
3489 ResourceParams.presResource = pVeboxParamResource;
3490 ResourceParams.dwOffset = pVeboxHeap->uiGammaCorrectionStateOffset;
3491 }
3492 else
3493 {
3494 ResourceParams.presResource = pVeboxHeapResource;
3495 ResourceParams.dwOffset = pVeboxHeap->uiGammaCorrectionStateOffset + uiInstanceBaseAddr;
3496 }
3497 ResourceParams.pdwCmd = &(cmd.DW14_15.Value[0]);
3498 ResourceParams.dwLocationInCmd = 14;
3499 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3500 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3501
3502 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3503 pOsInterface,
3504 this->m_currentCmdBuf,
3505 &ResourceParams));
3506 #if MOS_COMMAND_BUFFER_DUMP_SUPPORTED
3507 if (*ResourceParams.pdwCmd != 0 || *(ResourceParams.pdwCmd + 1) != 0)
3508 {
3509 // add Gamma Correction state dump
3510 pIndirectState = (uint32_t *)(pVeboxHeap->pLockedDriverResourceMem + ResourceParams.dwOffset);
3511 pOsInterface->pfnAddIndirectState(pOsInterface,
3512 sizeof(PMHW_FORWARD_GAMMA_SEG),
3513 pIndirectState,
3514 ResourceParams.pdwCmd,
3515 ResourceParams.pdwCmd + 1,
3516 "PMHW_FORWARD_GAMMA_SEG");
3517 }
3518 #endif
3519 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiGammaCorrectionStateSize);
3520
3521 if (params.pVebox3DLookUpTables)
3522 {
3523 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3524 ResourceParams.presResource = params.pVebox3DLookUpTables;
3525 ResourceParams.dwOffset = 0;
3526 ResourceParams.pdwCmd = &(cmd.DW16.Value);
3527 ResourceParams.dwLocationInCmd = 16;
3528 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3529 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3530
3531 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3532 pOsInterface,
3533 this->m_currentCmdBuf,
3534 &ResourceParams));
3535 }
3536 }
3537 else
3538 {
3539 // Allocate Resource to avoid Page Fault issue since HW will access it
3540 if (Mos_ResourceIsNull(params.DummyIecpResource))
3541 {
3542 AllocParamsForBufferLinear.Type = MOS_GFXRES_BUFFER;
3543 AllocParamsForBufferLinear.TileType = MOS_TILE_LINEAR;
3544 AllocParamsForBufferLinear.Format = Format_Buffer;
3545 AllocParamsForBufferLinear.dwBytes = m_veboxSettings.uiIecpStateSize;
3546 AllocParamsForBufferLinear.pBufName = "DummyIecpResource";
3547 AllocParamsForBufferLinear.ResUsageType = MOS_HW_RESOURCE_USAGE_VP_INTERNAL_READ_WRITE_FF;
3548
3549 MHW_CHK_STATUS_RETURN(pOsInterface->pfnAllocateResource(
3550 pOsInterface,
3551 &AllocParamsForBufferLinear,
3552 params.DummyIecpResource));
3553 }
3554
3555 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
3556 ResourceParams.presResource = params.DummyIecpResource;
3557 ResourceParams.dwOffset = 0;
3558 ResourceParams.pdwCmd = &(cmd.DW4.Value);
3559 ResourceParams.dwLocationInCmd = 4;
3560 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
3561 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
3562
3563 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3564 pOsInterface,
3565 this->m_currentCmdBuf,
3566 &ResourceParams));
3567
3568 HalOcaInterfaceNext::OnIndirectState(*this->m_currentCmdBuf, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, 0, true, 0);
3569 }
3570
3571 cmd.DW1.ColorGamutExpansionEnable = params.VeboxMode.ColorGamutExpansionEnable;
3572 cmd.DW1.ColorGamutCompressionEnable = params.VeboxMode.ColorGamutCompressionEnable;
3573 cmd.DW1.GlobalIecpEnable = params.VeboxMode.GlobalIECPEnable;
3574 cmd.DW1.DnEnable = params.VeboxMode.DNEnable;
3575 cmd.DW1.DiEnable = params.VeboxMode.DIEnable;
3576 cmd.DW1.DnDiFirstFrame = params.VeboxMode.DNDIFirstFrame;
3577 cmd.DW1.DiOutputFrames = params.VeboxMode.DIOutputFrames;
3578 cmd.DW1.DemosaicEnable = params.VeboxMode.DemosaicEnable;
3579 cmd.DW1.VignetteEnable = params.VeboxMode.VignetteEnable;
3580 cmd.DW1.AlphaPlaneEnable = params.VeboxMode.AlphaPlaneEnable;
3581 cmd.DW1.HotPixelFilteringEnable = params.VeboxMode.HotPixelFilteringEnable;
3582 cmd.DW1.LaceCorrectionEnable = params.VeboxMode.LACECorrectionEnable;
3583 cmd.DW1.DisableEncoderStatistics = params.VeboxMode.DisableEncoderStatistics;
3584 cmd.DW1.DisableTemporalDenoiseFilter = params.VeboxMode.DisableTemporalDenoiseFilter;
3585 cmd.DW1.SinglePipeEnable = params.VeboxMode.SinglePipeIECPEnable;
3586 cmd.DW1.ScalarMode = params.VeboxMode.ScalarMode;
3587 cmd.DW1.ForwardGammaCorrectionEnable = params.VeboxMode.ForwardGammaCorrectionEnable;
3588 cmd.DW1.HdrEnable = params.VeboxMode.Hdr1DLutEnable;
3589 cmd.DW1.Fp16ModeEnable = params.VeboxMode.Fp16ModeEnable;
3590 cmd.DW1.StateSurfaceControlBits = (pOsInterface->pfnCachePolicyGetMemoryObject(
3591 MOS_MP_RESOURCE_USAGE_DEFAULT,
3592 pOsInterface->pfnGetGmmClientContext(pOsInterface))).DwordValue;
3593
3594 cmd.DW17.EncDataControlFor3DLUT = 0;
3595 cmd.DW17.Lut3DMemoryLayoutControl = 0; // Legacy layout
3596 cmd.DW17.ChannelMappingSwapForLut3D = params.LUT3D.ChannelMappingSwapForLut3D; // B->Y, G->U, R->V for DV Perf
3597
3598 cmd.DW17.ArbitrationPriorityControlForLut3D = params.LUT3D.ArbitrationPriorityControl;
3599 // In GmmCachePolicyExt.h, Gen9/Gen10/Gen11/Gen12/MTL+ has the same definition for MEMORY_OBJECT_CONTROL_STATE.
3600 // In MHW_MEMORY_OBJECT_CONTROL_PARAMS, we only defined Gen9 which intended to use for Gen9 later, so reuse Gen9 index.
3601 cmd.DW17.Lut3DMocsTable = params.Vebox3DLookUpTablesSurfCtrl.Gen9.Index;
3602 cmd.DW18.Lut3DEnable = params.LUT3D.Lut3dEnable;
3603 cmd.DW18.Lut3DSize = params.LUT3D.Lut3dSize;
3604
3605 cmd.DW18.ChromaUpsamplingCoSitedHorizontalOffset = params.ChromaSampling.ChromaUpsamplingCoSitedHorizontalOffset;
3606 cmd.DW18.ChromaUpsamplingCoSitedVerticalOffset = params.ChromaSampling.ChromaUpsamplingCoSitedVerticalOffset;
3607 cmd.DW18.ChromaDownsamplingCoSitedHorizontalOffset = params.ChromaSampling.ChromaDownsamplingCoSitedHorizontalOffset;
3608 cmd.DW18.ChromaDownsamplingCoSitedVerticalOffset = params.ChromaSampling.ChromaDownsamplingCoSitedVerticalOffset;
3609 cmd.DW18.BypassChromaUpsampling = params.ChromaSampling.BypassChromaUpsampling;
3610 cmd.DW18.BypassChromaDownsampling = params.ChromaSampling.BypassChromaDownsampling;
3611 cmd.DW18._1DLutSize = params.VeboxMode.Hdr1K1DLut;
3612
3613 return eStatus;
3614 }
3615
_MHW_SETCMD_OVERRIDE_DECL(VEBOX_TILING_CONVERT)3616 _MHW_SETCMD_OVERRIDE_DECL(VEBOX_TILING_CONVERT)
3617 {
3618 _MHW_SETCMD_CALLBASE(VEBOX_TILING_CONVERT);
3619 return MOS_STATUS_SUCCESS;
3620 }
3621
_MHW_SETCMD_OVERRIDE_DECL(VEB_DI_IECP)3622 _MHW_SETCMD_OVERRIDE_DECL(VEB_DI_IECP)
3623 {
3624 MHW_FUNCTION_ENTER;
3625
3626 _MHW_SETCMD_CALLBASE(VEB_DI_IECP);
3627 MHW_RESOURCE_PARAMS resourceParams = {};
3628
3629 MHW_CHK_NULL_RETURN(this->m_osItf);
3630 MHW_CHK_NULL_RETURN(this->m_currentCmdBuf);
3631
3632 //MHW_CHK_NULL_RETURN_RETURN(pVeboxDiIecpCmdParams);
3633 MHW_ASSERT(MOS_IS_ALIGNED(params.dwCurrInputSurfOffset, MHW_PAGE_SIZE)); // offset should be aligned with 4KB
3634 MHW_ASSERT(MOS_IS_ALIGNED(params.dwPrevInputSurfOffset, MHW_PAGE_SIZE)); // offset should be aligned with 4KB
3635
3636 if (params.pOsResCurrInput)
3637 {
3638 if (params.CurInputSurfMMCState != MOS_MEMCOMP_DISABLED)
3639 {
3640 mhw::vebox::xe2_hpm_next::Cmd::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD* pSurfCtrlBits;
3641 pSurfCtrlBits = (mhw::vebox::xe2_hpm_next::Cmd::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD*)¶ms.CurrInputSurfCtrl.Value;
3642 }
3643
3644 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3645 resourceParams.presResource = params.pOsResCurrInput;
3646 resourceParams.dwOffset = params.dwCurrInputSurfOffset + params.CurrInputSurfCtrl.Value;
3647 resourceParams.pdwCmd = &(cmd.DW2.Value);
3648 resourceParams.dwLocationInCmd = 2;
3649 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3650
3651 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3652 this->m_osItf,
3653 this->m_currentCmdBuf,
3654 &resourceParams));
3655 }
3656
3657 if (params.pOsResPrevInput)
3658 {
3659 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3660 resourceParams.presResource = params.pOsResPrevInput;
3661 resourceParams.dwOffset = params.PrevInputSurfCtrl.Value + params.dwPrevInputSurfOffset;
3662 resourceParams.pdwCmd = &(cmd.DW4.Value);
3663 resourceParams.dwLocationInCmd = 4;
3664 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3665
3666 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3667 this->m_osItf,
3668 this->m_currentCmdBuf,
3669 &resourceParams));
3670 }
3671
3672 if (params.pOsResStmmInput)
3673 {
3674 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3675 resourceParams.presResource = params.pOsResStmmInput;
3676 resourceParams.dwOffset = params.StmmInputSurfCtrl.Value;
3677 resourceParams.pdwCmd = &(cmd.DW6.Value);
3678 resourceParams.dwLocationInCmd = 6;
3679 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3680
3681 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3682 this->m_osItf,
3683 this->m_currentCmdBuf,
3684 &resourceParams));
3685 }
3686
3687 if (params.pOsResStmmOutput)
3688 {
3689 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3690 resourceParams.presResource = params.pOsResStmmOutput;
3691 resourceParams.dwOffset = params.StmmOutputSurfCtrl.Value;
3692 resourceParams.pdwCmd = &(cmd.DW8.Value);
3693 resourceParams.dwLocationInCmd = 8;
3694 resourceParams.bIsWritable = true;
3695 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3696
3697 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3698 this->m_osItf,
3699 this->m_currentCmdBuf,
3700 &resourceParams));
3701 }
3702
3703 if (params.pOsResDenoisedCurrOutput)
3704 {
3705 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3706 resourceParams.presResource = params.pOsResDenoisedCurrOutput;
3707 resourceParams.dwOffset = params.DenoisedCurrOutputSurfCtrl.Value;
3708 resourceParams.pdwCmd = &(cmd.DW10.Value);
3709 resourceParams.dwLocationInCmd = 10;
3710 resourceParams.bIsWritable = true;
3711 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3712
3713 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3714 this->m_osItf,
3715 this->m_currentCmdBuf,
3716 &resourceParams));
3717 }
3718
3719 if (params.pOsResCurrOutput)
3720 {
3721 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3722 resourceParams.presResource = params.pOsResCurrOutput;
3723 resourceParams.dwOffset = params.CurrOutputSurfCtrl.Value + params.dwCurrOutputSurfOffset;
3724 resourceParams.pdwCmd = &(cmd.DW12.Value);
3725 resourceParams.dwLocationInCmd = 12;
3726 resourceParams.bIsWritable = true;
3727 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3728
3729 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3730 this->m_osItf,
3731 this->m_currentCmdBuf,
3732 &resourceParams));
3733 }
3734
3735 if (params.pOsResPrevOutput)
3736 {
3737 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3738 resourceParams.presResource = params.pOsResPrevOutput;
3739 resourceParams.dwOffset = params.PrevOutputSurfCtrl.Value;
3740 resourceParams.pdwCmd = &(cmd.DW14.Value);
3741 resourceParams.dwLocationInCmd = 14;
3742 resourceParams.bIsWritable = true;
3743 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3744
3745 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3746 this->m_osItf,
3747 this->m_currentCmdBuf,
3748 &resourceParams));
3749 }
3750
3751 if (params.pOsResStatisticsOutput)
3752 {
3753 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3754 resourceParams.presResource = params.pOsResStatisticsOutput;
3755 resourceParams.dwOffset = params.StatisticsOutputSurfCtrl.Value;
3756 resourceParams.pdwCmd = &(cmd.DW16.Value);
3757 resourceParams.dwLocationInCmd = 16;
3758 resourceParams.bIsWritable = true;
3759 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3760
3761 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3762 this->m_osItf,
3763 this->m_currentCmdBuf,
3764 &resourceParams));
3765 }
3766
3767 if (params.pOsResAlphaOrVignette)
3768 {
3769 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3770 resourceParams.presResource = params.pOsResAlphaOrVignette;
3771 resourceParams.dwOffset = params.AlphaOrVignetteSurfCtrl.Value;
3772 resourceParams.pdwCmd = &(cmd.DW18.Value);
3773 resourceParams.dwLocationInCmd = 18;
3774 resourceParams.bIsWritable = true;
3775 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3776
3777 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3778 this->m_osItf,
3779 this->m_currentCmdBuf,
3780 &resourceParams));
3781 }
3782
3783 if (params.pOsResLaceOrAceOrRgbHistogram)
3784 {
3785 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3786 resourceParams.presResource = params.pOsResLaceOrAceOrRgbHistogram;
3787 resourceParams.dwOffset = params.LaceOrAceOrRgbHistogramSurfCtrl.Value;
3788 resourceParams.pdwCmd = &(cmd.DW20.Value);
3789 resourceParams.dwLocationInCmd = 20;
3790 resourceParams.bIsWritable = true;
3791 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3792
3793 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3794 this->m_osItf,
3795 this->m_currentCmdBuf,
3796 &resourceParams));
3797 }
3798
3799 if (params.pOsResSkinScoreSurface)
3800 {
3801 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
3802 resourceParams.presResource = params.pOsResSkinScoreSurface;
3803 resourceParams.dwOffset = params.SkinScoreSurfaceSurfCtrl.Value;
3804 resourceParams.pdwCmd = &(cmd.DW22.Value);
3805 resourceParams.dwLocationInCmd = 22;
3806 resourceParams.bIsWritable = true;
3807 resourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
3808
3809 MHW_CHK_STATUS_RETURN(AddResourceToCmd(
3810 this->m_osItf,
3811 this->m_currentCmdBuf,
3812 &resourceParams));
3813 }
3814
3815 if (m_veboxScalabilityEnabled == false)
3816 {
3817 cmd.DW1.EndingX = params.dwEndingX;
3818 cmd.DW1.StartingX = params.dwStartingX;
3819 }
3820 else
3821 {
3822 uint32_t iMediumX;
3823 MHW_ASSERT(params.dwEndingX >= m_numofVebox * 64 - 1);
3824
3825 iMediumX = MOS_ALIGN_FLOOR(((params.dwEndingX + 1) / m_numofVebox), 64);
3826 iMediumX = MOS_CLAMP_MIN_MAX(iMediumX, 64, (params.dwEndingX - 63));
3827
3828 if (m_numofVebox > 1)
3829 {
3830 if (m_indexofVebox == MHW_VEBOX_STARTING_INDEX)
3831 {
3832 cmd.DW1.EndingX = iMediumX - 1;
3833 cmd.DW1.StartingX = params.dwStartingX;
3834 }
3835 else if (m_indexofVebox == m_numofVebox - 1)
3836 {
3837 cmd.DW1.EndingX = params.dwEndingX;
3838 cmd.DW1.StartingX = m_indexofVebox * iMediumX;
3839 }
3840 else if (m_indexofVebox < m_numofVebox - 1)
3841 {
3842 cmd.DW1.EndingX = (m_indexofVebox + 1) * iMediumX - 1;
3843 cmd.DW1.StartingX = m_indexofVebox * iMediumX;
3844 }
3845 else
3846 {
3847 MHW_ASSERTMESSAGE("Unsupported Vebox Scalability Settings");
3848 }
3849 }
3850
3851 if (m_usingSfc)
3852 {
3853 cmd.DW1.SplitWorkloadEnable = true;
3854
3855 if ((params.dwEndingX + 1) != m_numofVebox * iMediumX)
3856 {
3857 if (m_indexofVebox < m_numofVebox - 1)
3858 {
3859 cmd.DW1.EndingX += 64;
3860 }
3861
3862 if (m_indexofVebox > MHW_VEBOX_STARTING_INDEX)
3863 {
3864 cmd.DW1.StartingX += 64;
3865 }
3866 }
3867 }
3868 else
3869 {
3870 cmd.DW1.SplitWorkloadEnable = false;
3871 }
3872
3873 cmd.DW24.OutputEndingX = cmd.DW1.EndingX;
3874 cmd.DW24.OutputStartingX = cmd.DW1.StartingX;
3875
3876 if (m_usingSfc)
3877 {
3878 // Use left overfetch for sfc split
3879 if (cmd.DW1.StartingX >= 64)
3880 {
3881 cmd.DW1.StartingX -= 64;
3882 }
3883 }
3884
3885 MT_LOG3(MT_VP_MHW_VE_SCALABILITY, MT_NORMAL, MT_VP_MHW_VE_SCALABILITY_EN, m_veboxScalabilityEnabled,
3886 MT_VP_MHW_VE_SCALABILITY_USE_SFC, m_usingSfc, MT_VP_MHW_VE_SCALABILITY_IDX, m_indexofVebox);
3887
3888 MHW_NORMALMESSAGE("VEBOX%d STATE: startx %d endx %d", m_indexofVebox, cmd.DW1.StartingX, cmd.DW1.EndingX);
3889 MHW_NORMALMESSAGE("VEBOX%d STATE: output startx %d endx %d", m_indexofVebox, cmd.DW24.OutputStartingX, cmd.DW24.OutputEndingX);
3890 }
3891
3892 cmd.DW26.StartingY = params.dwStartingY;
3893 cmd.DW26.EndingY = params.dwEndingY;
3894
3895 return MOS_STATUS_SUCCESS;
3896
3897 }
3898
3899 protected:
3900 using base_t = vebox::Impl<mhw::vebox::xe2_hpm_next::Cmd>;
3901
3902 MEDIA_CLASS_DEFINE_END(mhw__vebox__xe2_hpm_next__Impl)
3903 };
3904
3905 } // namespace xe_hpg
3906 } // namespace render
3907 } // namespace mhw
3908
3909 #endif // __MHW_VEBOX_XE2_HPM_NEXT_IMPL_H__
3910