1 /* 2 * Copyright (c) 2014-2017, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_vebox_g8_X.h 24 //! \brief Defines functions for constructing vebox commands on Gen8-based platforms 25 26 //! 27 #ifndef __MHW_VEBOX_G8_X_H__ 28 #define __MHW_VEBOX_G8_X_H__ 29 30 #include "mhw_vebox_generic.h" 31 #include "mhw_vebox_hwcmd_g8_X.h" 32 33 #define ABSMAXABSMIN_THRESHOLD_DEFAULT_G8 20 34 //! 35 //! \brief VEBOX Settings for G8 36 //! 37 const MHW_VEBOX_SETTINGS g_Vebox_Settings_g8 = 38 { 39 MHW_MAX_VEBOX_STATES, //!< uiNumInstances 40 MHW_SYNC_SIZE, //!< uiSyncSize 41 MHW_PAGE_SIZE, //!< uiDndiStateSize 42 MHW_PAGE_SIZE, //!< uiIecpStateSize 43 MHW_PAGE_SIZE, //!< uiGamutStateSize 44 MHW_PAGE_SIZE, //!< uiVertexTableSize 45 MHW_PAGE_SIZE, //!< uiCapturePipeStateSize 46 0, //!< uiGammaCorrectionStateSize 47 0 //!< uiHdrStateSize 48 }; 49 50 class MhwVeboxInterfaceG8 : public MhwVeboxInterfaceGeneric<mhw_vebox_g8_X> 51 { 52 public: 53 MhwVeboxInterfaceG8( 54 PMOS_INTERFACE pInputInterface); 55 ~MhwVeboxInterfaceG8()56 virtual ~MhwVeboxInterfaceG8() { MHW_FUNCTION_ENTER; } 57 58 MOS_STATUS VeboxAdjustBoundary( 59 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam, 60 uint32_t *pdwSurfaceWidth, 61 uint32_t *pdwSurfaceHeight, 62 bool bDIEnable); 63 64 MOS_STATUS AddVeboxState( 65 PMOS_COMMAND_BUFFER pCmdBuffer, 66 PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams, 67 bool bUseCmBuffer); 68 69 MOS_STATUS AddVeboxSurfaces( 70 PMOS_COMMAND_BUFFER pCmdBuffer, 71 PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams); 72 73 MOS_STATUS AddVeboxDiIecp( 74 PMOS_COMMAND_BUFFER pCmdBuffer, 75 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams); 76 77 MOS_STATUS AddVeboxDndiState( 78 PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams); 79 80 MOS_STATUS AddVeboxIecpState( 81 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams); 82 83 MOS_STATUS AddVeboxGamutState( 84 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams, 85 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams); 86 87 MOS_STATUS AddVeboxIecpAceState( 88 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams); 89 90 MOS_STATUS GetVeboxAce_FullImageHistogram( 91 uint32_t *pFullImageHistogram); 92 AddVeboxSurfaceControlBits(PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams,uint32_t * pSurfCtrlBits)93 MOS_STATUS AddVeboxSurfaceControlBits( 94 PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams, 95 uint32_t *pSurfCtrlBits) 96 { 97 MOS_STATUS eStatus = MOS_STATUS_PLATFORM_NOT_SUPPORTED; 98 MHW_ASSERTMESSAGE("Unsupported on this platform."); 99 return eStatus; 100 } 101 102 private: 103 104 void SetVeboxSurfaces( 105 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam, 106 PMHW_VEBOX_SURFACE_PARAMS pDerivedSurfaceParam, 107 PMHW_VEBOX_SURFACE_PARAMS pSkinScoreSurfaceParam, 108 mhw_vebox_g8_X::VEBOX_SURFACE_STATE_CMD *pVeboxSurfaceState, 109 bool bIsOutputSurface, 110 bool bDIEnable); 111 112 //! 113 //! \brief Set Vebox Iecp State Back-End CSC 114 //! \details Set Back-End CSC part of the VEBOX IECP States 115 //! \param [in] pVeboxIecpState 116 //! Pointer to VEBOX IECP States 117 //! \param [in] pVeboxIecpParams 118 //! Pointer to VEBOX IECP State Params 119 //! \param [in] bEnableFECSC 120 //! Flag to enable FECSC 121 //! \return void 122 //! 123 void SetVeboxIecpStateBecsc( 124 mhw_vebox_g8_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState, 125 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams, 126 bool bEnableFECSC); 127 128 void SetVeboxIecpStateFecsc( 129 mhw_vebox_g8_X::VEBOX_FRONT_END_CSC_STATE_CMD *pVeboxFecscState, 130 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams); 131 132 void SetVeboxIecpStateCcm( 133 mhw_vebox_g8_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState, 134 PMHW_CAPPIPE_PARAMS pCapPipeParams, 135 const unsigned int uCoeffValue); 136 137 //! 138 //! \brief init VEBOX IECP States 139 //! \details init Vebox IECP states STD/E,ACE,TCC,AlphaAoi, 140 //! \param [in] pVeboxIecpStateCmd 141 //! Pointer to VEBOX_IECP_STATE_CMD Structure 142 //! \return void 143 //! 144 void IecpStateInitialization( 145 mhw_vebox_g8_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState); 146 147 //! 148 //! \brief init VEBOX Gammute State 149 //! \details init VEBOX Gammute State 150 //! \param [in] pGamutState 151 //! Pointer to VEBOX_GAMUT_STATE_CMD Structure 152 //! \return void 153 //! 154 void GamutStateInitialization( 155 mhw_vebox_g8_X::VEBOX_GAMUT_STATE_CMD *pGamutState); 156 }; 157 158 #endif 159