1 /*
2 * Copyright (c) 2015-2022, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mhw_vebox_g12_X.cpp
24 //! \brief Constructs vebox commands on Gen12-based platforms
25 //! \details Each client facing function both creates a HW command and adds
26 //! that command to a command or batch buffer.
27 //!
28
29 #include "mhw_vebox_g12_X.h"
30 #include "mos_solo_generic.h"
31 #include "mhw_mi_g12_X.h"
32 #include "hal_oca_interface.h"
33 #include "mhw_mi_itf.h"
34
35 // H2S Manual Mode Coef
36 static const uint16_t g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Input_g12[HDR_OETF_1DLUT_POINT_NUMBER] =
37 {
38 0, 257, 514, 771, 1028, 1285, 1542, 1799, 2056, 2313, 2570, 2827, 3084, 3341, 3598, 3855,
39 4112, 4369, 4626, 4883, 5140, 5397, 5654, 5911, 6168, 6425, 6682, 6939, 7196, 7453, 7710, 7967,
40 8224, 8481, 8738, 8995, 9252, 9509, 9766, 10023, 10280, 10537, 10794, 11051, 11308, 11565, 11822, 12079,
41 12336, 12593, 12850, 13107, 13364, 13621, 13878, 14135, 14392, 14649, 14906, 15163, 15420, 15677, 15934, 16191,
42 16448, 16705, 16962, 17219, 17476, 17733, 17990, 18247, 18504, 18761, 19018, 19275, 19532, 19789, 20046, 20303,
43 20560, 20817, 21074, 21331, 21588, 21845, 22102, 22359, 22616, 22873, 23130, 23387, 23644, 23901, 24158, 24415,
44 24672, 24929, 25186, 25443, 25700, 25957, 26214, 26471, 26728, 26985, 27242, 27499, 27756, 28013, 28270, 28527,
45 28784, 29041, 29298, 29555, 29812, 30069, 30326, 30583, 30840, 31097, 31354, 31611, 31868, 32125, 32382, 32639,
46 32896, 33153, 33410, 33667, 33924, 34181, 34438, 34695, 34952, 35209, 35466, 35723, 35980, 36237, 36494, 36751,
47 37008, 37265, 37522, 37779, 38036, 38293, 38550, 38807, 39064, 39321, 39578, 39835, 40092, 40349, 40606, 40863,
48 41120, 41377, 41634, 41891, 42148, 42405, 42662, 42919, 43176, 43433, 43690, 43947, 44204, 44461, 44718, 44975,
49 45232, 45489, 45746, 46003, 46260, 46517, 46774, 47031, 47288, 47545, 47802, 48059, 48316, 48573, 48830, 49087,
50 49344, 49601, 49858, 50115, 50372, 50629, 50886, 51143, 51400, 51657, 51914, 52171, 52428, 52685, 52942, 53199,
51 53456, 53713, 53970, 54227, 54484, 54741, 54998, 55255, 55512, 55769, 56026, 56283, 56540, 56797, 57054, 57311,
52 57568, 57825, 58082, 58339, 58596, 58853, 59110, 59367, 59624, 59881, 60138, 60395, 60652, 60909, 61166, 61423,
53 61680, 61937, 62194, 62451, 62708, 62965, 63222, 63479, 63736, 63993, 64250, 64507, 64764, 65021, 65278, 65535
54 };
55
56 static const uint16_t g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output_g12[HDR_OETF_1DLUT_POINT_NUMBER] =
57 {
58 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
59 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 4,
60 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 11, 11, 12,
61 13, 14, 15, 16, 17, 18, 19, 20, 22, 23, 24, 26, 27, 29, 31, 32,
62 34, 36, 38, 40, 43, 45, 47, 50, 52, 55, 58, 61, 64, 67, 71, 74,
63 78, 82, 86, 90, 95, 99, 104, 109, 114, 119, 125, 131, 137, 143, 150, 157,
64 164, 171, 179, 187, 195, 204, 213, 222, 232, 242, 252, 263, 274, 286, 298, 311,
65 324, 338, 352, 367, 382, 398, 414, 431, 449, 467, 486, 506, 527, 548, 570, 593,
66 617, 641, 667, 693, 721, 749, 779, 809, 841, 874, 908, 944, 980, 1018, 1058, 1099,
67 1141, 1185, 1231, 1278, 1327, 1377, 1430, 1484, 1541, 1599, 1660, 1722, 1787, 1855, 1925, 1997,
68 2072, 2150, 2230, 2314, 2400, 2490, 2583, 2679, 2778, 2882, 2989, 3099, 3214, 3333, 3457, 3584,
69 3717, 3854, 3996, 4143, 4296, 4454, 4618, 4787, 4963, 5146, 5335, 5530, 5733, 5943, 6161, 6387,
70 6621, 6863, 7115, 7375, 7645, 7925, 8215, 8515, 8827, 9150, 9485, 9832, 10192, 10565, 10952, 11353,
71 11769, 12200, 12647, 13110, 13591, 14089, 14606, 15142, 15698, 16275, 16873, 17494, 18138, 18805, 19498, 20217,
72 20963, 21736, 22539, 23372, 24237, 25134, 26066, 27032, 28036, 29077, 30158, 31281, 32446, 33656, 34912, 36217,
73 37572, 38979, 40441, 41959, 43536, 45174, 46876, 48645, 50482, 52392, 54376, 56438, 58582, 60810, 63127, 65535
74 };
75
76 static const uint16_t g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[HDR_OETF_1DLUT_POINT_NUMBER] =
77 {
78 0, 257, 514, 771, 1028, 1285, 1542, 1799, 2056, 2313, 2570, 2827, 3084, 3341, 3598, 3855,
79 4112, 4369, 4626, 4883, 5140, 5397, 5654, 5911, 6168, 6425, 6682, 6939, 7196, 7453, 7710, 7967,
80 8224, 8481, 8738, 8995, 9252, 9509, 9766, 10023, 10280, 10537, 10794, 11051, 11308, 11565, 11822, 12079,
81 12336, 12593, 12850, 13107, 13364, 13621, 13878, 14135, 14392, 14649, 14906, 15163, 15420, 15677, 15934, 16191,
82 16448, 16705, 16962, 17219, 17476, 17733, 17990, 18247, 18504, 18761, 19018, 19275, 19532, 19789, 20046, 20303,
83 20560, 20817, 21074, 21331, 21588, 21845, 22102, 22359, 22616, 22873, 23130, 23387, 23644, 23901, 24158, 24415,
84 24672, 24929, 25186, 25443, 25700, 25957, 26214, 26471, 26728, 26985, 27242, 27499, 27756, 28013, 28270, 28527,
85 28784, 29041, 29298, 29555, 29812, 30069, 30326, 30583, 30840, 31097, 31354, 31611, 31868, 32125, 32382, 32639,
86 32896, 33153, 33410, 33667, 33924, 34181, 34438, 34695, 34952, 35209, 35466, 35723, 35980, 36237, 36494, 36751,
87 37008, 37265, 37522, 37779, 38036, 38293, 38550, 38807, 39064, 39321, 39578, 39835, 40092, 40349, 40606, 40863,
88 41120, 41377, 41634, 41891, 42148, 42405, 42662, 42919, 43176, 43433, 43690, 43947, 44204, 44461, 44718, 44975,
89 45232, 45489, 45746, 46003, 46260, 46517, 46774, 47031, 47288, 47545, 47802, 48059, 48316, 48573, 48830, 49087,
90 49344, 49601, 49858, 50115, 50372, 50629, 50886, 51143, 51400, 51657, 51914, 52171, 52428, 52685, 52942, 53199,
91 53456, 53713, 53970, 54227, 54484, 54741, 54998, 55255, 55512, 55769, 56026, 56283, 56540, 56797, 57054, 57311,
92 57568, 57825, 58082, 58339, 58596, 58853, 59110, 59367, 59624, 59881, 60138, 60395, 60652, 60909, 61166, 61423,
93 61680, 61937, 62194, 62451, 62708, 62965, 63222, 63479, 63736, 63993, 64250, 64507, 64764, 65021, 65278, 65535
94 };
95
96 static const uint16_t g_Hdr_ColorCorrect_OETF_Rec709_Output_g12[HDR_OETF_1DLUT_POINT_NUMBER] =
97 {
98 0, 1157, 2313, 3469, 4626, 5788, 6838, 7795, 8680, 9505, 10282, 11017, 11716, 12383, 13023, 13639,
99 14232, 14805, 15359, 15898, 16420, 16929, 17424, 17907, 18379, 18840, 19291, 19733, 20165, 20589, 21006, 21414,
100 21816, 22211, 22599, 22981, 23357, 23727, 24092, 24451, 24806, 25155, 25500, 25841, 26177, 26509, 26837, 27161,
101 27481, 27798, 28111, 28421, 28727, 29030, 29330, 29627, 29921, 30213, 30501, 30786, 31069, 31350, 31628, 31903,
102 32176, 32447, 32715, 32982, 33246, 33507, 33767, 34025, 34281, 34535, 34787, 35037, 35285, 35531, 35776, 36019,
103 36260, 36500, 36738, 36974, 37209, 37443, 37674, 37905, 38134, 38361, 38587, 38812, 39035, 39257, 39478, 39697,
104 39915, 40132, 40348, 40562, 40776, 40988, 41199, 41409, 41617, 41825, 42031, 42237, 42441, 42645, 42847, 43048,
105 43249, 43448, 43646, 43844, 44040, 44236, 44430, 44624, 44817, 45009, 45200, 45390, 45580, 45768, 45956, 46143,
106 46329, 46514, 46699, 46882, 47065, 47248, 47429, 47610, 47790, 47969, 48147, 48325, 48502, 48679, 48854, 49029,
107 49204, 49378, 49551, 49723, 49895, 50066, 50236, 50406, 50575, 50744, 50912, 51080, 51246, 51413, 51578, 51743,
108 51908, 52072, 52235, 52398, 52560, 52722, 52883, 53044, 53204, 53364, 53523, 53682, 53840, 53997, 54154, 54311,
109 54467, 54623, 54778, 54932, 55086, 55240, 55393, 55546, 55699, 55850, 56002, 56153, 56303, 56453, 56603, 56752,
110 56901, 57049, 57197, 57345, 57492, 57639, 57785, 57931, 58076, 58221, 58366, 58510, 58654, 58798, 58941, 59083,
111 59226, 59368, 59509, 59651, 59792, 59932, 60072, 60212, 60351, 60490, 60629, 60768, 60906, 61043, 61181, 61318,
112 61454, 61591, 61727, 61862, 61998, 62133, 62267, 62402, 62536, 62669, 62803, 62936, 63069, 63201, 63333, 63465,
113 63597, 63728, 63859, 63990, 64120, 64250, 64380, 64509, 64638, 64767, 64896, 65024, 65152, 65280, 65408, 65535
114 };
115
116 const int32_t g_Vebox_BT2020_Inverse_Pixel_Value_g12[256] =
117 {
118 0x0000, 0x14bc, 0x15a8, 0x1694, 0x1780, 0x1870, 0x195c, 0x1a48, 0x1b34, 0x1c24, 0x1d10, 0x1dfc, 0x1eec, 0x1fd8, 0x20c4, 0x21b0,
119 0x22a0, 0x238c, 0x2478, 0x2568, 0x2654, 0x2740, 0x282c, 0x291c, 0x2a08, 0x2af4, 0x2be0, 0x2cd0, 0x2dbc, 0x2ea8, 0x2f98, 0x3084,
120 0x3170, 0x325c, 0x334c, 0x3438, 0x3524, 0x3614, 0x3700, 0x37ec, 0x38d8, 0x39c8, 0x3ab4, 0x3ba0, 0x3c8c, 0x3d7c, 0x3e68, 0x3f54,
121 0x4044, 0x4130, 0x421c, 0x4308, 0x43f8, 0x44e4, 0x45d0, 0x46c0, 0x47ac, 0x4898, 0x4984, 0x4a74, 0x4b60, 0x4c4c, 0x4d38, 0x4e28,
122 0x4f14, 0x5000, 0x50f0, 0x51dc, 0x52c8, 0x53b4, 0x54a4, 0x5590, 0x567c, 0x576c, 0x5858, 0x5944, 0x5a30, 0x5b20, 0x5c0c, 0x5cf8,
123 0x5de8, 0x5ed4, 0x5fc0, 0x60ac, 0x619c, 0x6288, 0x6374, 0x6460, 0x6550, 0x663c, 0x6728, 0x6818, 0x6904, 0x69f0, 0x6adc, 0x6bcc,
124 0x6cb8, 0x6da4, 0x6e94, 0x6f80, 0x706c, 0x7158, 0x7248, 0x7334, 0x7420, 0x750c, 0x75fc, 0x76e8, 0x77d4, 0x78c4, 0x79b0, 0x7a9c,
125 0x7b88, 0x7c78, 0x7d64, 0x7e50, 0x7f40, 0x802c, 0x8118, 0x8204, 0x82f4, 0x83e0, 0x84cc, 0x85b8, 0x86a8, 0x8794, 0x8880, 0x8970,
126 0x8a5c, 0x8b48, 0x8c34, 0x8d24, 0x8e10, 0x8efc, 0x8fec, 0x90d8, 0x91c4, 0x92b0, 0x93a0, 0x948c, 0x9578, 0x9664, 0x9754, 0x9840,
127 0x992c, 0x9a1c, 0x9b08, 0x9bf4, 0x9ce0, 0x9dd0, 0x9ebc, 0x9fa8, 0xa098, 0xa184, 0xa270, 0xa35c, 0xa44c, 0xa538, 0xa624, 0xa714,
128 0xa800, 0xa8ec, 0xa9d8, 0xaac8, 0xabb4, 0xaca0, 0xad8c, 0xae7c, 0xaf68, 0xb054, 0xb144, 0xb230, 0xb31c, 0xb408, 0xb4f8, 0xb5e4,
129 0xb6d0, 0xb7c0, 0xb8ac, 0xb998, 0xba84, 0xbb74, 0xbc60, 0xbd4c, 0xbe38, 0xbf28, 0xc014, 0xc100, 0xc1f0, 0xc2dc, 0xc3c8, 0xc4b4,
130 0xc5a4, 0xc690, 0xc77c, 0xc86c, 0xc958, 0xca44, 0xcb30, 0xcc20, 0xcd0c, 0xcdf8, 0xcee4, 0xcfd4, 0xd0c0, 0xd1ac, 0xd29c, 0xd388,
131 0xd474, 0xd560, 0xd650, 0xd73c, 0xd828, 0xd918, 0xda04, 0xdaf0, 0xdbdc, 0xdccc, 0xddb8, 0xdea4, 0xdf94, 0xe080, 0xe16c, 0xe258,
132 0xe348, 0xe434, 0xe520, 0xe60c, 0xe6fc, 0xe7e8, 0xe8d4, 0xe9c4, 0xeab0, 0xeb9c, 0xec88, 0xed78, 0xee64, 0xef50, 0xf040, 0xf12c,
133 0xf218, 0xf304, 0xf3f4, 0xf4e0, 0xf5cc, 0xf6b8, 0xf7a8, 0xf894, 0xf980, 0xfa70, 0xfb5c, 0xfc48, 0xfd34, 0xfe24, 0xff10, 0xffff
134 };
135
136 const int32_t g_Vebox_BT2020_Forward_Pixel_Value_g12[256] =
137 {
138 0x0000, 0x049c, 0x0598, 0x0694, 0x0794, 0x0890, 0x098c, 0x0a8c, 0x0b88, 0x0c84, 0x0d84, 0x0e80, 0x0f7c, 0x107c, 0x1178, 0x1274,
139 0x1374, 0x1470, 0x156c, 0x166c, 0x1768, 0x1864, 0x1964, 0x1a60, 0x1b5c, 0x1c5c, 0x1d58, 0x1e54, 0x1f54, 0x2050, 0x214c, 0x224c,
140 0x2348, 0x2444, 0x2544, 0x2640, 0x273c, 0x283c, 0x2938, 0x2a34, 0x2b34, 0x2c30, 0x2d30, 0x2e2c, 0x2f28, 0x3028, 0x3124, 0x3220,
141 0x3320, 0x341c, 0x3518, 0x3618, 0x3714, 0x3810, 0x3910, 0x3a0c, 0x3b08, 0x3c08, 0x3d04, 0x3e00, 0x3f00, 0x3ffc, 0x40f8, 0x41f8,
142 0x42f4, 0x43f0, 0x44f0, 0x45ec, 0x46e8, 0x47e8, 0x48e4, 0x49e0, 0x4ae0, 0x4bdc, 0x4cd8, 0x4dd8, 0x4ed4, 0x4fd0, 0x50d0, 0x51cc,
143 0x52c8, 0x53c8, 0x54c4, 0x55c4, 0x56c0, 0x57bc, 0x58bc, 0x59b8, 0x5ab4, 0x5bb4, 0x5cb0, 0x5dac, 0x5eac, 0x5fa8, 0x60a4, 0x61a4,
144 0x62a0, 0x639c, 0x649c, 0x6598, 0x6694, 0x6794, 0x6890, 0x698c, 0x6a8c, 0x6b88, 0x6c84, 0x6d84, 0x6e80, 0x6f7c, 0x707c, 0x7178,
145 0x7274, 0x7374, 0x7470, 0x756c, 0x766c, 0x7768, 0x7864, 0x7964, 0x7a60, 0x7b5c, 0x7c5c, 0x7d58, 0x7e58, 0x7f54, 0x8050, 0x8150,
146 0x824c, 0x8348, 0x8448, 0x8544, 0x8640, 0x8740, 0x883c, 0x8938, 0x8a38, 0x8b34, 0x8c30, 0x8d30, 0x8e2c, 0x8f28, 0x9028, 0x9124,
147 0x9220, 0x9320, 0x941c, 0x9518, 0x9618, 0x9714, 0x9810, 0x9910, 0x9a0c, 0x9b08, 0x9c08, 0x9d04, 0x9e00, 0x9f00, 0x9ffc, 0xa0f8,
148 0xa1f8, 0xa2f4, 0xa3f0, 0xa4f0, 0xa5ec, 0xa6ec, 0xa7e8, 0xa8e4, 0xa9e4, 0xaae0, 0xabdc, 0xacdc, 0xadd8, 0xaed4, 0xafd4, 0xb0d0,
149 0xb1cc, 0xb2cc, 0xb3c8, 0xb4c4, 0xb5c4, 0xb6c0, 0xb7bc, 0xb8bc, 0xb9b8, 0xbab4, 0xbbb4, 0xbcb0, 0xbdac, 0xbeac, 0xbfa8, 0xc0a4,
150 0xc1a4, 0xc2a0, 0xc39c, 0xc49c, 0xc598, 0xc694, 0xc794, 0xc890, 0xc98c, 0xca8c, 0xcb88, 0xcc84, 0xcd84, 0xce80, 0xcf80, 0xd07c,
151 0xd178, 0xd278, 0xd374, 0xd470, 0xd570, 0xd66c, 0xd768, 0xd868, 0xd964, 0xda60, 0xdb60, 0xdc5c, 0xdd58, 0xde58, 0xdf54, 0xe050,
152 0xe150, 0xe24c, 0xe348, 0xe448, 0xe544, 0xe640, 0xe740, 0xe83c, 0xe938, 0xea38, 0xeb34, 0xec30, 0xed30, 0xee2c, 0xef28, 0xf028,
153 0xf124, 0xf220, 0xf320, 0xf41c, 0xf518, 0xf618, 0xf714, 0xf814, 0xf910, 0xfa0c, 0xfb0c, 0xfc08, 0xfd04, 0xfe04, 0xff00, 0xffff
154 };
155 const int32_t g_Vebox_BT2020_Inverse_Gamma_LUT_g12[256] =
156 {
157 0x0000, 0x049c, 0x04cc, 0x0503, 0x053a, 0x0574, 0x05ae, 0x05e9, 0x0626, 0x0665, 0x06a5, 0x06e5, 0x0729, 0x076c, 0x07b1, 0x07f7,
158 0x083f, 0x0888, 0x08d2, 0x091f, 0x096c, 0x09bb, 0x0a0a, 0x0a5d, 0x0aaf, 0x0b03, 0x0b58, 0x0bb0, 0x0c09, 0x0c62, 0x0cbf, 0x0d1b,
159 0x0d79, 0x0dd8, 0x0e3a, 0x0e9c, 0x0f00, 0x0f66, 0x0fcd, 0x1035, 0x109e, 0x110b, 0x1177, 0x11e5, 0x1254, 0x12c6, 0x1339, 0x13ac,
160 0x1423, 0x149a, 0x1512, 0x158c, 0x1609, 0x1685, 0x1704, 0x1785, 0x1806, 0x1889, 0x190d, 0x1995, 0x1a1c, 0x1aa5, 0x1b2f, 0x1bbe,
161 0x1c4b, 0x1cda, 0x1d6d, 0x1dff, 0x1e92, 0x1f27, 0x1fc0, 0x2059, 0x20f2, 0x2190, 0x222d, 0x22cc, 0x236c, 0x2410, 0x24b3, 0x2558,
162 0x2601, 0x26a9, 0x2752, 0x27fe, 0x28ad, 0x295b, 0x2a0b, 0x2abd, 0x2b73, 0x2c28, 0x2cde, 0x2d99, 0x2e53, 0x2f0e, 0x2fcb, 0x308c,
163 0x314c, 0x320e, 0x32d5, 0x339a, 0x3460, 0x3528, 0x35f6, 0x36c1, 0x378e, 0x385d, 0x3931, 0x3a03, 0x3ad7, 0x3bb0, 0x3c87, 0x3d60,
164 0x3e3a, 0x3f1a, 0x3ff8, 0x40d7, 0x41bc, 0x429f, 0x4383, 0x4469, 0x4555, 0x463e, 0x4729, 0x4816, 0x4909, 0x49f9, 0x4aeb, 0x4be3,
165 0x4cd8, 0x4dcf, 0x4ec8, 0x4fc7, 0x50c3, 0x51c1, 0x52c5, 0x53c6, 0x54c9, 0x55ce, 0x56d9, 0x57e1, 0x58eb, 0x59f6, 0x5b08, 0x5c17,
166 0x5d28, 0x5e3f, 0x5f54, 0x606a, 0x6181, 0x62a0, 0x63bb, 0x64d8, 0x65fc, 0x671c, 0x683e, 0x6962, 0x6a8d, 0x6bb5, 0x6cde, 0x6e0e,
167 0x6f3b, 0x706a, 0x719a, 0x72d1, 0x7405, 0x753b, 0x7672, 0x77b1, 0x78ec, 0x7a29, 0x7b6d, 0x7cad, 0x7def, 0x7f33, 0x807e, 0x81c6,
168 0x830f, 0x8460, 0x85ad, 0x86fb, 0x884c, 0x89a4, 0x8af8, 0x8c4e, 0x8da6, 0x8f05, 0x9061, 0x91be, 0x9323, 0x9483, 0x95e6, 0x974a,
169 0x98b7, 0x9a1f, 0x9b89, 0x9cfb, 0x9e68, 0x9fd8, 0xa149, 0xa2c2, 0xa437, 0xa5ae, 0xa726, 0xa8a7, 0xaa23, 0xaba2, 0xad28, 0xaeaa,
170 0xb02d, 0xb1b3, 0xb341, 0xb4ca, 0xb655, 0xb7e9, 0xb977, 0xbb08, 0xbc9b, 0xbe36, 0xbfcc, 0xc164, 0xc305, 0xc4a1, 0xc63e, 0xc7de,
171 0xc986, 0xcb2a, 0xcccf, 0xce76, 0xd026, 0xd1d1, 0xd37e, 0xd533, 0xd6e4, 0xd896, 0xda4a, 0xdc08, 0xddc0, 0xdf7a, 0xe13d, 0xe2fb,
172 0xe4bb, 0xe67c, 0xe847, 0xea0c, 0xebd4, 0xed9d, 0xef6f, 0xf13c, 0xf30b, 0xf4e4, 0xf6b6, 0xf88b, 0xfa62, 0xfc42, 0xfe1c, 0xffff,
173 };
174
175 const int32_t g_Vebox_BT2020_Forward_Gamma_LUT_g12[256] =
176 {
177 0x0000, 0x14bc, 0x1901, 0x1cd0, 0x2060, 0x23a3, 0x26b2, 0x29a2, 0x2c60, 0x2eff, 0x318a, 0x33f3, 0x3644, 0x388a, 0x3ab5, 0x3cce,
178 0x3ee0, 0x40db, 0x42c9, 0x44b3, 0x4689, 0x4854, 0x4a1c, 0x4bd4, 0x4d82, 0x4f2f, 0x50cd, 0x5264, 0x53f9, 0x5582, 0x5703, 0x5885,
179 0x59fb, 0x5b6a, 0x5cdb, 0x5e40, 0x5fa0, 0x6100, 0x6257, 0x63a9, 0x64fc, 0x6646, 0x6790, 0x68d2, 0x6a10, 0x6b4f, 0x6c86, 0x6db9,
180 0x6eee, 0x701a, 0x7144, 0x726f, 0x7393, 0x74b3, 0x75d6, 0x76f1, 0x780a, 0x7924, 0x7a37, 0x7b48, 0x7c5b, 0x7d68, 0x7e72, 0x7f7e,
181 0x8083, 0x8187, 0x828d, 0x838c, 0x8489, 0x8589, 0x8683, 0x877a, 0x8874, 0x8968, 0x8a5b, 0x8b4f, 0x8c3e, 0x8d2c, 0x8e1b, 0x8f06,
182 0x8fee, 0x90d9, 0x91bf, 0x92a6, 0x9389, 0x946a, 0x954e, 0x962c, 0x970a, 0x97e9, 0x98c3, 0x999d, 0x9a78, 0x9b4f, 0x9c24, 0x9cfc,
183 0x9dcf, 0x9ea1, 0x9f76, 0xa045, 0xa114, 0xa1e5, 0xa2b1, 0xa37d, 0xa44a, 0xa514, 0xa5dc, 0xa6a6, 0xa76d, 0xa832, 0xa8f9, 0xa9bd,
184 0xaa7f, 0xab44, 0xac05, 0xacc4, 0xad86, 0xae44, 0xaf02, 0xafc1, 0xb07c, 0xb137, 0xb1f4, 0xb2ad, 0xb368, 0xb41f, 0xb4d6, 0xb58e,
185 0xb643, 0xb6f8, 0xb7ae, 0xb861, 0xb913, 0xb9c7, 0xba78, 0xbb28, 0xbbda, 0xbc89, 0xbd36, 0xbde6, 0xbe93, 0xbf3f, 0xbfed, 0xc097,
186 0xc141, 0xc1ed, 0xc296, 0xc33e, 0xc3e8, 0xc48f, 0xc535, 0xc5de, 0xc683, 0xc727, 0xc7ce, 0xc871, 0xc914, 0xc9b9, 0xca5a, 0xcafc,
187 0xcb9f, 0xcc3f, 0xccde, 0xcd80, 0xce1e, 0xcebf, 0xcf5c, 0xcff9, 0xd098, 0xd134, 0xd1cf, 0xd26d, 0xd307, 0xd3a1, 0xd43d, 0xd4d6,
188 0xd56e, 0xd609, 0xd6a0, 0xd738, 0xd7d1, 0xd867, 0xd8fd, 0xd994, 0xda29, 0xdabe, 0xdb54, 0xdbe8, 0xdc7b, 0xdd10, 0xdda2, 0xde34,
189 0xdec8, 0xdf59, 0xdfea, 0xe07d, 0xe10c, 0xe19c, 0xe22d, 0xe2bc, 0xe34a, 0xe3db, 0xe468, 0xe4f5, 0xe584, 0xe611, 0xe69f, 0xe72b,
190 0xe7b6, 0xe843, 0xe8ce, 0xe958, 0xe9e4, 0xea6e, 0xeaf7, 0xeb82, 0xec0b, 0xec93, 0xed1d, 0xeda4, 0xee2c, 0xeeb5, 0xef3b, 0xefc1,
191 0xf049, 0xf0cf, 0xf154, 0xf1db, 0xf25f, 0xf2e4, 0xf36a, 0xf3ed, 0xf471, 0xf4f6, 0xf579, 0xf5fb, 0xf67f, 0xf701, 0xf783, 0xf806,
192 0xf887, 0xf907, 0xf98a, 0xfa0a, 0xfa8a, 0xfb0b, 0xfb8a, 0xfc0b, 0xfc8a, 0xfd08, 0xfd89, 0xfe06, 0xfe84, 0xff03, 0xff80, 0xffff
193 };
194
MhwVeboxInterfaceG12(PMOS_INTERFACE pInputInterface)195 MhwVeboxInterfaceG12::MhwVeboxInterfaceG12(
196 PMOS_INTERFACE pInputInterface)
197 : MhwVeboxInterfaceGeneric(pInputInterface)
198 {
199 MHW_FUNCTION_ENTER;
200 MEDIA_SYSTEM_INFO *pGtSystemInfo;
201
202 m_veboxSettings = g_Vebox_Settings_g12;
203
204 #if (_DEBUG || _RELEASE_INTERNAL)
205 // On G12, HDR state will be used if 1K 1DLUT mapping needed. Only for debug purpose.
206 {
207 MOS_STATUS eRegStatus = MOS_STATUS_SUCCESS;
208 MOS_USER_FEATURE_VALUE_DATA UserFeatureData = {};
209 bool b1K1DLutEnabled = false;
210 eRegStatus = MOS_UserFeature_ReadValue_ID(
211 nullptr,
212 __VPHAL_ENABLE_1K_1DLUT_ID,
213 &UserFeatureData,
214 m_osInterface->pOsContext);
215 if (eRegStatus == MOS_STATUS_SUCCESS)
216 {
217 b1K1DLutEnabled = (UserFeatureData.u32Data > 0) ? true : false;
218 }
219 m_veboxSettings.uiHdrStateSize = b1K1DLutEnabled ? MHW_PAGE_SIZE * 18 : m_veboxSettings.uiHdrStateSize;
220 }
221 #endif
222
223 m_vebox0InUse = false;
224 m_vebox1InUse = false;
225 m_veboxScalabilitySupported = false;
226 m_veboxSplitRatio = 50;
227 memset(&m_chromaParams, 0, sizeof(m_chromaParams));
228 MOS_SecureMemcpy(m_BT2020InvPixelValue, sizeof(uint32_t)* 256, g_Vebox_BT2020_Inverse_Pixel_Value_g12, sizeof(uint32_t)* 256);
229 MOS_SecureMemcpy(m_BT2020FwdPixelValue, sizeof(uint32_t)* 256, g_Vebox_BT2020_Forward_Pixel_Value_g12, sizeof(uint32_t)* 256);
230 MOS_SecureMemcpy(m_BT2020InvGammaLUT, sizeof(uint32_t)* 256, g_Vebox_BT2020_Inverse_Gamma_LUT_g12, sizeof(uint32_t)* 256);
231 MOS_SecureMemcpy(m_BT2020FwdGammaLUT, sizeof(uint32_t)* 256, g_Vebox_BT2020_Forward_Gamma_LUT_g12, sizeof(uint32_t)* 256);
232
233 MOS_ZeroMemory(&m_laceColorCorrection, sizeof(m_laceColorCorrection));
234
235 MHW_CHK_NULL_NO_STATUS_RETURN(pInputInterface);
236 pGtSystemInfo = pInputInterface->pfnGetGtSystemInfo(pInputInterface);
237 MHW_CHK_NULL_NO_STATUS_RETURN(pGtSystemInfo);
238
239 if (pGtSystemInfo->VEBoxInfo.IsValid &&
240 pGtSystemInfo->VEBoxInfo.Instances.Bits.VEBox0Enabled &&
241 pGtSystemInfo->VEBoxInfo.Instances.Bits.VEBox1Enabled)
242 {
243 m_veboxScalabilitySupported = true;
244 }
245
246 #if (_DEBUG || _RELEASE_INTERNAL)
247 MOS_USER_FEATURE_VALUE_DATA UserFeatureData;
248 // read the "Vebox Split Ratio" user feature
249 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
250 MOS_UserFeature_ReadValue_ID(
251 nullptr,
252 __MEDIA_USER_FEATURE_VALUE_VEBOX_SPLIT_RATIO_ID,
253 &UserFeatureData,
254 m_osInterface->pOsContext);
255 m_veboxSplitRatio = UserFeatureData.u32Data;
256 #endif
257 }
258
SetVeboxIecpStateBecsc(mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD * pVeboxIecpState,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,bool bEnableFECSC)259 void MhwVeboxInterfaceG12::SetVeboxIecpStateBecsc(
260 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState,
261 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
262 bool bEnableFECSC)
263 {
264 PMHW_CAPPIPE_PARAMS pCapPipeParams = nullptr;
265 MOS_FORMAT dstFormat;
266
267 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpState);
268 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpParams);
269
270 pCapPipeParams = &pVeboxIecpParams->CapPipeParams;
271 dstFormat = pVeboxIecpParams->dstFormat;
272
273 #define SET_COEFS(_c0, _c1, _c2, _c3, _c4, _c5, _c6, _c7, _c8) \
274 { \
275 pVeboxIecpState->CscState.DW0.C0 = _c0; \
276 pVeboxIecpState->CscState.DW1.C1 = _c1; \
277 pVeboxIecpState->CscState.DW2.C2 = _c2; \
278 pVeboxIecpState->CscState.DW3.C3 = _c3; \
279 pVeboxIecpState->CscState.DW4.C4 = _c4; \
280 pVeboxIecpState->CscState.DW5.C5 = _c5; \
281 pVeboxIecpState->CscState.DW6.C6 = _c6; \
282 pVeboxIecpState->CscState.DW7.C7 = _c7; \
283 pVeboxIecpState->CscState.DW8.C8 = _c8; \
284 }
285
286 #define SET_INPUT_OFFSETS(_in1, _in2, _in3) \
287 { \
288 pVeboxIecpState->CscState.DW9.OffsetIn1 = _in1; \
289 pVeboxIecpState->CscState.DW10.OffsetIn2 = _in2; \
290 pVeboxIecpState->CscState.DW11.OffsetIn3 = _in3; \
291 }
292
293 #define SET_OUTPUT_OFFSETS(_out1, _out2, _out3) \
294 { \
295 pVeboxIecpState->CscState.DW9.OffsetOut1 = _out1; \
296 pVeboxIecpState->CscState.DW10.OffsetOut2 = _out2; \
297 pVeboxIecpState->CscState.DW11.OffsetOut3 = _out3; \
298 }
299
300 MHW_CHK_NULL_NO_STATUS_RETURN(pCapPipeParams);
301 if (pCapPipeParams->bActive)
302 {
303 // Application controlled CSC operation
304 if (pCapPipeParams->BECSCParams.bActive)
305 {
306 pVeboxIecpState->CscState.DW0.TransformEnable = true;
307
308 if (IS_RGB_SWAP(dstFormat))
309 {
310 pVeboxIecpState->CscState.DW0.YuvChannelSwap = true;
311 }
312
313 // Coeff is S2.16, so multiply the floating value by 65536
314 SET_COEFS(
315 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[0][0] * 65536)),
316 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[0][1] * 65536)),
317 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[0][2] * 65536)),
318 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[1][0] * 65536)),
319 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[1][1] * 65536)),
320 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[1][2] * 65536)),
321 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[2][0] * 65536)),
322 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[2][1] * 65536)),
323 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[2][2] * 65536)));
324 SET_INPUT_OFFSETS(
325 ((uint32_t)pCapPipeParams->BECSCParams.PreOffset[0]),
326 ((uint32_t)pCapPipeParams->BECSCParams.PreOffset[1]),
327 ((uint32_t)pCapPipeParams->BECSCParams.PreOffset[2]));
328 SET_OUTPUT_OFFSETS(
329 ((uint32_t)pCapPipeParams->BECSCParams.PostOffset[0]),
330 ((uint32_t)pCapPipeParams->BECSCParams.PostOffset[1]),
331 ((uint32_t)pCapPipeParams->BECSCParams.PostOffset[2]));
332 }
333 // YUV 4:4:4 CSC to xBGR or xRGB
334 else if ((bEnableFECSC || (pVeboxIecpParams->srcFormat == Format_AYUV)) &&
335 (IS_RGB_FORMAT(dstFormat)))
336 {
337 pVeboxIecpState->CscState.DW0.TransformEnable = true;
338
339 if (IS_RGB_SWAP(dstFormat))
340 {
341 pVeboxIecpState->CscState.DW0.YuvChannelSwap = true;
342 }
343
344 // CSC matrix to convert YUV 4:4:4 to xBGR. e.g. Format_A8B8G8R8. In the
345 // event that dstFormat is xRGB, driver sets R & B channel swapping via
346 // CscState.DW0.YuvChannelSwap so a separate matrix is not needed.
347
348 if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT601)
349 {
350 SET_COEFS(76284, 0, 104595, 76284, MOS_BITFIELD_VALUE((uint32_t)-25689, 19), MOS_BITFIELD_VALUE((uint32_t)-53280, 19), 76284, 132186, 0);
351
352 SET_INPUT_OFFSETS(MOS_BITFIELD_VALUE((uint32_t)-2048, 16),
353 MOS_BITFIELD_VALUE((uint32_t)-16384, 16),
354 MOS_BITFIELD_VALUE((uint32_t)-16384, 16));
355 SET_OUTPUT_OFFSETS(0, 0, 0);
356 }
357 else if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709)
358 {
359 SET_COEFS(76284, 0, 117506, 76284, MOS_BITFIELD_VALUE((uint32_t)-13958, 19), MOS_BITFIELD_VALUE((uint32_t)-34930, 19), 76284, 138412, 0);
360
361 SET_INPUT_OFFSETS(MOS_BITFIELD_VALUE((uint32_t)-2048, 16),
362 MOS_BITFIELD_VALUE((uint32_t)-16384, 16),
363 MOS_BITFIELD_VALUE((uint32_t)-16384, 16));
364 SET_OUTPUT_OFFSETS(0, 0, 0);
365 }
366 else
367 {
368 MHW_ASSERT(false);
369 }
370 }
371 }
372 else if (pVeboxIecpParams->bCSCEnable)
373 {
374 pVeboxIecpState->CscState.DW0.TransformEnable = true;
375
376 if (IS_RGB_SWAP(dstFormat))
377 {
378 pVeboxIecpState->CscState.DW0.YuvChannelSwap = true;
379 }
380
381 // Coeff is S2.16, so multiply the floating value by 65536
382 SET_COEFS(
383 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[0] * 65536.0F)),
384 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[1] * 65536.0F)),
385 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[2] * 65536.0F)),
386 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[3] * 65536.0F)),
387 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[4] * 65536.0F)),
388 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[5] * 65536.0F)),
389 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[6] * 65536.0F)),
390 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[7] * 65536.0F)),
391 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[8] * 65536.0F)));
392
393 // Offset is S15, but the SW offsets are calculated as 8bits,
394 // so left shift them 7bits to be in the position of MSB
395 SET_INPUT_OFFSETS(
396 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[0] * 128.0F)),
397 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[1] * 128.0F)),
398 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[2] * 128.0F)));
399 SET_OUTPUT_OFFSETS(
400 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[0] * 128.0F)),
401 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[1] * 128.0F)),
402 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[2] * 128.0F)));
403 }
404
405 pVeboxIecpState->AlphaAoiState.DW0.AlphaFromStateSelect = pVeboxIecpParams->bAlphaEnable;
406
407 if (pVeboxIecpParams->dstFormat == Format_Y416)
408 {
409 pVeboxIecpState->AlphaAoiState.DW0.ColorPipeAlpha = pVeboxIecpParams->wAlphaValue;
410 }
411 else
412 {
413 // Alpha is U16, but the SW alpha is calculated as 8bits,
414 // so left shift it 8bits to be in the position of MSB
415 pVeboxIecpState->AlphaAoiState.DW0.ColorPipeAlpha = pVeboxIecpParams->wAlphaValue * 256;
416 }
417
418 #undef SET_COEFS
419 #undef SET_INPUT_OFFSETS
420 #undef SET_OUTPUT_OFFSETS
421 }
422
SetVeboxSurfaces(PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,PMHW_VEBOX_SURFACE_PARAMS pDerivedSurfaceParam,PMHW_VEBOX_SURFACE_PARAMS pSkinScoreSurfaceParam,mhw_vebox_g12_X::VEBOX_SURFACE_STATE_CMD * pVeboxSurfaceState,bool bIsOutputSurface,bool bDIEnable)423 void MhwVeboxInterfaceG12::SetVeboxSurfaces(
424 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,
425 PMHW_VEBOX_SURFACE_PARAMS pDerivedSurfaceParam,
426 PMHW_VEBOX_SURFACE_PARAMS pSkinScoreSurfaceParam,
427 mhw_vebox_g12_X::VEBOX_SURFACE_STATE_CMD *pVeboxSurfaceState,
428 bool bIsOutputSurface,
429 bool bDIEnable)
430 {
431 uint32_t dwFormat;
432 uint32_t dwSurfaceWidth;
433 uint32_t dwSurfaceHeight;
434 uint32_t dwSurfacePitch;
435 bool bHalfPitchForChroma;
436 bool bInterleaveChroma;
437 uint16_t wUXOffset;
438 uint16_t wUYOffset;
439 uint16_t wVXOffset;
440 uint16_t wVYOffset;
441 uint8_t bBayerOffset;
442 uint8_t bBayerStride;
443 uint8_t bBayerInputAlignment;
444
445 mhw_vebox_g12_X::VEBOX_SURFACE_STATE_CMD VeboxSurfaceState;
446
447 MHW_CHK_NULL_NO_STATUS_RETURN(pSurfaceParam);
448 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxSurfaceState);
449
450 // Initialize
451 dwSurfaceWidth = 0;
452 dwSurfaceHeight = 0;
453 dwSurfacePitch = 0;
454 bHalfPitchForChroma = false;
455 bInterleaveChroma = false;
456 wUXOffset = 0;
457 wUYOffset = 0;
458 wVXOffset = 0;
459 wVYOffset = 0;
460 bBayerOffset = 0;
461 bBayerStride = 0;
462 bBayerInputAlignment = 0;
463 *pVeboxSurfaceState = VeboxSurfaceState;
464
465 switch (pSurfaceParam->Format)
466 {
467 case Format_NV12:
468 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR4208;
469 bInterleaveChroma = true;
470 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
471 break;
472
473 case Format_YUYV:
474 case Format_YUY2:
475 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBNORMAL;
476 break;
477
478 case Format_UYVY:
479 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPY;
480 break;
481
482 case Format_AYUV:
483 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED444A8;
484 break;
485
486 case Format_Y416:
487 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44416;
488 break;
489
490 case Format_Y410:
491 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44410;
492 break;
493
494 case Format_YVYU:
495 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUV;
496 break;
497
498 case Format_VYUY:
499 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUVY;
500 break;
501
502 case Format_A8B8G8R8:
503 case Format_X8B8G8R8:
504 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
505 break;
506
507 case Format_A16B16G16R16:
508 case Format_A16R16G16B16:
509 case Format_A16B16G16R16F:
510 case Format_A16R16G16B16F:
511 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R16G16B16A16;
512 break;
513
514 case Format_L8:
515 case Format_P8:
516 case Format_Y8:
517 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y8UNORM;
518 break;
519
520 case Format_IRW0:
521 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
522 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISBLUE;
523 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
524 break;
525
526 case Format_IRW1:
527 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
528 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISRED;
529 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
530 break;
531
532 case Format_IRW2:
533 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
534 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISRED;
535 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
536 break;
537
538 case Format_IRW3:
539 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
540 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISBLUE;
541 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
542 break;
543
544 case Format_IRW4:
545 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
546 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISBLUE;
547 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
548 break;
549
550 case Format_IRW5:
551 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
552 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISRED;
553 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
554 break;
555
556 case Format_IRW6:
557 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
558 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISRED;
559 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
560 break;
561
562 case Format_IRW7:
563 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
564 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISBLUE;
565 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
566 break;
567
568 case Format_P010:
569 case Format_P016:
570 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42016;
571 bInterleaveChroma = true;
572 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
573 break;
574
575 case Format_A8R8G8B8:
576 case Format_X8R8G8B8:
577 if (bIsOutputSurface)
578 {
579 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_B8G8R8A8UNORM;
580 }
581 else
582 {
583 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
584 }
585 break;
586
587 case Format_R10G10B10A2:
588 case Format_B10G10R10A2:
589 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R10G10B10A2UNORMR10G10B10A2UNORMSRGB;
590 break;
591
592 case Format_Y216:
593 case Format_Y210:
594 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED42216;
595 break;
596
597 case Format_P216:
598 case Format_P210:
599 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42216;
600 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
601 break;
602
603 case Format_Y16S:
604 case Format_Y16U:
605 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y16UNORM;
606 break;
607
608 default:
609 MHW_ASSERTMESSAGE("Unsupported format.");
610 goto finish;
611 break;
612 }
613
614 if (!bIsOutputSurface)
615 {
616 // camera pipe will use 10/12/14 for LSB, 0 for MSB. For other pipeline,
617 // dwBitDepth is inherited from pSrc->dwDepth which may not among (0,10,12,14)
618 // For such cases should use MSB as default value.
619 switch (pSurfaceParam->dwBitDepth)
620 {
621 case 10:
622 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_10BITLSBALIGNEDDATA;
623 break;
624
625 case 12:
626 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_12BITLSBALIGNEDDATA;
627 break;
628
629 case 14:
630 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_14BITLSBALIGNEDDATA;
631 break;
632
633 case 0:
634 default:
635 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_MSBALIGNEDDATA;
636 break;
637 }
638 }
639 else
640 {
641 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_MSBALIGNEDDATA;
642 }
643
644 // adjust boundary for vebox
645 VeboxAdjustBoundary(
646 pSurfaceParam,
647 &dwSurfaceWidth,
648 &dwSurfaceHeight,
649 bDIEnable);
650
651 dwSurfacePitch = (pSurfaceParam->TileType == MOS_TILE_LINEAR) ? MOS_ALIGN_CEIL(pSurfaceParam->dwPitch, MHW_VEBOX_LINEAR_PITCH) : pSurfaceParam->dwPitch;
652
653 pVeboxSurfaceState->DW1.SurfaceIdentification = bIsOutputSurface;
654 pVeboxSurfaceState->DW2.Width = dwSurfaceWidth - 1;
655 pVeboxSurfaceState->DW2.Height = dwSurfaceHeight - 1;
656
657 pVeboxSurfaceState->DW3.HalfPitchForChroma = bHalfPitchForChroma;
658 pVeboxSurfaceState->DW3.InterleaveChroma = bInterleaveChroma;
659 pVeboxSurfaceState->DW3.SurfaceFormat = dwFormat;
660 pVeboxSurfaceState->DW3.BayerInputAlignment = bBayerInputAlignment;
661 pVeboxSurfaceState->DW3.BayerPatternOffset = bBayerOffset;
662 pVeboxSurfaceState->DW3.BayerPatternFormat = bBayerStride;
663 pVeboxSurfaceState->DW3.SurfacePitch = dwSurfacePitch - 1;
664 pVeboxSurfaceState->DW3.TiledSurface = (pSurfaceParam->TileType != MOS_TILE_LINEAR) ? true : false;
665 pVeboxSurfaceState->DW3.TileWalk = (pSurfaceParam->TileType == MOS_TILE_Y)
666 ? VeboxSurfaceState.TILE_WALK_TILEWALKYMAJOR
667 : VeboxSurfaceState.TILE_WALK_TILEWALKXMAJOR;
668 pVeboxSurfaceState->DW4.XOffsetForU = wUXOffset;
669 pVeboxSurfaceState->DW4.YOffsetForU = wUYOffset;
670 pVeboxSurfaceState->DW5.XOffsetForV = wVXOffset;
671 pVeboxSurfaceState->DW5.YOffsetForV = wVYOffset;
672
673 // May fix this for stereo surfaces
674 pVeboxSurfaceState->DW6.YOffsetForFrame = pSurfaceParam->dwYoffset;
675 pVeboxSurfaceState->DW6.XOffsetForFrame = 0;
676
677 pVeboxSurfaceState->DW7.DerivedSurfacePitch = pDerivedSurfaceParam->dwPitch - 1;
678 pVeboxSurfaceState->DW8.SurfacePitchForSkinScoreOutputSurfaces = (bIsOutputSurface && pSkinScoreSurfaceParam->bActive) ? (pSkinScoreSurfaceParam->dwPitch - 1) : 0;
679
680 finish:
681 return;
682 }
683
setVeboxPrologCmd(PMHW_MI_INTERFACE mhwMiInterface,PMOS_COMMAND_BUFFER cmdBuffer)684 MOS_STATUS MhwVeboxInterfaceG12::setVeboxPrologCmd(
685 PMHW_MI_INTERFACE mhwMiInterface,
686 PMOS_COMMAND_BUFFER cmdBuffer)
687 {
688 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
689 uint64_t auxTableBaseAddr = 0;
690 std::shared_ptr<mhw::mi::Itf> miItf = nullptr;
691
692 MHW_RENDERHAL_CHK_NULL(mhwMiInterface);
693 MHW_RENDERHAL_CHK_NULL(cmdBuffer);
694 MHW_RENDERHAL_CHK_NULL(m_osInterface);
695
696 auxTableBaseAddr = m_osInterface->pfnGetAuxTableBaseAddr(m_osInterface);
697
698 if (auxTableBaseAddr)
699 {
700 miItf = std::static_pointer_cast<mhw::mi::Itf>(mhwMiInterface->GetNewMiInterface());
701
702 if (miItf)
703 {
704 auto ¶ms = miItf->MHW_GETPAR_F(MI_LOAD_REGISTER_IMM)();
705 params = {};
706 params.dwRegister = miItf->GetMmioInterfaces(mhw::mi::MHW_MMIO_VE0_AUX_TABLE_BASE_LOW);//mhw::mi::m_mmioVe0AuxTableBaseLow;
707 params.dwData = (auxTableBaseAddr & 0xffffffff);
708 MHW_RENDERHAL_CHK_STATUS(miItf->MHW_ADDCMD_F(MI_LOAD_REGISTER_IMM)(cmdBuffer));
709
710 params.dwRegister = miItf->GetMmioInterfaces(mhw::mi::MHW_MMIO_VE0_AUX_TABLE_BASE_HIGH); //mhw::mi::m_mmioVe0AuxTableBaseHigh;
711 params.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
712 MHW_RENDERHAL_CHK_STATUS(miItf->MHW_ADDCMD_F(MI_LOAD_REGISTER_IMM)(cmdBuffer));
713 }
714 else
715 {
716 MHW_MI_LOAD_REGISTER_IMM_PARAMS lriParams;
717 MOS_ZeroMemory(&lriParams, sizeof(MHW_MI_LOAD_REGISTER_IMM_PARAMS));
718
719 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioVe0AuxTableBaseLow;
720 lriParams.dwData = (auxTableBaseAddr & 0xffffffff);
721 MHW_RENDERHAL_CHK_STATUS(mhwMiInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
722
723 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioVe0AuxTableBaseHigh;
724 lriParams.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
725 MHW_RENDERHAL_CHK_STATUS(mhwMiInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
726 }
727
728 }
729
730 finish:
731 return eStatus;
732 }
733
VeboxAdjustBoundary(PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,uint32_t * pdwSurfaceWidth,uint32_t * pdwSurfaceHeight,bool bDIEnable)734 MOS_STATUS MhwVeboxInterfaceG12::VeboxAdjustBoundary(
735 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,
736 uint32_t *pdwSurfaceWidth,
737 uint32_t *pdwSurfaceHeight,
738 bool bDIEnable)
739 {
740 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
741
742 MHW_CHK_NULL(pSurfaceParam);
743 MHW_CHK_NULL(pdwSurfaceWidth);
744 MHW_CHK_NULL(pdwSurfaceHeight);
745 MHW_CHK_STATUS(AdjustBoundary(pSurfaceParam, pdwSurfaceWidth, pdwSurfaceHeight, bDIEnable));
746
747 finish:
748 return eStatus;
749 }
750
AddVeboxState(PMOS_COMMAND_BUFFER pCmdBuffer,PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams,bool bCmBuffer)751 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxState(
752 PMOS_COMMAND_BUFFER pCmdBuffer,
753 PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams,
754 bool bCmBuffer)
755 {
756 MOS_STATUS eStatus;
757 PMOS_INTERFACE pOsInterface;
758 PMOS_CONTEXT pOsContext = nullptr;
759 PMOS_RESOURCE pVeboxParamResource = nullptr;
760 PMOS_RESOURCE pVeboxHeapResource = nullptr;
761 PMHW_VEBOX_HEAP pVeboxHeap;
762 PMHW_VEBOX_MODE pVeboxMode;
763 PMHW_VEBOX_CHROMA_SAMPLING pChromaSampling;
764 PMHW_VEBOX_3D_LUT pLUT3D;
765 uint32_t uiInstanceBaseAddr = 0;
766 MHW_RESOURCE_PARAMS ResourceParams;
767 MOS_ALLOC_GFXRES_PARAMS AllocParamsForBufferLinear;
768 mhw_vebox_g12_X::VEBOX_STATE_CMD cmd;
769
770 MHW_CHK_NULL(m_osInterface);
771 MHW_CHK_NULL(m_osInterface->pOsContext);
772 MHW_CHK_NULL(pCmdBuffer);
773 MHW_CHK_NULL(pVeboxStateCmdParams);
774
775 // Initialize
776 eStatus = MOS_STATUS_SUCCESS;
777 pOsInterface = m_osInterface;
778 pOsContext = m_osInterface->pOsContext;
779 pVeboxMode = &pVeboxStateCmdParams->VeboxMode;
780 pLUT3D = &pVeboxStateCmdParams->LUT3D;
781 pChromaSampling = &pVeboxStateCmdParams->ChromaSampling;
782
783 if (!pVeboxStateCmdParams->bNoUseVeboxHeap)
784 {
785 MHW_CHK_NULL(m_veboxHeap);
786
787 pVeboxHeap = m_veboxHeap;
788 if (bCmBuffer)
789 {
790 pVeboxParamResource = pVeboxStateCmdParams->pVeboxParamSurf;
791 }
792 else
793 {
794 pVeboxHeapResource = pVeboxStateCmdParams->bUseVeboxHeapKernelResource ? &pVeboxHeap->KernelResource : &pVeboxHeap->DriverResource;
795
796 // Calculate the instance base address
797 uiInstanceBaseAddr = pVeboxHeap->uiInstanceSize * pVeboxHeap->uiCurState;
798 }
799
800 TraceIndirectStateInfo(*pCmdBuffer, *pOsContext, bCmBuffer, pVeboxStateCmdParams->bUseVeboxHeapKernelResource);
801
802 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
803 if (bCmBuffer)
804 {
805 ResourceParams.presResource = pVeboxParamResource;
806 ResourceParams.dwOffset = pVeboxHeap->uiDndiStateOffset;
807 }
808 else
809 {
810 ResourceParams.presResource = pVeboxHeapResource;
811 ResourceParams.dwOffset = pVeboxHeap->uiDndiStateOffset + uiInstanceBaseAddr;
812 }
813 ResourceParams.pdwCmd = & (cmd.DW2.Value);
814 ResourceParams.dwLocationInCmd = 2;
815 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
816
817 MHW_CHK_STATUS(pfnAddResourceToCmd(
818 pOsInterface,
819 pCmdBuffer,
820 &ResourceParams));
821
822 HalOcaInterface::OnIndirectState(*pCmdBuffer, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiDndiStateSize);
823
824 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
825 if (bCmBuffer)
826 {
827 ResourceParams.presResource = pVeboxParamResource;
828 ResourceParams.dwOffset = pVeboxHeap->uiIecpStateOffset;
829 }
830 else
831 {
832 ResourceParams.presResource = pVeboxHeapResource;
833 ResourceParams.dwOffset = pVeboxHeap->uiIecpStateOffset + uiInstanceBaseAddr;
834 }
835 ResourceParams.pdwCmd = & (cmd.DW4.Value);
836 ResourceParams.dwLocationInCmd = 4;
837 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
838 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
839
840 MHW_CHK_STATUS(pfnAddResourceToCmd(
841 pOsInterface,
842 pCmdBuffer,
843 &ResourceParams));
844
845 HalOcaInterface::OnIndirectState(*pCmdBuffer, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiIecpStateSize);
846
847 // Gamut Expansion, HDR and Forward Gamma Correction are mutually exclusive.
848 if (pVeboxMode && pVeboxMode->Hdr1DLutEnable)
849 {
850 // If HDR is enabled, this points to a buffer containing the HDR state.
851 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
852 if (bCmBuffer)
853 {
854 ResourceParams.presResource = pVeboxParamResource;
855 ResourceParams.dwOffset = pVeboxHeap->uiHdrStateOffset;
856 }
857 else
858 {
859 ResourceParams.presResource = pVeboxHeapResource;
860 ResourceParams.dwOffset = pVeboxHeap->uiHdrStateOffset + uiInstanceBaseAddr;
861 }
862 ResourceParams.pdwCmd = &(cmd.DW6.Value);
863 ResourceParams.dwLocationInCmd = 6;
864 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
865 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
866
867 MHW_CHK_STATUS(pfnAddResourceToCmd(
868 pOsInterface,
869 pCmdBuffer,
870 &ResourceParams));
871
872 HalOcaInterface::OnIndirectState(*pCmdBuffer, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiHdrStateSize);
873 }
874 else
875 {
876 // If Gamut Expansion is enabled, this points to a buffer containing the Gamut Expansion Gamma Correction state.
877 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
878 if (bCmBuffer)
879 {
880 ResourceParams.presResource = pVeboxParamResource;
881 ResourceParams.dwOffset = pVeboxHeap->uiGamutStateOffset;
882 }
883 else
884 {
885 ResourceParams.presResource = pVeboxHeapResource;
886 ResourceParams.dwOffset = pVeboxHeap->uiGamutStateOffset + uiInstanceBaseAddr;
887 }
888 ResourceParams.pdwCmd = &(cmd.DW6.Value);
889 ResourceParams.dwLocationInCmd = 6;
890 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
891 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
892
893 MHW_CHK_STATUS(pfnAddResourceToCmd(
894 pOsInterface,
895 pCmdBuffer,
896 &ResourceParams));
897
898 HalOcaInterface::OnIndirectState(*pCmdBuffer, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiGamutStateSize);
899 }
900
901 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
902 if (bCmBuffer)
903 {
904 ResourceParams.presResource = pVeboxParamResource;
905 ResourceParams.dwOffset = pVeboxHeap->uiVertexTableOffset;
906 }
907 else
908 {
909 ResourceParams.presResource = pVeboxHeapResource;
910 ResourceParams.dwOffset = pVeboxHeap->uiVertexTableOffset + uiInstanceBaseAddr;
911 }
912 ResourceParams.pdwCmd = & (cmd.DW8.Value);
913 ResourceParams.dwLocationInCmd = 8;
914 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
915 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
916
917 MHW_CHK_STATUS(pfnAddResourceToCmd(
918 pOsInterface,
919 pCmdBuffer,
920 &ResourceParams));
921
922 HalOcaInterface::OnIndirectState(*pCmdBuffer, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiVertexTableSize);
923
924 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
925 if (bCmBuffer)
926 {
927 ResourceParams.presResource = pVeboxParamResource;
928 ResourceParams.dwOffset = pVeboxHeap->uiCapturePipeStateOffset;
929 }
930 else
931 {
932 ResourceParams.presResource = pVeboxHeapResource;
933 ResourceParams.dwOffset = pVeboxHeap->uiCapturePipeStateOffset + uiInstanceBaseAddr;
934 }
935
936 ResourceParams.pdwCmd = & (cmd.DW10.Value);
937 ResourceParams.dwLocationInCmd = 10;
938 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
939 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
940
941 MHW_CHK_STATUS(pfnAddResourceToCmd(
942 pOsInterface,
943 pCmdBuffer,
944 &ResourceParams));
945
946 HalOcaInterface::OnIndirectState(*pCmdBuffer, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiCapturePipeStateSize);
947
948 if (pVeboxStateCmdParams->pLaceLookUpTables)
949 {
950 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
951 ResourceParams.presResource = pVeboxStateCmdParams->pLaceLookUpTables;
952 ResourceParams.dwOffset = 0;
953 ResourceParams.pdwCmd = & (cmd.DW12.Value);
954 ResourceParams.dwLocationInCmd = 12;
955 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
956 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
957
958 MHW_CHK_STATUS(pfnAddResourceToCmd(
959 pOsInterface,
960 pCmdBuffer,
961 &ResourceParams));
962 }
963
964 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
965 if (bCmBuffer)
966 {
967 ResourceParams.presResource = pVeboxParamResource;
968 ResourceParams.dwOffset = pVeboxHeap->uiGammaCorrectionStateOffset;
969 }
970 else
971 {
972 ResourceParams.presResource = pVeboxHeapResource;
973 ResourceParams.dwOffset = pVeboxHeap->uiGammaCorrectionStateOffset + uiInstanceBaseAddr;
974 }
975 ResourceParams.pdwCmd = & (cmd.DW14_15.Value[0]);
976 ResourceParams.dwLocationInCmd = 14;
977 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
978 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
979
980 MHW_CHK_STATUS(pfnAddResourceToCmd(
981 pOsInterface,
982 pCmdBuffer,
983 &ResourceParams));
984
985 HalOcaInterface::OnIndirectState(*pCmdBuffer, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiGammaCorrectionStateSize);
986
987 if (pVeboxStateCmdParams->pVebox3DLookUpTables)
988 {
989 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
990 ResourceParams.presResource = pVeboxStateCmdParams->pVebox3DLookUpTables;
991 ResourceParams.dwOffset = 0;
992 ResourceParams.pdwCmd = &(cmd.DW16.Value);
993 ResourceParams.dwLocationInCmd = 16;
994 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
995 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
996
997 MHW_CHK_STATUS(pfnAddResourceToCmd(
998 pOsInterface,
999 pCmdBuffer,
1000 &ResourceParams));
1001 }
1002 }
1003 else
1004 {
1005 // Allocate Resource to avoid Page Fault issue since HW will access it
1006 if (Mos_ResourceIsNull(&pVeboxStateCmdParams->DummyIecpResource))
1007 {
1008 MOS_ZeroMemory(&AllocParamsForBufferLinear, sizeof(MOS_ALLOC_GFXRES_PARAMS));
1009
1010 AllocParamsForBufferLinear.Type = MOS_GFXRES_BUFFER;
1011 AllocParamsForBufferLinear.TileType = MOS_TILE_LINEAR;
1012 AllocParamsForBufferLinear.Format = Format_Buffer;
1013 AllocParamsForBufferLinear.dwBytes = m_veboxSettings.uiIecpStateSize;
1014 AllocParamsForBufferLinear.pBufName = "DummyIecpResource";
1015
1016 MHW_CHK_STATUS(pOsInterface->pfnAllocateResource(
1017 pOsInterface,
1018 &AllocParamsForBufferLinear,
1019 &pVeboxStateCmdParams->DummyIecpResource));
1020 }
1021
1022 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1023 ResourceParams.presResource = &pVeboxStateCmdParams->DummyIecpResource;
1024 ResourceParams.dwOffset = 0;
1025 ResourceParams.pdwCmd = &(cmd.DW4.Value);
1026 ResourceParams.dwLocationInCmd = 4;
1027 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
1028 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
1029
1030 MHW_CHK_STATUS(pfnAddResourceToCmd(
1031 pOsInterface,
1032 pCmdBuffer,
1033 &ResourceParams));
1034
1035 HalOcaInterface::OnIndirectState(*pCmdBuffer, (MOS_CONTEXT_HANDLE)pOsContext, ResourceParams.presResource, 0, true, 0);
1036 }
1037
1038 MHW_CHK_NULL(pVeboxMode);
1039 MHW_CHK_NULL(pLUT3D);
1040 MHW_CHK_NULL(pChromaSampling);
1041
1042 cmd.DW1.ColorGamutExpansionEnable = pVeboxMode->ColorGamutExpansionEnable;
1043 cmd.DW1.ColorGamutCompressionEnable = pVeboxMode->ColorGamutCompressionEnable;
1044 cmd.DW1.GlobalIecpEnable = pVeboxMode->GlobalIECPEnable;
1045 cmd.DW1.DnEnable = pVeboxMode->DNEnable;
1046 cmd.DW1.DiEnable = pVeboxMode->DIEnable;
1047 cmd.DW1.DnDiFirstFrame = pVeboxMode->DNDIFirstFrame;
1048 cmd.DW1.DiOutputFrames = pVeboxMode->DIOutputFrames;
1049 cmd.DW1.DemosaicEnable = pVeboxMode->DemosaicEnable;
1050 cmd.DW1.VignetteEnable = pVeboxMode->VignetteEnable;
1051 cmd.DW1.AlphaPlaneEnable = pVeboxMode->AlphaPlaneEnable;
1052 cmd.DW1.HotPixelFilteringEnable = pVeboxMode->HotPixelFilteringEnable;
1053 cmd.DW1.LaceCorrectionEnable = pVeboxMode->LACECorrectionEnable;
1054 cmd.DW1.DisableEncoderStatistics = pVeboxMode->DisableEncoderStatistics;
1055 cmd.DW1.DisableTemporalDenoiseFilter = pVeboxMode->DisableTemporalDenoiseFilter;
1056 cmd.DW1.SinglePipeEnable = pVeboxMode->SinglePipeIECPEnable;
1057 cmd.DW1.ScalarMode = pVeboxMode->ScalarMode;
1058 cmd.DW1.ForwardGammaCorrectionEnable = pVeboxMode->ForwardGammaCorrectionEnable;
1059 cmd.DW1.HdrEnable = pVeboxMode->Hdr1DLutEnable;
1060 cmd.DW1.Fp16ModeEnable = pVeboxMode->Fp16ModeEnable;
1061 cmd.DW1.StateSurfaceControlBits = (pOsInterface->pfnCachePolicyGetMemoryObject(
1062 MOS_MP_RESOURCE_USAGE_DEFAULT,
1063 pOsInterface->pfnGetGmmClientContext(pOsInterface))).DwordValue;
1064
1065 cmd.DW17.EncDataControlFor3DLUT = 0;
1066
1067 cmd.DW17.ArbitrationPriorityControlForLut3D = pLUT3D->ArbitrationPriorityControl;
1068 // In GmmCachePolicyExt.h, Gen9/Gen10/Gen11/Gen12 has the same definition for MEMORY_OBJECT_CONTROL_STATE.
1069 // In MHW_MEMORY_OBJECT_CONTROL_PARAMS, we only defined Gen9 which intended to use for Gen9 later, so reuse Gen9 index.
1070 cmd.DW17.Lut3DMOCStable = pVeboxStateCmdParams->Vebox3DLookUpTablesSurfCtrl.Gen9.Index;
1071 cmd.DW18.Lut3DEnable = pLUT3D->Lut3dEnable;
1072 cmd.DW18.Lut3DSize = pLUT3D->Lut3dSize;
1073
1074 cmd.DW18.ChromaUpsamplingCoSitedHorizontalOffset = pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset;
1075 cmd.DW18.ChromaUpsamplingCoSitedVerticalOffset = pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset;
1076 cmd.DW18.ChromaDownsamplingCoSitedHorizontalOffset = pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset;
1077 cmd.DW18.ChromaDownsamplingCoSitedVerticalOffset = pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset;
1078 cmd.DW18.BypassChromaUpsampling = pChromaSampling->BypassChromaUpsampling;
1079 cmd.DW18.BypassChromaDownsampling = pChromaSampling->BypassChromaDownsampling;
1080
1081 pOsInterface->pfnAddCommand(pCmdBuffer, &cmd, cmd.byteSize);
1082
1083 finish:
1084 return eStatus;
1085 }
1086
AddVeboxDiIecp(PMOS_COMMAND_BUFFER pCmdBuffer,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)1087 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxDiIecp(
1088 PMOS_COMMAND_BUFFER pCmdBuffer,
1089 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
1090 {
1091 MOS_STATUS eStatus;
1092 PMOS_INTERFACE pOsInterface;
1093 MHW_RESOURCE_PARAMS ResourceParams;
1094
1095 mhw_vebox_g12_X::VEB_DI_IECP_CMD cmd;
1096 MHW_CHK_NULL(m_osInterface);
1097 MHW_CHK_NULL(pCmdBuffer);
1098 MHW_CHK_NULL(pVeboxDiIecpCmdParams);
1099 MHW_ASSERT(MOS_IS_ALIGNED(pVeboxDiIecpCmdParams->dwCurrInputSurfOffset, MHW_PAGE_SIZE)); // offset should be aligned with 4KB
1100 MHW_ASSERT(MOS_IS_ALIGNED(pVeboxDiIecpCmdParams->dwPrevInputSurfOffset, MHW_PAGE_SIZE)); // offset should be aligned with 4KB
1101
1102 // Initialize
1103 eStatus = MOS_STATUS_SUCCESS;
1104 pOsInterface = m_osInterface;
1105
1106 if (pVeboxDiIecpCmdParams->pOsResCurrInput)
1107 {
1108 // For IPU Camera only
1109 #if !EMUL
1110 GMM_RESOURCE_FLAG gmmFlags = {0};
1111 gmmFlags = pVeboxDiIecpCmdParams->pOsResCurrInput->pGmmResInfo->GetResFlags();
1112 if (gmmFlags.Gpu.CameraCapture)
1113 {
1114 pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value = pOsInterface->pfnCachePolicyGetMemoryObject(
1115 MOS_MHW_GMM_RESOURCE_USAGE_CAMERA_CAPTURE,
1116 pOsInterface->pfnGetGmmClientContext(pOsInterface)).DwordValue;
1117 MHW_NORMALMESSAGE(" disable the CameraCapture input caches ");
1118 }
1119 #endif
1120
1121 if (pVeboxDiIecpCmdParams->CurInputSurfMMCState != MOS_MEMCOMP_DISABLED)
1122 {
1123 mhw_vebox_g12_X::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD *pSurfCtrlBits;
1124 pSurfCtrlBits = (mhw_vebox_g12_X::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD*)&pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value;
1125 pSurfCtrlBits->DW0.MemoryCompressionEnable = 1;
1126 pSurfCtrlBits->DW0.CompressionType = pSurfCtrlBits->MEMORY_COMPRESSION_TYPE_MEDIA_COMPRESSION_ENABLE;
1127 if (pVeboxDiIecpCmdParams->CurInputSurfMMCState == MOS_MEMCOMP_RC)
1128 {
1129 pSurfCtrlBits->DW0.CompressionType = pSurfCtrlBits->MEMORY_COMPRESSION_TYPE_RENDER_COMPRESSION_ENABLE;
1130 }
1131 switch (pVeboxDiIecpCmdParams->pOsResCurrInput->TileType)
1132 {
1133 case MOS_TILE_YF:
1134 pSurfCtrlBits->DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYF;
1135 break;
1136 case MOS_TILE_YS:
1137 pSurfCtrlBits->DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYS;
1138 break;
1139 default:
1140 pSurfCtrlBits->DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_NONE;
1141 break;
1142 }
1143 }
1144 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1145 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResCurrInput;
1146 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->dwCurrInputSurfOffset + pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value;
1147 ResourceParams.pdwCmd = & (cmd.DW2.Value);
1148 ResourceParams.dwLocationInCmd = 2;
1149 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1150
1151 MHW_CHK_STATUS(pfnAddResourceToCmd(
1152 pOsInterface,
1153 pCmdBuffer,
1154 &ResourceParams));
1155 }
1156
1157 if (pVeboxDiIecpCmdParams->pOsResPrevInput)
1158 {
1159 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1160 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResPrevInput;
1161 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value + pVeboxDiIecpCmdParams->dwPrevInputSurfOffset;
1162 ResourceParams.pdwCmd = & (cmd.DW4.Value);
1163 ResourceParams.dwLocationInCmd = 4;
1164 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1165
1166 MHW_CHK_STATUS(pfnAddResourceToCmd(
1167 pOsInterface,
1168 pCmdBuffer,
1169 &ResourceParams));
1170 }
1171
1172 if (pVeboxDiIecpCmdParams->pOsResStmmInput)
1173 {
1174 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1175 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResStmmInput;
1176 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value;
1177 ResourceParams.pdwCmd = & (cmd.DW6.Value);
1178 ResourceParams.dwLocationInCmd = 6;
1179 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1180
1181 MHW_CHK_STATUS(pfnAddResourceToCmd(
1182 pOsInterface,
1183 pCmdBuffer,
1184 &ResourceParams));
1185 }
1186
1187 if (pVeboxDiIecpCmdParams->pOsResStmmOutput)
1188 {
1189 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1190 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResStmmOutput;
1191 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value;
1192 ResourceParams.pdwCmd = & (cmd.DW8.Value);
1193 ResourceParams.dwLocationInCmd = 8;
1194 ResourceParams.bIsWritable = true;
1195 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1196
1197 MHW_CHK_STATUS(pfnAddResourceToCmd(
1198 pOsInterface,
1199 pCmdBuffer,
1200 &ResourceParams));
1201 }
1202
1203 if (pVeboxDiIecpCmdParams->pOsResDenoisedCurrOutput)
1204 {
1205 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1206 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResDenoisedCurrOutput;
1207 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value;
1208 ResourceParams.pdwCmd = & (cmd.DW10.Value);
1209 ResourceParams.dwLocationInCmd = 10;
1210 ResourceParams.bIsWritable = true;
1211 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1212
1213 MHW_CHK_STATUS(pfnAddResourceToCmd(
1214 pOsInterface,
1215 pCmdBuffer,
1216 &ResourceParams));
1217 }
1218
1219 if (pVeboxDiIecpCmdParams->pOsResCurrOutput)
1220 {
1221 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1222 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResCurrOutput;
1223 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value + pVeboxDiIecpCmdParams->dwCurrOutputSurfOffset;
1224 ResourceParams.pdwCmd = & (cmd.DW12.Value);
1225 ResourceParams.dwLocationInCmd = 12;
1226 ResourceParams.bIsWritable = true;
1227 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1228
1229 MHW_CHK_STATUS(pfnAddResourceToCmd(
1230 pOsInterface,
1231 pCmdBuffer,
1232 &ResourceParams));
1233 }
1234
1235 if (pVeboxDiIecpCmdParams->pOsResPrevOutput)
1236 {
1237 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1238 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResPrevOutput;
1239 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value;
1240 ResourceParams.pdwCmd = & (cmd.DW14.Value);
1241 ResourceParams.dwLocationInCmd = 14;
1242 ResourceParams.bIsWritable = true;
1243 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1244
1245 MHW_CHK_STATUS(pfnAddResourceToCmd(
1246 pOsInterface,
1247 pCmdBuffer,
1248 &ResourceParams));
1249 }
1250
1251 if (pVeboxDiIecpCmdParams->pOsResStatisticsOutput)
1252 {
1253 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1254 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResStatisticsOutput;
1255 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->StatisticsOutputSurfCtrl.Value;
1256 ResourceParams.pdwCmd = & (cmd.DW16.Value);
1257 ResourceParams.dwLocationInCmd = 16;
1258 ResourceParams.bIsWritable = true;
1259 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1260
1261 MHW_CHK_STATUS(pfnAddResourceToCmd(
1262 pOsInterface,
1263 pCmdBuffer,
1264 &ResourceParams));
1265 }
1266
1267 if (pVeboxDiIecpCmdParams->pOsResAlphaOrVignette)
1268 {
1269 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1270 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResAlphaOrVignette;
1271 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->AlphaOrVignetteSurfCtrl.Value;
1272 ResourceParams.pdwCmd = & (cmd.DW18.Value);
1273 ResourceParams.dwLocationInCmd = 18;
1274 ResourceParams.bIsWritable = true;
1275 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1276
1277 MHW_CHK_STATUS(pfnAddResourceToCmd(
1278 pOsInterface,
1279 pCmdBuffer,
1280 &ResourceParams));
1281 }
1282
1283 if (pVeboxDiIecpCmdParams->pOsResLaceOrAceOrRgbHistogram)
1284 {
1285 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1286 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResLaceOrAceOrRgbHistogram;
1287 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->LaceOrAceOrRgbHistogramSurfCtrl.Value;
1288 ResourceParams.pdwCmd = & (cmd.DW20.Value);
1289 ResourceParams.dwLocationInCmd = 20;
1290 ResourceParams.bIsWritable = true;
1291 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1292
1293 MHW_CHK_STATUS(pfnAddResourceToCmd(
1294 pOsInterface,
1295 pCmdBuffer,
1296 &ResourceParams));
1297 }
1298
1299 if (pVeboxDiIecpCmdParams->pOsResSkinScoreSurface)
1300 {
1301 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1302 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResSkinScoreSurface;
1303 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->SkinScoreSurfaceSurfCtrl.Value;
1304 ResourceParams.pdwCmd = & (cmd.DW22.Value);
1305 ResourceParams.dwLocationInCmd = 22;
1306 ResourceParams.bIsWritable = true;
1307 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1308
1309 MHW_CHK_STATUS(pfnAddResourceToCmd(
1310 pOsInterface,
1311 pCmdBuffer,
1312 &ResourceParams));
1313 }
1314
1315 if (m_vebox0InUse == false && m_vebox1InUse == false)
1316 {
1317 cmd.DW1.EndingX = pVeboxDiIecpCmdParams->dwEndingX;
1318 cmd.DW1.StartingX = pVeboxDiIecpCmdParams->dwStartingX;
1319 }
1320 else if (m_veboxScalabilitySupported)
1321 {
1322 uint32_t iMediumX;
1323 MHW_ASSERT(pVeboxDiIecpCmdParams->dwEndingX >= 127);
1324
1325 iMediumX = MOS_ALIGN_FLOOR(((pVeboxDiIecpCmdParams->dwEndingX + 1) * m_veboxSplitRatio / 100), 64);
1326 iMediumX = MOS_CLAMP_MIN_MAX(iMediumX, 64, (pVeboxDiIecpCmdParams->dwEndingX - 63));
1327
1328 if (m_vebox0InUse == true &&
1329 m_vebox1InUse == false)
1330 {
1331 cmd.DW1.EndingX = iMediumX - 1;
1332 cmd.DW1.StartingX = pVeboxDiIecpCmdParams->dwStartingX;
1333 }
1334 else if (m_vebox0InUse == false &&
1335 m_vebox1InUse == true)
1336 {
1337 cmd.DW1.EndingX = pVeboxDiIecpCmdParams->dwEndingX;
1338 cmd.DW1.StartingX = iMediumX;
1339 }
1340 else
1341 {
1342 MHW_ASSERTMESSAGE("Unsupported Vebox Scalability Settings");
1343 }
1344 }
1345 else
1346 {
1347 MHW_ASSERTMESSAGE("Unsupported Vebox Scalability Settings");
1348 }
1349
1350 pOsInterface->pfnAddCommand(pCmdBuffer, &cmd, cmd.byteSize);
1351
1352 finish:
1353 return eStatus;
1354 }
1355
AddVeboxGamutState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)1356 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxGamutState(
1357 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
1358 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
1359 {
1360 PMHW_VEBOX_HEAP pVeboxHeap;
1361 uint32_t uiOffset;
1362 uint32_t i;
1363 double dInverseGamma = 0;
1364 double dForwardGamma = 1.0; // init as 1.0 as default to avoid divisor be 0
1365 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1366 uint16_t usGE_Values[256][8] = {0};
1367 bool bEnableCCM = false;
1368
1369 PMHW_1DLUT_PARAMS p1DLutParams = nullptr;
1370 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pIecpState;
1371 mhw_vebox_g12_X::VEBOX_GAMUT_CONTROL_STATE_CMD *pGamutState, gamutCmd;
1372 mhw_vebox_g12_X::Gamut_Expansion_Gamma_Correction_CMD *pVeboxGEGammaCorrection, VeboxGEGammaCorrection;
1373
1374 MHW_CHK_NULL(pVeboxGamutParams);
1375 MHW_CHK_NULL(pVeboxIecpParams);
1376 MHW_CHK_NULL(m_veboxHeap);
1377
1378 pVeboxHeap = m_veboxHeap;
1379 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
1380
1381 pIecpState =
1382 (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
1383 pVeboxHeap->uiIecpStateOffset +
1384 uiOffset);
1385 pVeboxGEGammaCorrection =
1386 (mhw_vebox_g12_X::Gamut_Expansion_Gamma_Correction_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
1387 pVeboxHeap->uiGamutStateOffset +
1388 uiOffset);
1389
1390 MHW_CHK_NULL(pIecpState);
1391 MHW_CHK_NULL(pVeboxGEGammaCorrection);
1392
1393 // Must initialize VeboxIecpState even if it is not used because GCE
1394 // requires GlobalIECP enable bit to be turned on
1395 if (!pVeboxIecpParams)
1396 {
1397 IecpStateInitialization(pIecpState);
1398 }
1399 pGamutState = &pIecpState->GamutState;
1400 MHW_CHK_NULL(pGamutState);
1401
1402 if (pVeboxGamutParams->GCompMode != MHW_GAMUT_MODE_NONE)
1403 {
1404 if (pVeboxGamutParams->GCompMode == MHW_GAMUT_MODE_BASIC)
1405 {
1406 pGamutState->DW15.Fullrangemappingenable = false;
1407
1408 if (pVeboxGamutParams->GCompBasicMode == gamutCmd.GCC_BASICMODESELECTION_SCALINGFACTOR)
1409 {
1410 pGamutState->DW17.GccBasicmodeselection = gamutCmd.GCC_BASICMODESELECTION_SCALINGFACTOR;
1411 pGamutState->DW17.Basicmodescalingfactor =
1412 pVeboxGamutParams->iBasicModeScalingFactor;
1413 }
1414 }
1415 else if (pVeboxGamutParams->GCompMode == MHW_GAMUT_MODE_ADVANCED)
1416 {
1417 pGamutState->DW15.Fullrangemappingenable = true;
1418 pGamutState->DW15.D1Out = pVeboxGamutParams->iDout;
1419 pGamutState->DW15.DOutDefault = pVeboxGamutParams->iDoutDefault;
1420 pGamutState->DW15.DInDefault = pVeboxGamutParams->iDinDefault;
1421 pGamutState->DW16.D1In = pVeboxGamutParams->iDin;
1422 }
1423 else
1424 {
1425 MHW_ASSERTMESSAGE("Invalid GAMUT MODE");
1426 }
1427
1428 // Set Vertex Table if Gamut Compression is enabled
1429 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::AddVeboxVertexTable(pVeboxGamutParams->ColorSpace);
1430 }
1431
1432 // Initialize the Gamut_Expansion_Gamma_Correction.
1433 *pVeboxGEGammaCorrection = VeboxGEGammaCorrection;
1434 if (pVeboxGamutParams->bColorBalance)
1435 {
1436 // Need to convert YUV input to RGB before GE
1437 pIecpState->CscState.DW0.TransformEnable = true;
1438 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
1439 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601 ||
1440 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
1441 {
1442 pIecpState->CscState.DW0.C0 = 76309;
1443 pIecpState->CscState.DW1.C1 = 0;
1444 pIecpState->CscState.DW2.C2 = 104597;
1445 pIecpState->CscState.DW3.C3 = 76309;
1446 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-25675, 19);
1447 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-53279, 19);
1448 pIecpState->CscState.DW6.C6 = 76309;
1449 pIecpState->CscState.DW7.C7 = 132201;
1450 pIecpState->CscState.DW8.C8 = 0;
1451 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1452 pIecpState->CscState.DW9.OffsetOut1 = 0;
1453 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1454 pIecpState->CscState.DW10.OffsetOut2 = 0;
1455 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1456 pIecpState->CscState.DW11.OffsetOut3 = 0;
1457 }
1458 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
1459 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709 ||
1460 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
1461 {
1462 pIecpState->CscState.DW0.C0 = 76309;
1463 pIecpState->CscState.DW1.C1 = 0;
1464 pIecpState->CscState.DW2.C2 = 117489;
1465 pIecpState->CscState.DW3.C3 = 76309;
1466 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-13975, 19);
1467 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-34925, 19);
1468 pIecpState->CscState.DW6.C6 = 76309;
1469 pIecpState->CscState.DW7.C7 = 138438;
1470 pIecpState->CscState.DW8.C8 = 0;
1471 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1472 pIecpState->CscState.DW9.OffsetOut1 = 0;
1473 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1474 pIecpState->CscState.DW10.OffsetOut2 = 0;
1475 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1476 pIecpState->CscState.DW11.OffsetOut3 = 0;
1477 }
1478 else
1479 {
1480 MHW_ASSERTMESSAGE("Unknown primary");
1481 }
1482
1483 pGamutState->DW0.GlobalModeEnable = true;
1484 pGamutState->DW1.CmW = 1023;
1485
1486 pGamutState->DW1.C0 = pVeboxGamutParams->Matrix[0][0];
1487 pGamutState->DW0.C1 = pVeboxGamutParams->Matrix[0][1];
1488 pGamutState->DW3.C2 = pVeboxGamutParams->Matrix[0][2];
1489 pGamutState->DW2.C3 = pVeboxGamutParams->Matrix[1][0];
1490 pGamutState->DW5.C4 = pVeboxGamutParams->Matrix[1][1];
1491 pGamutState->DW4.C5 = pVeboxGamutParams->Matrix[1][2];
1492 pGamutState->DW7.C6 = pVeboxGamutParams->Matrix[2][0];
1493 pGamutState->DW6.C7 = pVeboxGamutParams->Matrix[2][1];
1494 pGamutState->DW8.C8 = pVeboxGamutParams->Matrix[2][2];
1495 }
1496 else if (pVeboxGamutParams->GExpMode != MHW_GAMUT_MODE_NONE)
1497 {
1498 // Need to convert YUV input to RGB before GE
1499 pIecpState->CscState.DW0.TransformEnable = true;
1500 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
1501 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601 ||
1502 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
1503 {
1504 pIecpState->CscState.DW0.C0 = 1192;
1505 pIecpState->CscState.DW1.C1 = MOS_BITFIELD_VALUE((uint32_t)-2, 19);
1506 pIecpState->CscState.DW2.C2 = 1634;
1507 pIecpState->CscState.DW3.C3 = 1192;
1508 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-401, 19);
1509 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-833, 19);
1510 pIecpState->CscState.DW6.C6 = 1192;
1511 pIecpState->CscState.DW7.C7 = 2066;
1512 pIecpState->CscState.DW8.C8 = MOS_BITFIELD_VALUE((uint32_t)-1, 19);
1513 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-64, 16);
1514 pIecpState->CscState.DW9.OffsetOut1 = 0;
1515 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1516 pIecpState->CscState.DW10.OffsetOut2 = 0;
1517 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1518 pIecpState->CscState.DW11.OffsetOut3 = 0;
1519 }
1520 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
1521 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709 ||
1522 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
1523 {
1524 pIecpState->CscState.DW0.C0 = 1192;
1525 pIecpState->CscState.DW1.C1 = MOS_BITFIELD_VALUE((uint32_t)-1, 19);
1526 pIecpState->CscState.DW2.C2 = 1835;
1527 pIecpState->CscState.DW3.C3 = 1192;
1528 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-218, 19);
1529 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-537, 19);
1530 pIecpState->CscState.DW6.C6 = 1192;
1531 pIecpState->CscState.DW7.C7 = 2164;
1532 pIecpState->CscState.DW8.C8 = 1;
1533 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-64, 16);
1534 pIecpState->CscState.DW9.OffsetOut1 = 0;
1535 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1536 pIecpState->CscState.DW10.OffsetOut2 = 0;
1537 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1538 pIecpState->CscState.DW11.OffsetOut3 = 0;
1539 }
1540 else
1541 {
1542 MHW_ASSERTMESSAGE("Unknown primary");
1543 }
1544
1545 if (pVeboxGamutParams->GExpMode == MHW_GAMUT_MODE_BASIC)
1546 {
1547 pGamutState->DW0.GlobalModeEnable = true;
1548 pGamutState->DW1.CmW = 1023;
1549 }
1550 else if (pVeboxGamutParams->GExpMode == MHW_GAMUT_MODE_ADVANCED)
1551 {
1552 pGamutState->DW0.GlobalModeEnable = false;
1553 }
1554 else
1555 {
1556 MHW_ASSERTMESSAGE("Invalid GAMUT MODE");
1557 }
1558
1559 pGamutState->DW1.C0 = pVeboxGamutParams->Matrix[0][0];
1560 pGamutState->DW0.C1 = pVeboxGamutParams->Matrix[0][1];
1561 pGamutState->DW3.C2 = pVeboxGamutParams->Matrix[0][2];
1562 pGamutState->DW2.C3 = pVeboxGamutParams->Matrix[1][0];
1563 pGamutState->DW5.C4 = pVeboxGamutParams->Matrix[1][1];
1564 pGamutState->DW4.C5 = pVeboxGamutParams->Matrix[1][2];
1565 pGamutState->DW7.C6 = pVeboxGamutParams->Matrix[2][0];
1566 pGamutState->DW6.C7 = pVeboxGamutParams->Matrix[2][1];
1567 pGamutState->DW8.C8 = pVeboxGamutParams->Matrix[2][2];
1568 }
1569 else if (pVeboxGamutParams->bGammaCorr)
1570 {
1571 // Need to convert YUV input to RGB before Gamma Correction
1572 pIecpState->CscState.DW0.TransformEnable = true;
1573 if (IS_RGB_SWAP(pVeboxGamutParams->dstFormat))
1574 {
1575 pIecpState->CscState.DW0.YuvChannelSwap = true;
1576 }
1577 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
1578 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601)
1579 {
1580 pIecpState->CscState.DW0.C0 = 76309;
1581 pIecpState->CscState.DW1.C1 = 0;
1582 pIecpState->CscState.DW2.C2 = 104597;
1583 pIecpState->CscState.DW3.C3 = 76309;
1584 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-25675, 19);
1585 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-53279, 19);
1586 pIecpState->CscState.DW6.C6 = 76309;
1587 pIecpState->CscState.DW7.C7 = 132201;
1588 pIecpState->CscState.DW8.C8 = 0;
1589 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1590 pIecpState->CscState.DW9.OffsetOut1 = 0;
1591 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1592 pIecpState->CscState.DW10.OffsetOut2 = 0;
1593 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1594 pIecpState->CscState.DW11.OffsetOut3 = 0;
1595 }
1596 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
1597 {
1598 pIecpState->CscState.DW0.C0 = 65536;
1599 pIecpState->CscState.DW1.C1 = 0;
1600 pIecpState->CscState.DW2.C2 = 91881;
1601 pIecpState->CscState.DW3.C3 = 65536;
1602 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-22553, 19);
1603 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-46801, 19);
1604 pIecpState->CscState.DW6.C6 = 65536;
1605 pIecpState->CscState.DW7.C7 = 116130;
1606 pIecpState->CscState.DW8.C8 = 0;
1607 pIecpState->CscState.DW9.OffsetIn1 = 0;
1608 pIecpState->CscState.DW9.OffsetOut1 = 0;
1609 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1610 pIecpState->CscState.DW10.OffsetOut2 = 0;
1611 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1612 pIecpState->CscState.DW11.OffsetOut3 = 0;
1613 }
1614 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
1615 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709)
1616 {
1617 pIecpState->CscState.DW0.C0 = 76309;
1618 pIecpState->CscState.DW1.C1 = 0;
1619 pIecpState->CscState.DW2.C2 = 117489;
1620 pIecpState->CscState.DW3.C3 = 76309;
1621 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-13975, 19);
1622 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-34925, 19);
1623 pIecpState->CscState.DW6.C6 = 76309;
1624 pIecpState->CscState.DW7.C7 = 138438;
1625 pIecpState->CscState.DW8.C8 = 0;
1626 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1627 pIecpState->CscState.DW9.OffsetOut1 = 0;
1628 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1629 pIecpState->CscState.DW10.OffsetOut2 = 0;
1630 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1631 pIecpState->CscState.DW11.OffsetOut3 = 0;
1632 }
1633 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
1634 {
1635 pIecpState->CscState.DW0.C0 = 65536;
1636 pIecpState->CscState.DW1.C1 = 0;
1637 pIecpState->CscState.DW2.C2 = 103206;
1638 pIecpState->CscState.DW3.C3 = 65536;
1639 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-12277, 19);
1640 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-30679, 19);
1641 pIecpState->CscState.DW6.C6 = 65536;
1642 pIecpState->CscState.DW7.C7 = 121609;
1643 pIecpState->CscState.DW8.C8 = 0;
1644 pIecpState->CscState.DW9.OffsetIn1 = 0;
1645 pIecpState->CscState.DW9.OffsetOut1 = 0;
1646 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1647 pIecpState->CscState.DW10.OffsetOut2 = 0;
1648 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1649 pIecpState->CscState.DW11.OffsetOut3 = 0;
1650 }
1651 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020 ||
1652 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange)
1653 {
1654 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1655 }
1656 else
1657 {
1658 MHW_ASSERTMESSAGE("Unknown primary");
1659 }
1660
1661 // CCM is needed for CSC(BT2020->BT709/BT601 or vice versa with Different Gamma).
1662 bEnableCCM = (pVeboxGamutParams->InputGammaValue == pVeboxGamutParams->OutputGammaValue) ? false : true;
1663 pGamutState->DW0.GlobalModeEnable = true;
1664 pGamutState->DW1.CmW = 1023;
1665 if ((pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020) && bEnableCCM)
1666 {
1667 if (pVeboxGamutParams->dstColorSpace == MHW_CSpace_BT709)
1668 {
1669 pGamutState->DW1.C0 = 108190;
1670 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38288, 21);
1671 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4747, 21);
1672 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-7967, 21);
1673 pGamutState->DW5.C4 = 74174;
1674 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-557, 21);
1675 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1198, 21);
1676 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6587, 21);
1677 pGamutState->DW8.C8 = 73321;
1678 }
1679 else
1680 {
1681 pGamutState->DW1.C0 = 116420;
1682 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-45094, 21);
1683 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-5785, 21);
1684 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-10586, 21);
1685 pGamutState->DW5.C4 = 77814;
1686 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-1705, 21);
1687 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1036, 21);
1688 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6284, 21);
1689 pGamutState->DW8.C8 = 72864;
1690 }
1691 }
1692 else
1693 {
1694 pGamutState->DW1.C0 = 65536;
1695 pGamutState->DW0.C1 = 0;
1696 pGamutState->DW3.C2 = 0;
1697 pGamutState->DW2.C3 = 0;
1698 pGamutState->DW5.C4 = 65536;
1699 pGamutState->DW4.C5 = 0;
1700 pGamutState->DW7.C6 = 0;
1701 pGamutState->DW6.C7 = 0;
1702 pGamutState->DW8.C8 = 65536;
1703 pGamutState->DW9.OffsetInR = 0;
1704 pGamutState->DW10.OffsetInG = 0;
1705 pGamutState->DW11.OffsetInB = 0;
1706 pGamutState->DW12.OffsetOutR = 0;
1707 pGamutState->DW13.OffsetOutG = 0;
1708 pGamutState->DW14.OffsetOutB = 0;
1709 }
1710
1711 if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_1P0)
1712 {
1713 dInverseGamma = 1.0;
1714 }
1715 else if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_2P2)
1716 {
1717 dInverseGamma = 2.2;
1718 }
1719 else if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_2P6)
1720 {
1721 dInverseGamma = 2.6;
1722 }
1723 else
1724 {
1725 MHW_ASSERTMESSAGE("Invalid InputGammaValue");
1726 }
1727
1728 if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_1P0)
1729 {
1730 dForwardGamma = 1.0;
1731 }
1732 else if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_2P2)
1733 {
1734 dForwardGamma = 2.2;
1735 }
1736 else if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_2P6)
1737 {
1738 dForwardGamma = 2.6;
1739 }
1740 else
1741 {
1742 MHW_ASSERTMESSAGE("Invalid OutputGammaValue");
1743 }
1744
1745 if ((pVeboxGamutParams->InputGammaValue == MHW_GAMMA_1P0) && (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_1P0))
1746 {
1747 for (i = 0; i < 256; i++)
1748 {
1749 usGE_Values[i][0] = 257 * i;
1750 usGE_Values[i][1] =
1751 usGE_Values[i][2] =
1752 usGE_Values[i][3] = 257 * i;
1753
1754 usGE_Values[i][4] = 257 * i;
1755 usGE_Values[i][5] =
1756 usGE_Values[i][6] =
1757 usGE_Values[i][7] = 257 * i;
1758 }
1759 // Copy two uint16_t to one DW (UNT32).
1760 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1761 }
1762 else
1763 {
1764 for (i = 0; i < 255; i++)
1765 {
1766 usGE_Values[i][0] = 256 * i;
1767 usGE_Values[i][1] =
1768 usGE_Values[i][2] =
1769 usGE_Values[i][3] = (uint16_t)MOS_F_ROUND(pow((double)((double)i / 256), dInverseGamma) * 65536);
1770
1771 usGE_Values[i][4] = 256 * i;
1772 usGE_Values[i][5] =
1773 usGE_Values[i][6] =
1774 usGE_Values[i][7] = (uint16_t)MOS_F_ROUND(pow((double)((double)i / 256), 1 / dForwardGamma) * 65536);
1775 }
1776 // Copy two uint16_t to one DW (UNT32).
1777 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1020, usGE_Values, sizeof(uint16_t) * 8 * 255);
1778 }
1779 }
1780 else if (pVeboxGamutParams->bH2S)
1781 {
1782 VeboxInterface_H2SManualMode(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1783 }
1784 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020 ||
1785 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange) // BT2020 CSC case
1786 {
1787 if (pVeboxIecpParams->s1DLutParams.bActive)
1788 {
1789 //CCM setting if 1Dlut VEBOX HDR enabled
1790 p1DLutParams = &pVeboxIecpParams->s1DLutParams;
1791
1792 pIecpState->CcmState.DW1.C0 = p1DLutParams->pCCM[0];
1793 pIecpState->CcmState.DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[1], 27);
1794 pIecpState->CcmState.DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[2], 27);
1795 pIecpState->CcmState.DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[3], 27);
1796 pIecpState->CcmState.DW5.C4 = p1DLutParams->pCCM[4];
1797 pIecpState->CcmState.DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[5], 27);
1798 pIecpState->CcmState.DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[6], 27);
1799 pIecpState->CcmState.DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[7], 27);
1800 pIecpState->CcmState.DW8.C8 = p1DLutParams->pCCM[8];
1801 pIecpState->CcmState.DW9.OffsetInR = p1DLutParams->pCCM[9];
1802 pIecpState->CcmState.DW10.OffsetInG = p1DLutParams->pCCM[10];
1803 pIecpState->CcmState.DW11.OffsetInB = p1DLutParams->pCCM[11];
1804 pIecpState->CcmState.DW12.OffsetOutR = p1DLutParams->pCCM[12];
1805 pIecpState->CcmState.DW13.OffsetOutG = p1DLutParams->pCCM[13];
1806 pIecpState->CcmState.DW14.OffsetOutB = p1DLutParams->pCCM[14];
1807
1808 pGamutState->DW0.GlobalModeEnable = false;
1809 // Still need to set CSC params here
1810 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1811 goto finish;
1812 }
1813
1814 pGamutState->DW0.GlobalModeEnable = true;
1815 pGamutState->DW1.CmW = 1023; // Colorimetric accurate image
1816 if (pVeboxGamutParams->dstColorSpace == MHW_CSpace_BT601)
1817 {
1818 pGamutState->DW1.C0 = 116420;
1819 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-45094, 21);
1820 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-5785, 21);
1821 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-10586, 21);
1822 pGamutState->DW5.C4 = 77814;
1823 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-1705, 21);
1824 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1036, 21);
1825 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6284, 21);
1826 pGamutState->DW8.C8 = 72864;
1827 }
1828 else //BT709, sRGB has same chromaticity CIE 1931
1829 {
1830 pGamutState->DW1.C0 = 108190;
1831 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38288, 21);
1832 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4747, 21);
1833 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-7967, 21);
1834 pGamutState->DW5.C4 = 74174;
1835 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-557, 21);
1836 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1198, 21);
1837 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6587, 21);
1838 pGamutState->DW8.C8 = 73321;
1839 }
1840
1841 for (i = 0; i < 256; i++)
1842 {
1843 usGE_Values[i][0] = (uint16_t)m_BT2020InvPixelValue[i];
1844 usGE_Values[i][1] =
1845 usGE_Values[i][2] =
1846 usGE_Values[i][3] = (uint16_t)m_BT2020InvGammaLUT[i];
1847
1848 usGE_Values[i][4] = (uint16_t)m_BT2020FwdPixelValue[i];
1849 usGE_Values[i][5] =
1850 usGE_Values[i][6] =
1851 usGE_Values[i][7] = (uint16_t)m_BT2020FwdGammaLUT[i];
1852 }
1853 // Copy two UNT16 to one DW(UNT32).
1854 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1855 // Back end CSC setting, need to convert BT2020 YUV input to RGB before GE
1856 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1857 }
1858 else if (pVeboxIecpParams && pVeboxIecpParams->s1DLutParams.bActive)
1859 {
1860 uint16_t in_val = 0, vchan1_y = 0, vchan2_u = 0, vchan3_v = 0;
1861 uint32_t nIndex = 0;
1862 uint16_t* pForwardGamma = (uint16_t*)pVeboxIecpParams->s1DLutParams.p1DLUT;
1863 MHW_CHK_NULL(pForwardGamma);
1864
1865 // Gamut Expansion setting
1866 pGamutState->DW0.GlobalModeEnable = true;
1867 pGamutState->DW1.CmW = 1023;
1868 dInverseGamma = 1.0;
1869
1870 uint32_t cnt = MOS_MIN(pVeboxIecpParams->s1DLutParams.LUTSize, 256);
1871 for (uint32_t i = 0; i < cnt; i++)
1872 {
1873 usGE_Values[i][0] = 257 * i;
1874 usGE_Values[i][1] =
1875 usGE_Values[i][2] =
1876 usGE_Values[i][3] = 257 * i;
1877
1878 nIndex = 4 * i;
1879 in_val = pForwardGamma[nIndex];
1880 vchan1_y = pForwardGamma[nIndex + 1];
1881 vchan2_u = pForwardGamma[nIndex + 2];
1882 vchan3_v = pForwardGamma[nIndex + 3];
1883
1884 // ayuv: in_val, vchan1_y, vchan2_u, vchan3_v
1885 usGE_Values[i][4] = (i == 0) ? 0 : ((i == 255) ? 0xffff : in_val);
1886 usGE_Values[i][5] = vchan1_y;
1887 usGE_Values[i][6] = vchan2_u;
1888 usGE_Values[i][7] = vchan3_v;
1889 }
1890 pGamutState->DW1.C0 = 65536;
1891 pGamutState->DW0.C1 = 0;
1892 pGamutState->DW3.C2 = 0;
1893 pGamutState->DW2.C3 = 0;
1894 pGamutState->DW5.C4 = 65536;
1895 pGamutState->DW4.C5 = 0;
1896 pGamutState->DW7.C6 = 0;
1897 pGamutState->DW6.C7 = 0;
1898 pGamutState->DW8.C8 = 65536;
1899 pGamutState->DW9.OffsetInR = 0;
1900 pGamutState->DW10.OffsetInG = 0;
1901 pGamutState->DW11.OffsetInB = 0;
1902 pGamutState->DW12.OffsetOutR = 0;
1903 pGamutState->DW13.OffsetOutG = 0;
1904 pGamutState->DW14.OffsetOutB = 0;
1905 // Copy two uint16_t to one DW (UNT32).
1906 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1907 }
1908 else
1909 {
1910 MHW_ASSERTMESSAGE("Unknown branch!");
1911 }
1912
1913 finish:
1914 return eStatus;
1915 }
1916
AddVeboxHdrState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)1917 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxHdrState(
1918 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
1919 {
1920 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1921 mhw_vebox_g12_X::VEBOX_HDR_STATE_CMD *pVeboxHdrState = nullptr;
1922 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pIecpState = nullptr;
1923 PMHW_VEBOX_HEAP pVeboxHeap = nullptr;
1924 uint32_t uiOffset = 0;
1925
1926 MHW_CHK_NULL(pVeboxIecpParams);
1927 MHW_CHK_NULL(m_veboxHeap);
1928
1929 pVeboxHeap = m_veboxHeap;
1930 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
1931
1932 pVeboxHdrState =
1933 (mhw_vebox_g12_X::VEBOX_HDR_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
1934 pVeboxHeap->uiHdrStateOffset +
1935 uiOffset);
1936
1937 pIecpState =
1938 (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD*)(pVeboxHeap->pLockedDriverResourceMem +
1939 pVeboxHeap->uiIecpStateOffset +
1940 uiOffset);
1941
1942 MHW_CHK_NULL(pVeboxHdrState);
1943 MHW_CHK_NULL(pIecpState);
1944
1945 // Program 1DLUT in Inverse Gamma with 1024 entries / 16bit precision from API level
1946 if (pVeboxIecpParams->s1DLutParams.bActive && (pVeboxIecpParams->s1DLutParams.LUTSize == 1024))
1947 {
1948 // HW provides 4K 1DLUT inverse gamma
1949 mhw_vebox_g12_X::VEBOX_HDR_INV_GAMMA_CORRECTION_STATE_CMD* pInverseGamma = pVeboxHdrState->PRGBCorrectedValue;
1950 uint16_t* p1DLut = (uint16_t*)pVeboxIecpParams->s1DLutParams.p1DLUT;
1951 for (uint32_t i = 0; i < pVeboxIecpParams->s1DLutParams.LUTSize; i++)
1952 {
1953 pInverseGamma[i * 4].DW0.Value = 0;
1954 pInverseGamma[i * 4].DW1.InverseRChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 1] << 16); // 32 bit precision
1955 pInverseGamma[i * 4].DW2.InverseGChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 2] << 16); // 32 bit precision
1956 pInverseGamma[i * 4].DW3.InverseBChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 3] << 16); // 32 bit precision
1957
1958 pInverseGamma[i * 4 + 1] = pInverseGamma[i * 4];
1959 pInverseGamma[i * 4 + 2] = pInverseGamma[i * 4];
1960 pInverseGamma[i * 4 + 3] = pInverseGamma[i * 4];
1961 }
1962
1963 pVeboxHdrState->DW17440.ToneMappingEnable = false;
1964
1965 // Program Forward Gamma as identity matrix
1966 mhw_vebox_g12_X::VEBOX_HDR_FWD_GAMMA_CORRECTION_STATE_CMD* pForwardGamma = pVeboxHdrState->ForwardGammaLUTvalue;
1967 for (uint32_t i = 0; i < 256; i++)
1968 {
1969 pForwardGamma[i].DW0.PointValueForForwardGammaLut = (uint32_t)((uint64_t)pow(2, 32) - 1) / 255 * i; // 32 bit precision
1970 pForwardGamma[i].DW1.ForwardRChannelGammaCorrectionValue = 257 * i; // 16 bit precision
1971 pForwardGamma[i].DW2.ForwardGChannelGammaCorrectionValue = 257 * i; // 16 bit precision
1972 pForwardGamma[i].DW3.ForwardBChannelGammaCorrectionValue = 257 * i; // 16 bit precision
1973 }
1974 // Program CCM as identity matrix
1975 pIecpState->CcmState.DW0.ColorCorrectionMatrixEnable = true;
1976 pIecpState->CcmState.DW1.C0 = 65536;
1977 pIecpState->CcmState.DW0.C1 = 0;
1978 pIecpState->CcmState.DW3.C2 = 0;
1979 pIecpState->CcmState.DW2.C3 = 0;
1980 pIecpState->CcmState.DW5.C4 = 65536;
1981 pIecpState->CcmState.DW4.C5 = 0;
1982 pIecpState->CcmState.DW7.C6 = 0;
1983 pIecpState->CcmState.DW6.C7 = 0;
1984 pIecpState->CcmState.DW8.C8 = 65536;
1985 pIecpState->CcmState.DW9.OffsetInR = 0;
1986 pIecpState->CcmState.DW10.OffsetInG = 0;
1987 pIecpState->CcmState.DW11.OffsetInB = 0;
1988 pIecpState->CcmState.DW12.OffsetOutR = 0;
1989 pIecpState->CcmState.DW13.OffsetOutG = 0;
1990 pIecpState->CcmState.DW14.OffsetOutB = 0;
1991 }
1992 else if (pVeboxIecpParams->bCcmCscEnable)
1993 {
1994 uint32_t nLutInBitDepth = 12;
1995 uint32_t nLutOutBitDepth = 32;
1996 uint64_t maxValLutIn = (((uint64_t)1) << nLutInBitDepth) - 1;
1997 uint64_t maxValLutOut = (((uint64_t)1) << nLutOutBitDepth) - 1;
1998
1999 // HW provides 4K 1DLUT inverse gamma and fill in with identity
2000 mhw_vebox_g12_X::VEBOX_HDR_INV_GAMMA_CORRECTION_STATE_CMD* pInverseGamma = pVeboxHdrState->PRGBCorrectedValue;
2001 for (uint32_t i = 0; i < 4096; i++)
2002 {
2003 float x = (float)(i) / maxValLutIn;
2004 uint32_t nCorrectedValue = (i < 4095) ? (uint32_t)(x * maxValLutOut + 0.5) : (uint32_t)(maxValLutOut);
2005 pInverseGamma[i].DW0.Value = 0;
2006 pInverseGamma[i].DW1.InverseRChannelGammaCorrectionValue = nCorrectedValue;
2007 pInverseGamma[i].DW2.InverseGChannelGammaCorrectionValue = nCorrectedValue;
2008 pInverseGamma[i].DW3.InverseBChannelGammaCorrectionValue = nCorrectedValue;
2009 }
2010 pVeboxHdrState->DW17440.ToneMappingEnable = false;
2011 pIecpState->CcmState.DW0.ColorCorrectionMatrixEnable = false;
2012 if ((pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ||
2013 (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709_FullRange))
2014 {
2015 pIecpState->CcmState.DW1.C0 = 0x00009937;
2016 pIecpState->CcmState.DW0.C1 = 0x000115f6;
2017 pIecpState->CcmState.DW3.C2 = 0;
2018 pIecpState->CcmState.DW2.C3 = 0x00009937;
2019 pIecpState->CcmState.DW5.C4 = 0x07ffe3f1;
2020 pIecpState->CcmState.DW4.C5 = 0x07ffb9e0;
2021 pIecpState->CcmState.DW7.C6 = 0x00009937;
2022 pIecpState->CcmState.DW6.C7 = 0;
2023 pIecpState->CcmState.DW8.C8 = 0x0000ebe6;
2024 pIecpState->CcmState.DW9.OffsetInR = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ? 0xf8000000 : 0;
2025 pIecpState->CcmState.DW10.OffsetInG = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ? 0xc0000000 : 0;
2026 pIecpState->CcmState.DW11.OffsetInB = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709) ? 0xc0000000 : 0;
2027 pIecpState->CcmState.DW12.OffsetOutR = 0;
2028 pIecpState->CcmState.DW13.OffsetOutG = 0;
2029 pIecpState->CcmState.DW14.OffsetOutB = 0;
2030 }
2031 else if ((pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ||
2032 (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020_FullRange))
2033 {
2034 pIecpState->CcmState.DW1.C0 = 0x00009937;
2035 pIecpState->CcmState.DW0.C1 = 0x000119d4;
2036 pIecpState->CcmState.DW3.C2 = 0;
2037 pIecpState->CcmState.DW2.C3 = 0x00009937;
2038 pIecpState->CcmState.DW5.C4 = 0x07ffe75a;
2039 pIecpState->CcmState.DW4.C5 = 0x07ffaa6a;
2040 pIecpState->CcmState.DW7.C6 = 0x00009937;
2041 pIecpState->CcmState.DW6.C7 = 0;
2042 pIecpState->CcmState.DW8.C8 = 0x0000dce4;
2043 pIecpState->CcmState.DW9.OffsetInR = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ? 0xf8000000 : 0;
2044 pIecpState->CcmState.DW10.OffsetInG = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ? 0xc0000000 : 0;
2045 pIecpState->CcmState.DW11.OffsetInB = (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT2020) ? 0xc0000000 : 0;
2046 pIecpState->CcmState.DW12.OffsetOutR = 0;
2047 pIecpState->CcmState.DW13.OffsetOutG = 0;
2048 pIecpState->CcmState.DW14.OffsetOutB = 0;
2049 }
2050 else
2051 {
2052 MHW_ASSERTMESSAGE("Unsupported Input Color Space!");
2053 }
2054 }
2055 finish:
2056 return eStatus;
2057 }
2058
FindVeboxGpuNodeToUse(PMHW_VEBOX_GPUNODE_LIMIT pGpuNodeLimit)2059 MOS_STATUS MhwVeboxInterfaceG12::FindVeboxGpuNodeToUse(
2060 PMHW_VEBOX_GPUNODE_LIMIT pGpuNodeLimit)
2061 {
2062 MOS_GPU_NODE VeboxGpuNode = MOS_GPU_NODE_VE;
2063 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2064
2065 MHW_CHK_NULL(pGpuNodeLimit);
2066
2067 // KMD Virtual Engine, use virtual GPU NODE-- MOS_GPU_NODE_VE
2068 pGpuNodeLimit->dwGpuNodeToUse = VeboxGpuNode;
2069
2070 #if !EMUL
2071 #if (_DEBUG || _RELEASE_INTERNAL)
2072 if (m_osInterface != nullptr && m_osInterface->bEnableDbgOvrdInVE && !m_veboxScalabilitySupported)
2073 {
2074 eStatus = MOS_STATUS_INVALID_PARAMETER;
2075 MHW_ASSERTMESSAGE("not support DebugOverride on current OS or Platform.");
2076 goto finish;
2077 }
2078
2079 if ((m_osInterface != nullptr && m_osInterface->bEnableDbgOvrdInVE) ||
2080 Mos_Solo_IsInUse(m_osInterface))
2081 {
2082 MHW_CHK_STATUS(ValidateVeboxScalabilityConfig());
2083 }
2084 #endif
2085
2086 Mos_Solo_CheckNodeLimitation(m_osInterface, &pGpuNodeLimit->dwGpuNodeToUse);
2087 #endif
2088
2089 finish:
2090 return eStatus;
2091 }
2092
AddVeboxDndiState(PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams)2093 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxDndiState(
2094 PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams)
2095 {
2096 PMHW_VEBOX_HEAP pVeboxHeap = nullptr;
2097 uint32_t uiOffset = 0;
2098 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2099
2100 mhw_vebox_g12_X::VEBOX_DNDI_STATE_CMD *pVeboxDndiState, mVeboxDndiState;
2101
2102 MHW_CHK_NULL(pVeboxDndiParams);
2103 MHW_CHK_NULL(m_veboxHeap);
2104
2105 pVeboxHeap = m_veboxHeap;
2106 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2107 pVeboxDndiState =
2108 (mhw_vebox_g12_X::VEBOX_DNDI_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
2109 pVeboxHeap->uiDndiStateOffset +
2110 uiOffset);
2111 MHW_CHK_NULL(pVeboxDndiState);
2112 *pVeboxDndiState = mVeboxDndiState;
2113
2114 pVeboxDndiState->DW0.DenoiseMaximumHistory = pVeboxDndiParams->dwDenoiseMaximumHistory;
2115 pVeboxDndiState->DW0.DenoiseStadThreshold = pVeboxDndiParams->dwDenoiseSTADThreshold;
2116 pVeboxDndiState->DW1.DenoiseAsdThreshold = pVeboxDndiParams->dwDenoiseASDThreshold;
2117 pVeboxDndiState->DW1.DenoiseHistoryIncrease = pVeboxDndiParams->dwDenoiseHistoryDelta;
2118 pVeboxDndiState->DW1.DenoiseMovingPixelThreshold = pVeboxDndiParams->dwDenoiseMPThreshold;
2119 pVeboxDndiState->DW2.TemporalDifferenceThreshold = pVeboxDndiParams->dwTDThreshold;
2120 pVeboxDndiState->DW3.LowTemporalDifferenceThreshold = pVeboxDndiParams->dwLTDThreshold;
2121 pVeboxDndiState->DW3.ProgressiveDn = pVeboxDndiParams->bProgressiveDN;
2122 pVeboxDndiState->DW3.HotPixelCountLuma = pVeboxDndiParams->dwHotPixelCount;
2123 pVeboxDndiState->DW4.DenoiseThresholdForSumOfComplexityMeasureLuma = pVeboxDndiParams->dwDenoiseSCMThreshold;
2124 pVeboxDndiState->DW4.HotPixelThresholdLuma = pVeboxDndiParams->dwHotPixelThreshold;
2125 pVeboxDndiState->DW5.ChromaDenoiseStadThreshold = pVeboxDndiParams->dwChromaSTADThreshold;
2126 pVeboxDndiState->DW5.HotPixelCountChromaU = m_chromaParams.dwHotPixelCountChromaU;
2127 pVeboxDndiState->DW5.HotPixelThresholdChromaU = m_chromaParams.dwHotPixelThresholdChromaU;
2128 pVeboxDndiState->DW6.ChromaDenoiseEnable = pVeboxDndiParams->bChromaDNEnable;
2129 pVeboxDndiState->DW6.ChromaTemporalDifferenceThreshold = pVeboxDndiParams->dwChromaTDThreshold;
2130 pVeboxDndiState->DW7.ChromaLowTemporalDifferenceThreshold = pVeboxDndiParams->dwChromaLTDThreshold;
2131 pVeboxDndiState->DW7.HotPixelCountChromaV = m_chromaParams.dwHotPixelCountChromaV;
2132 pVeboxDndiState->DW7.HotPixelThresholdChromaV = m_chromaParams.dwHotPixelThresholdChromaV;
2133
2134 pVeboxDndiState->DW9.DnyWr040 = pVeboxDndiParams->dwPixRangeWeight[0];
2135 pVeboxDndiState->DW9.DnyWr140 = pVeboxDndiParams->dwPixRangeWeight[1];
2136 pVeboxDndiState->DW9.DnyWr240 = pVeboxDndiParams->dwPixRangeWeight[2];
2137 pVeboxDndiState->DW9.DnyWr340 = pVeboxDndiParams->dwPixRangeWeight[3];
2138 pVeboxDndiState->DW9.DnyWr440 = pVeboxDndiParams->dwPixRangeWeight[4];
2139 pVeboxDndiState->DW9.DnyWr540 = pVeboxDndiParams->dwPixRangeWeight[5];
2140
2141 pVeboxDndiState->DW11.DnyPrt5120 = pVeboxDndiParams->dwPixRangeThreshold[5];
2142 pVeboxDndiState->DW12.DnyPrt4120 = pVeboxDndiParams->dwPixRangeThreshold[4];
2143 pVeboxDndiState->DW12.DnyPrt3120 = pVeboxDndiParams->dwPixRangeThreshold[3];
2144 pVeboxDndiState->DW13.DnyPrt2120 = pVeboxDndiParams->dwPixRangeThreshold[2];
2145 pVeboxDndiState->DW13.DnyPrt1120 = pVeboxDndiParams->dwPixRangeThreshold[1];
2146 pVeboxDndiState->DW14.DnyPrt0120 = pVeboxDndiParams->dwPixRangeThreshold[0];
2147
2148 pVeboxDndiState->DW16.DnuWr040 = m_chromaParams.dwPixRangeWeightChromaU[0];
2149 pVeboxDndiState->DW16.DnuWr140 = m_chromaParams.dwPixRangeWeightChromaU[1];
2150 pVeboxDndiState->DW16.DnuWr240 = m_chromaParams.dwPixRangeWeightChromaU[2];
2151 pVeboxDndiState->DW16.DnuWr340 = m_chromaParams.dwPixRangeWeightChromaU[3];
2152 pVeboxDndiState->DW16.DnuWr440 = m_chromaParams.dwPixRangeWeightChromaU[4];
2153 pVeboxDndiState->DW16.DnuWr540 = m_chromaParams.dwPixRangeWeightChromaU[5];
2154
2155 pVeboxDndiState->DW18.DnuPrt5120 = m_chromaParams.dwPixRangeThresholdChromaU[5];
2156 pVeboxDndiState->DW19.DnuPrt4120 = m_chromaParams.dwPixRangeThresholdChromaU[4];
2157 pVeboxDndiState->DW19.DnuPrt3120 = m_chromaParams.dwPixRangeThresholdChromaU[3];
2158 pVeboxDndiState->DW20.DnuPrt2120 = m_chromaParams.dwPixRangeThresholdChromaU[2];
2159 pVeboxDndiState->DW20.DnuPrt1120 = m_chromaParams.dwPixRangeThresholdChromaU[1];
2160 pVeboxDndiState->DW21.DnuPrt0120 = m_chromaParams.dwPixRangeThresholdChromaU[0];
2161
2162 pVeboxDndiState->DW23.DnvWr040 = m_chromaParams.dwPixRangeWeightChromaV[0];
2163 pVeboxDndiState->DW23.DnvWr5140 = m_chromaParams.dwPixRangeWeightChromaV[1];
2164 pVeboxDndiState->DW23.DnvWr240 = m_chromaParams.dwPixRangeWeightChromaV[2];
2165 pVeboxDndiState->DW23.DnvWr340 = m_chromaParams.dwPixRangeWeightChromaV[3];
2166 pVeboxDndiState->DW23.DnvWr440 = m_chromaParams.dwPixRangeWeightChromaV[4];
2167 pVeboxDndiState->DW23.DnvWr540 = m_chromaParams.dwPixRangeWeightChromaV[5];
2168
2169 pVeboxDndiState->DW25.DnvPrt5120 = m_chromaParams.dwPixRangeThresholdChromaV[5];
2170 pVeboxDndiState->DW26.DnvPrt4120 = m_chromaParams.dwPixRangeThresholdChromaV[4];
2171 pVeboxDndiState->DW26.DnvPrt3120 = m_chromaParams.dwPixRangeThresholdChromaV[3];
2172 pVeboxDndiState->DW27.DnvPrt2120 = m_chromaParams.dwPixRangeThresholdChromaV[2];
2173 pVeboxDndiState->DW27.DnvPrt1120 = m_chromaParams.dwPixRangeThresholdChromaV[1];
2174 pVeboxDndiState->DW28.DnvPrt0120 = m_chromaParams.dwPixRangeThresholdChromaV[0];
2175
2176 pVeboxDndiState->DW38.DnDiTopFirst = pVeboxDndiParams->bDNDITopFirst;
2177
2178 pVeboxDndiState->DW39.ProgressiveCadenceReconstructionFor1StFieldOfCurrentFrame = pVeboxDndiParams->dwFMDFirstFieldCurrFrame;
2179 pVeboxDndiState->DW39.ProgressiveCadenceReconstructionFor2NdFieldOfPreviousFrame = pVeboxDndiParams->dwFMDSecondFieldPrevFrame;
2180
2181 // Improved Deinterlacing
2182 pVeboxDndiState->DW36.LumatdmWt = pVeboxDndiParams->dwLumaTDMWeight;
2183 pVeboxDndiState->DW36.ChromatdmWt = pVeboxDndiParams->dwChromaTDMWeight;
2184
2185 pVeboxDndiState->DW37.CoringThresholdForSvcm = pVeboxDndiParams->dwSVCMThreshold;
2186 pVeboxDndiState->DW37.DeltabitValueForSvcm = pVeboxDndiParams->dwSVCMDelta;
2187 pVeboxDndiState->DW37.CoringThresholdForShcm = pVeboxDndiParams->dwSHCMThreshold;
2188 pVeboxDndiState->DW37.DeltabitValueForShcm = pVeboxDndiParams->dwSHCMDelta;
2189
2190 pVeboxDndiState->DW39.ChromaSmallerWindowForTdm = pVeboxDndiParams->bTDMChromaSmallerWindow;
2191 pVeboxDndiState->DW39.LumaSmallerWindowForTdm = pVeboxDndiParams->bTDMLumaSmallerWindow;
2192 pVeboxDndiState->DW39.Fastercovergence = pVeboxDndiParams->bFasterConvergence;
2193
2194 pVeboxDndiState->DW40.SadWt0 = pVeboxDndiParams->dwSADWT0;
2195 pVeboxDndiState->DW40.SadWt1 = pVeboxDndiParams->dwSADWT1;
2196 pVeboxDndiState->DW40.SadWt2 = pVeboxDndiParams->dwSADWT2;
2197 pVeboxDndiState->DW40.SadWt3 = pVeboxDndiParams->dwSADWT3;
2198 pVeboxDndiState->DW41.SadWt4 = pVeboxDndiParams->dwSADWT4;
2199 pVeboxDndiState->DW41.SadWt6 = pVeboxDndiParams->dwSADWT6;
2200
2201 pVeboxDndiState->DW41.CoringThresholdForLumaSadCalculation = pVeboxDndiParams->dwLumaTDMCoringThreshold;
2202 pVeboxDndiState->DW41.CoringThresholdForChromaSadCalculation = pVeboxDndiParams->dwChromaTDMCoringThreshold;
2203
2204 pVeboxDndiState->DW42.ParDiffcheckslackthreshold = pVeboxDndiParams->dwDiffCheckSlackThreshold;
2205 pVeboxDndiState->DW42.ParTearinghighthreshold = pVeboxDndiParams->dwTearingHighThreshold;
2206 pVeboxDndiState->DW42.ParTearinglowthreshold = pVeboxDndiParams->dwTearingLowThreshold;
2207 pVeboxDndiState->DW42.ParDirectioncheckth = pVeboxDndiParams->dwDirectionCheckThreshold;
2208 pVeboxDndiState->DW42.ParSyntheticcontentcheck = pVeboxDndiParams->bSyntheticContentCheck;
2209 pVeboxDndiState->DW42.ParLocalcheck = pVeboxDndiParams->bLocalCheck;
2210 pVeboxDndiState->DW42.ParUsesyntheticcontentmedian = pVeboxDndiParams->bUseSyntheticContentMedian;
2211 pVeboxDndiState->DW42.BypassDeflicker = pVeboxDndiParams->bBypassDeflickerFilter;
2212
2213 pVeboxDndiState->DW43.Lpfwtlut0 = pVeboxDndiParams->dwLPFWtLUT0;
2214 pVeboxDndiState->DW43.Lpfwtlut1 = pVeboxDndiParams->dwLPFWtLUT1;
2215 pVeboxDndiState->DW43.Lpfwtlut2 = pVeboxDndiParams->dwLPFWtLUT2;
2216 pVeboxDndiState->DW43.Lpfwtlut3 = pVeboxDndiParams->dwLPFWtLUT3;
2217 pVeboxDndiState->DW44.Lpfwtlut4 = pVeboxDndiParams->dwLPFWtLUT4;
2218 pVeboxDndiState->DW44.Lpfwtlut5 = pVeboxDndiParams->dwLPFWtLUT5;
2219 pVeboxDndiState->DW44.Lpfwtlut6 = pVeboxDndiParams->dwLPFWtLUT6;
2220 pVeboxDndiState->DW44.Lpfwtlut7 = pVeboxDndiParams->dwLPFWtLUT7;
2221
2222 pVeboxDndiState->DW10.DnyThmin120 = 512;
2223 pVeboxDndiState->DW10.DnyThmax120 = 2048;
2224 pVeboxDndiState->DW11.DnyDynThmin120 = 256;
2225
2226 pVeboxDndiState->DW14.DnyWd2040 = 10;
2227 pVeboxDndiState->DW14.DnyWd2140 = 10;
2228 pVeboxDndiState->DW14.DnyWd2240 = 8;
2229 pVeboxDndiState->DW15.DnyWd0040 = 12;
2230 pVeboxDndiState->DW15.DnyWd0140 = 12;
2231 pVeboxDndiState->DW15.DnyWd0240 = 10;
2232 pVeboxDndiState->DW15.DnyWd1040 = 12;
2233 pVeboxDndiState->DW15.DnyWd1140 = 11;
2234 pVeboxDndiState->DW15.DnyWd1240 = 10;
2235
2236 pVeboxDndiState->DW17.DnuThmin120 = 512;
2237 pVeboxDndiState->DW17.DnuThmax120 = 2048;
2238 pVeboxDndiState->DW18.DnuDynThmin120 = 256;
2239
2240 pVeboxDndiState->DW21.DnuWd2040 = 10;
2241 pVeboxDndiState->DW21.DnuWd2140 = 10;
2242 pVeboxDndiState->DW21.DnuWd2240 = 8;
2243 pVeboxDndiState->DW22.DnuWd0040 = 12;
2244 pVeboxDndiState->DW22.DnuWd0140 = 12;
2245 pVeboxDndiState->DW22.DnuWd0240 = 10;
2246 pVeboxDndiState->DW22.DnuWd1040 = 12;
2247 pVeboxDndiState->DW22.DnuWd1140 = 11;
2248 pVeboxDndiState->DW22.DnuWd1240 = 10;
2249
2250 pVeboxDndiState->DW24.DnvThmin120 = 512;
2251 pVeboxDndiState->DW24.DnvThmax120 = 2048;
2252 pVeboxDndiState->DW25.DnvDynThmin120 = 256;
2253
2254 pVeboxDndiState->DW28.DnvWd2040 = 10;
2255 pVeboxDndiState->DW28.DnvWd2140 = 10;
2256 pVeboxDndiState->DW28.DnvWd2240 = 8;
2257 pVeboxDndiState->DW29.DnvWd0040 = 12;
2258 pVeboxDndiState->DW29.DnvWd0140 = 12;
2259 pVeboxDndiState->DW29.DnvWd0240 = 10;
2260 pVeboxDndiState->DW29.DnvWd1040 = 12;
2261 pVeboxDndiState->DW29.DnvWd1140 = 11;
2262 pVeboxDndiState->DW29.DnvWd1240 = 10;
2263
2264 pVeboxDndiState->DW31.SmallSobelCountThreshold = 6;
2265 pVeboxDndiState->DW32.LargeSobelCountThreshold = 6;
2266 pVeboxDndiState->DW32.MedianSobelCountThreshold = 40;
2267
2268 pVeboxDndiState->DW34.StmmC2 = 2;
2269 pVeboxDndiState->DW35.MaximumStmm = 150;
2270 pVeboxDndiState->DW35.MultiplierForVecm = 30;
2271 pVeboxDndiState->DW35.BlendingConstantAcrossTimeForSmallValuesOfStmm = 125;
2272 pVeboxDndiState->DW35.BlendingConstantAcrossTimeForLargeValuesOfStmm = 64;
2273
2274 pVeboxDndiState->DW36.FmdTemporalDifferenceThreshold = 175;
2275 pVeboxDndiState->DW36.StmmOutputShift = 5;
2276 pVeboxDndiState->DW36.StmmShiftUp = 1;
2277 pVeboxDndiState->DW36.MinimumStmm = 118;
2278
2279 pVeboxDndiState->DW38.McdiEnable = 1;
2280 pVeboxDndiState->DW38.FmdTearThreshold = 2;
2281 pVeboxDndiState->DW38.Fmd2VerticalDifferenceThreshold = 100;
2282 pVeboxDndiState->DW38.Fmd1VerticalDifferenceThreshold = 16;
2283
2284 pVeboxDndiState->DW45.SynthticFrame = pVeboxDndiParams->bSyntheticFrame;
2285
2286 // copy the DW0-DW33 SLIM_IPU_DN_PARAMS to VEBOX_DNDI_STATE, DW34-DW48 for DI according to DI DDI setting.
2287 if (pVeboxDndiParams->bEnableSlimIPUDenoise)
2288 {
2289 uint32_t slimIpuDnCmdSize = MHW_VEBOX_SLIM_IPU_DN_CMD_SIZE_INUSE * sizeof(pVeboxDndiState->DW0); //buffer size in use for SLIM IPU DN
2290
2291 if (nullptr == pVeboxDndiParams->pSystemMem || pVeboxDndiParams->MemSizeInBytes != sizeof(*pVeboxDndiState) || pVeboxDndiParams->MemSizeInBytes < slimIpuDnCmdSize)
2292 {
2293 MHW_ASSERTMESSAGE("SlimIPUDenoise size is invaild");
2294 return MOS_STATUS_INVALID_PARAMETER;
2295 }
2296
2297 MOS_SecureMemcpy(pVeboxDndiState, sizeof(*pVeboxDndiState), pVeboxDndiParams->pSystemMem, slimIpuDnCmdSize); // only copy dw0 - dw33 for DN
2298
2299 pVeboxDndiState->DW3.ProgressiveDn = pVeboxDndiParams->bProgressiveDN;
2300 }
2301
2302 finish:
2303 return eStatus;
2304 }
2305
AddVeboxIecpState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)2306 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxIecpState(
2307 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
2308 {
2309 bool bEnableFECSC = false;
2310 PMHW_FORWARD_GAMMA_SEG pFwdGammaSeg;
2311 uint8_t *p3DLUT;
2312 PMHW_VEBOX_HEAP pVeboxHeap;
2313 uint32_t uiOffset;
2314 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2315
2316 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState;
2317
2318 MHW_CHK_NULL(pVeboxIecpParams);
2319 MHW_CHK_NULL(m_veboxHeap);
2320
2321 pVeboxHeap = m_veboxHeap;
2322 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2323 pVeboxIecpState = (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
2324 pVeboxHeap->uiIecpStateOffset +
2325 uiOffset);
2326 MHW_CHK_NULL(pVeboxIecpState);
2327 IecpStateInitialization(pVeboxIecpState);
2328
2329 if (pVeboxIecpParams->ColorPipeParams.bActive)
2330 {
2331 // Enable STD/E (Skin Tone Detection/Enhancement)
2332 SetVeboxIecpStateSTE(
2333 &pVeboxIecpState->StdSteState,
2334 &pVeboxIecpParams->ColorPipeParams);
2335
2336 // Enable TCC (Total Color Control)
2337 if (pVeboxIecpParams->ColorPipeParams.bEnableTCC)
2338 {
2339 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateTCC(
2340 &pVeboxIecpState->TccState,
2341 &pVeboxIecpParams->ColorPipeParams);
2342 }
2343 }
2344
2345 // Enable ACE (Automatic Contrast Enhancement). Enable LACE if it's enabled.
2346 if (pVeboxIecpParams->bAce ||
2347 (pVeboxIecpParams->ColorPipeParams.bActive &&
2348 pVeboxIecpParams->ColorPipeParams.bEnableACE))
2349 {
2350 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateACELACE(
2351 &pVeboxIecpState->AceState,
2352 &pVeboxIecpState->AlphaAoiState,
2353 (pVeboxIecpParams->ColorPipeParams.bEnableLACE == true) ? true : false);
2354 }
2355
2356 if (pVeboxIecpParams->CapPipeParams.bActive)
2357 {
2358 // IECP needs to operate in YUV space
2359 if ((pVeboxIecpParams->srcFormat != Format_AYUV) &&
2360 (pVeboxIecpParams->dstFormat == Format_AYUV ||
2361 pVeboxIecpParams->dstFormat == Format_Y416 ||
2362 pVeboxIecpParams->ProcAmpParams.bActive ||
2363 pVeboxIecpParams->ColorPipeParams.bActive))
2364 {
2365 bEnableFECSC = true;
2366 }
2367 else if (pVeboxIecpParams->CapPipeParams.FECSCParams.bActive)
2368 {
2369 bEnableFECSC = true;
2370 }
2371 else
2372 {
2373 bEnableFECSC = false;
2374 }
2375
2376 // Enable Front End CSC so that input to IECP will be in YUV color space
2377 if (bEnableFECSC)
2378 {
2379 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateFecsc(&pVeboxIecpState->FrontEndCsc, pVeboxIecpParams);
2380 }
2381
2382 // Enable Color Correction Matrix
2383 if (pVeboxIecpParams->CapPipeParams.ColorCorrectionParams.bActive)
2384 {
2385 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateCcm(
2386 pVeboxIecpState,
2387 &pVeboxIecpParams->CapPipeParams,
2388 65536);
2389 }
2390 }
2391
2392 if (pVeboxIecpParams->bFeCSCEnable)
2393 {
2394 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateFecsc(&pVeboxIecpState->FrontEndCsc, pVeboxIecpParams);
2395 }
2396
2397 // Enable Back End CSC for capture pipeline or Vebox output pipe
2398 if (pVeboxIecpParams->CapPipeParams.bActive ||
2399 pVeboxIecpParams->bCSCEnable)
2400 {
2401 SetVeboxIecpStateBecsc(
2402 pVeboxIecpState,
2403 pVeboxIecpParams,
2404 bEnableFECSC);
2405 }
2406
2407 // Enable ProcAmp
2408 if (pVeboxIecpParams->ProcAmpParams.bActive &&
2409 pVeboxIecpParams->ProcAmpParams.bEnabled)
2410 {
2411 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateProcAmp(
2412 &pVeboxIecpState->ProcampState,
2413 &pVeboxIecpParams->ProcAmpParams);
2414 }
2415
2416 if (pVeboxIecpParams && pVeboxIecpParams->CapPipeParams.bActive)
2417 {
2418 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::AddVeboxCapPipeState(
2419 &pVeboxIecpParams->CapPipeParams);
2420 }
2421
2422 if (pVeboxIecpParams &&
2423 pVeboxIecpParams->CapPipeParams.bActive &&
2424 pVeboxIecpParams->CapPipeParams.FwdGammaParams.bActive)
2425 {
2426 pFwdGammaSeg =
2427 (PMHW_FORWARD_GAMMA_SEG)(pVeboxHeap->pLockedDriverResourceMem +
2428 pVeboxHeap->uiGammaCorrectionStateOffset +
2429 uiOffset);
2430 MHW_CHK_NULL(pFwdGammaSeg);
2431 MOS_SecureMemcpy(
2432 pFwdGammaSeg,
2433 sizeof(MHW_FORWARD_GAMMA_SEG) * MHW_FORWARD_GAMMA_SEGMENT_CONTROL_POINT,
2434 &pVeboxIecpParams->CapPipeParams.FwdGammaParams.Segment[0],
2435 sizeof(MHW_FORWARD_GAMMA_SEG) * MHW_FORWARD_GAMMA_SEGMENT_CONTROL_POINT);
2436 }
2437
2438 finish:
2439 return eStatus;
2440 }
2441
AddVeboxIecpAceState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)2442 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxIecpAceState(
2443 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
2444 {
2445 PMHW_ACE_PARAMS pAceParams;
2446 PMHW_LACE_PARAMS pLaceParams;
2447 PMHW_VEBOX_HEAP pVeboxHeap;
2448 int32_t uiOffset;
2449 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2450 const uint32_t uiFullRangeYOffsetInU16 = 0;
2451 const uint32_t uiLimitedRangeYOffsetInU16 = 4096;
2452 const uint32_t uiUOffsetInU16 = 32768;
2453 const uint32_t uiVOffsetInU16 = 32768;
2454
2455 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState;
2456
2457 MHW_CHK_NULL(pVeboxIecpParams);
2458 MHW_CHK_NULL(m_veboxHeap);
2459
2460 pVeboxHeap = m_veboxHeap;
2461 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2462
2463 pVeboxIecpState = (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
2464 pVeboxHeap->uiIecpStateOffset +
2465 uiOffset);
2466 MHW_CHK_NULL(pVeboxIecpState);
2467
2468 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxAceLaceState(pVeboxIecpParams, pVeboxIecpState);
2469
2470 if (pVeboxIecpParams->ColorPipeParams.bActive &&
2471 pVeboxIecpParams->ColorPipeParams.bEnableLACE)
2472 {
2473 pLaceParams = &pVeboxIecpParams->ColorPipeParams.LaceParams;
2474
2475 pVeboxIecpState->AceState.DW0.MinAceLuma = pLaceParams->wMinAceLuma;
2476 pVeboxIecpState->AceState.DW12.MaxAceLuma = pLaceParams->wMaxAceLuma;
2477
2478 pVeboxIecpState->AceState.DW13.LaceColorCorrectionEnable = m_laceColorCorrection.bColorCorrectionEnable;
2479 if (m_laceColorCorrection.bYUVFullRange)
2480 {
2481 pVeboxIecpState->AceState.DW13.LaceYOffset = uiFullRangeYOffsetInU16;
2482 pVeboxIecpState->AceState.DW14.LaceUOffset = uiUOffsetInU16;
2483 pVeboxIecpState->AceState.DW14.LaceVOffset = uiVOffsetInU16;
2484 }
2485 else
2486 {
2487 pVeboxIecpState->AceState.DW13.LaceYOffset = uiLimitedRangeYOffsetInU16;
2488 pVeboxIecpState->AceState.DW14.LaceUOffset = uiUOffsetInU16;
2489 pVeboxIecpState->AceState.DW14.LaceVOffset = uiVOffsetInU16;
2490 }
2491
2492 pVeboxIecpState->AceState.DW15.LaceGammaCurveBias0 = m_laceColorCorrection.colorWeightLut.iBias[0];
2493 pVeboxIecpState->AceState.DW15.LaceGammaCurvePoint0 = m_laceColorCorrection.colorWeightLut.iPoint[0];
2494 pVeboxIecpState->AceState.DW15.LaceGammaCurveSlope0 = m_laceColorCorrection.colorWeightLut.iSlope[0];
2495
2496 pVeboxIecpState->AceState.DW16.LaceGammaCurveBias1 = m_laceColorCorrection.colorWeightLut.iBias[1];
2497 pVeboxIecpState->AceState.DW16.LaceGammaCurvePoint1 = m_laceColorCorrection.colorWeightLut.iPoint[1];
2498 pVeboxIecpState->AceState.DW16.LaceGammaCurveSlope1 = m_laceColorCorrection.colorWeightLut.iSlope[1];
2499
2500 pVeboxIecpState->AceState.DW17.LaceGammaCurveBias2 = m_laceColorCorrection.colorWeightLut.iBias[2];
2501 pVeboxIecpState->AceState.DW17.LaceGammaCurvePoint2 = m_laceColorCorrection.colorWeightLut.iPoint[2];
2502 pVeboxIecpState->AceState.DW17.LaceGammaCurveSlope2 = m_laceColorCorrection.colorWeightLut.iSlope[2];
2503
2504 pVeboxIecpState->AceState.DW18.LaceGammaCurveBias3 = m_laceColorCorrection.colorWeightLut.iBias[3];
2505 pVeboxIecpState->AceState.DW18.LaceGammaCurvePoint3 = m_laceColorCorrection.colorWeightLut.iPoint[3];
2506 pVeboxIecpState->AceState.DW18.LaceGammaCurveSlope3 = m_laceColorCorrection.colorWeightLut.iSlope[3];
2507
2508 pVeboxIecpState->AceState.DW19.LaceGammaCurveBias4 = m_laceColorCorrection.colorWeightLut.iBias[4];
2509 pVeboxIecpState->AceState.DW19.LaceGammaCurvePoint4 = m_laceColorCorrection.colorWeightLut.iPoint[4];
2510 pVeboxIecpState->AceState.DW19.LaceGammaCurveSlope4 = m_laceColorCorrection.colorWeightLut.iSlope[4];
2511
2512 pVeboxIecpState->AceState.DW20.LaceGammaCurveBias5 = m_laceColorCorrection.colorWeightLut.iBias[5];
2513 pVeboxIecpState->AceState.DW20.LaceGammaCurvePoint5 = m_laceColorCorrection.colorWeightLut.iPoint[5];
2514 pVeboxIecpState->AceState.DW20.LaceGammaCurveSlope5 = m_laceColorCorrection.colorWeightLut.iSlope[5];
2515
2516 pVeboxIecpState->AceState.DW21.LaceGammaCurveBias6 = m_laceColorCorrection.colorWeightLut.iBias[6];
2517 pVeboxIecpState->AceState.DW21.LaceGammaCurvePoint6 = m_laceColorCorrection.colorWeightLut.iPoint[6];
2518 pVeboxIecpState->AceState.DW21.LaceGammaCurveSlope6 = m_laceColorCorrection.colorWeightLut.iSlope[6];
2519
2520 pVeboxIecpState->AceState.DW22.LaceGammaCurveBias7 = m_laceColorCorrection.colorWeightLut.iBias[7];
2521 pVeboxIecpState->AceState.DW22.LaceGammaCurvePoint7 = m_laceColorCorrection.colorWeightLut.iPoint[7];
2522 pVeboxIecpState->AceState.DW22.LaceGammaCurveSlope7 = m_laceColorCorrection.colorWeightLut.iSlope[7];
2523
2524 pVeboxIecpState->AceState.DW23.LaceGammaCurveBias8 = m_laceColorCorrection.colorWeightLut.iBias[8];
2525 pVeboxIecpState->AceState.DW23.LaceGammaCurvePoint8 = m_laceColorCorrection.colorWeightLut.iPoint[8];
2526 pVeboxIecpState->AceState.DW23.LaceGammaCurveSlope8 = m_laceColorCorrection.colorWeightLut.iSlope[8];
2527
2528 pVeboxIecpState->AceState.DW24.LaceGammaCurveBias9 = m_laceColorCorrection.colorWeightLut.iBias[9];
2529 pVeboxIecpState->AceState.DW24.LaceGammaCurvePoint9 = m_laceColorCorrection.colorWeightLut.iPoint[9];
2530 pVeboxIecpState->AceState.DW24.LaceGammaCurveSlope9 = m_laceColorCorrection.colorWeightLut.iSlope[9];
2531
2532 pVeboxIecpState->AceState.DW25.LaceGammaCurveBias10 = m_laceColorCorrection.colorWeightLut.iBias[10];
2533 pVeboxIecpState->AceState.DW25.LaceGammaCurvePoint10 = m_laceColorCorrection.colorWeightLut.iPoint[10];
2534 pVeboxIecpState->AceState.DW25.LaceGammaCurveSlope10 = m_laceColorCorrection.colorWeightLut.iSlope[10];
2535
2536 pVeboxIecpState->AceState.DW26.LaceGammaCurveBias11 = m_laceColorCorrection.colorWeightLut.iBias[11];
2537 pVeboxIecpState->AceState.DW26.LaceGammaCurvePoint11 = m_laceColorCorrection.colorWeightLut.iPoint[11];
2538 pVeboxIecpState->AceState.DW26.LaceGammaCurveSlope11 = m_laceColorCorrection.colorWeightLut.iSlope[11];
2539
2540 pVeboxIecpState->AceState.DW27.LaceGammaCurveBias12 = m_laceColorCorrection.colorWeightLut.iBias[12];
2541 pVeboxIecpState->AceState.DW27.LaceGammaCurvePoint12 = m_laceColorCorrection.colorWeightLut.iPoint[12];
2542 pVeboxIecpState->AceState.DW27.LaceGammaCurveSlope12 = m_laceColorCorrection.colorWeightLut.iSlope[12];
2543
2544 pVeboxIecpState->AceState.DW28.LaceGammaCurveBias13 = m_laceColorCorrection.colorWeightLut.iBias[13];
2545 pVeboxIecpState->AceState.DW28.LaceGammaCurvePoint13 = m_laceColorCorrection.colorWeightLut.iPoint[13];
2546 pVeboxIecpState->AceState.DW28.LaceGammaCurveSlope13 = m_laceColorCorrection.colorWeightLut.iSlope[13];
2547
2548 pVeboxIecpState->AceState.DW29.LaceGammaCurveBias14 = m_laceColorCorrection.colorWeightLut.iBias[14];
2549 pVeboxIecpState->AceState.DW29.LaceGammaCurvePoint14 = m_laceColorCorrection.colorWeightLut.iPoint[14];
2550 pVeboxIecpState->AceState.DW29.LaceGammaCurveSlope14 = m_laceColorCorrection.colorWeightLut.iSlope[14];
2551
2552 pVeboxIecpState->AceState.DW30.LaceGammaCurveBias15 = m_laceColorCorrection.colorWeightLut.iBias[15];
2553 pVeboxIecpState->AceState.DW30.LaceGammaCurvePoint15 = m_laceColorCorrection.colorWeightLut.iPoint[15];
2554 pVeboxIecpState->AceState.DW30.LaceGammaCurveSlope15 = m_laceColorCorrection.colorWeightLut.iSlope[15];
2555 }
2556
2557 finish:
2558 return eStatus;
2559 }
2560
2561 #if (_DEBUG || _RELEASE_INTERNAL)
ValidateVeboxScalabilityConfig()2562 MOS_STATUS MhwVeboxInterfaceG12::ValidateVeboxScalabilityConfig()
2563 {
2564 MEDIA_SYSTEM_INFO *pGtSystemInfo;
2565 MOS_FORCE_VEBOX eForceVebox;
2566 bool bScalableVEMode;
2567 bool bUseVE1, bUseVE2;
2568 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2569
2570 MHW_CHK_NULL(m_osInterface);
2571
2572 eForceVebox = m_osInterface->eForceVebox;
2573 bScalableVEMode = ((m_osInterface->bVeboxScalabilityMode) ? true : false);
2574 pGtSystemInfo = m_osInterface->pfnGetGtSystemInfo(m_osInterface);
2575 MHW_CHK_NULL(pGtSystemInfo);
2576
2577 if (eForceVebox != MOS_FORCE_VEBOX_NONE &&
2578 eForceVebox != MOS_FORCE_VEBOX_1 &&
2579 eForceVebox != MOS_FORCE_VEBOX_2 &&
2580 eForceVebox != MOS_FORCE_VEBOX_1_2)
2581 {
2582 eStatus = MOS_STATUS_INVALID_PARAMETER;
2583 MHW_ASSERTMESSAGE("eForceVebox value is invalid.");
2584 goto finish;
2585 }
2586
2587 if (!bScalableVEMode &&
2588 (eForceVebox == MOS_FORCE_VEBOX_1_2))
2589 {
2590 eStatus = MOS_STATUS_INVALID_PARAMETER;
2591 MHW_ASSERTMESSAGE("eForceVebox value is not consistent with scalability mode.");
2592 goto finish;
2593 }
2594
2595 if (bScalableVEMode && !m_veboxScalabilitySupported)
2596 {
2597 eStatus = MOS_STATUS_INVALID_PARAMETER;
2598 MHW_ASSERTMESSAGE("scalability mode is not allowed on current platform!");
2599 goto finish;
2600 }
2601
2602 bUseVE1 = bUseVE2 = false;
2603 if (eForceVebox == MOS_FORCE_VEBOX_NONE)
2604 {
2605 bUseVE1 = true;
2606 }
2607 else
2608 {
2609 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_1, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE1);
2610 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_2, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE2);
2611 }
2612
2613 if (!pGtSystemInfo->VEBoxInfo.IsValid ||
2614 (bUseVE1 && !pGtSystemInfo->VEBoxInfo.Instances.Bits.VEBox0Enabled) ||
2615 (bUseVE2 && !pGtSystemInfo->VEBoxInfo.Instances.Bits.VEBox1Enabled))
2616 {
2617 eStatus = MOS_STATUS_INVALID_PARAMETER;
2618 MHW_ASSERTMESSAGE("the forced VEBOX is not enabled in current platform.");
2619 goto finish;
2620 }
2621
2622 finish:
2623 return eStatus;
2624 }
2625 #endif
2626
SetVeboxInUse(bool inputVebox0,bool inputVebox1)2627 MOS_STATUS MhwVeboxInterfaceG12::SetVeboxInUse(
2628 bool inputVebox0,
2629 bool inputVebox1)
2630 {
2631 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2632
2633 m_vebox0InUse = inputVebox0;
2634 m_vebox1InUse = inputVebox1;
2635
2636 return eStatus;
2637 }
2638
IsScalabilitySupported()2639 bool MhwVeboxInterfaceG12::IsScalabilitySupported()
2640 {
2641 return m_veboxScalabilitySupported;
2642 }
2643
2644
VeboxInterface_BT2020YUVToRGB(PMHW_VEBOX_HEAP pVeboxHeapInput,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)2645 MOS_STATUS MhwVeboxInterfaceG12::VeboxInterface_BT2020YUVToRGB(
2646 PMHW_VEBOX_HEAP pVeboxHeapInput,
2647 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
2648 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
2649 {
2650 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pIecpState;
2651 PMHW_VEBOX_HEAP pVeboxHeap;
2652 uint32_t uiOffset;
2653 MOS_STATUS eStatus = MOS_STATUS_NULL_POINTER;
2654
2655 MHW_CHK_NULL(pVeboxHeapInput);
2656
2657 MOS_UNUSED(pVeboxIecpParams);
2658 MOS_UNUSED(pVeboxGamutParams);
2659
2660 pVeboxHeap = pVeboxHeapInput;
2661 MHW_CHK_NULL(pVeboxHeap);
2662
2663 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2664 pIecpState = (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem + pVeboxHeap->uiIecpStateOffset + uiOffset);
2665
2666 MHW_CHK_NULL(pIecpState);
2667
2668 pIecpState->CscState.DW0.TransformEnable = true;
2669
2670 if (IS_RGB_SWAP(pVeboxGamutParams->dstFormat))
2671 {
2672 pIecpState->CscState.DW0.YuvChannelSwap = true;
2673 }
2674
2675 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020) // Limited->Full
2676 {
2677 MHW_CHK_NULL(pVeboxIecpParams);
2678 if (pVeboxIecpParams->s1DLutParams.bActive)
2679 {
2680 // The updated value for TGL VEBOX HDR and float 16bit output path
2681 pIecpState->CscState.DW0.C0 = 76533;
2682 pIecpState->CscState.DW1.C1 = 0;
2683 pIecpState->CscState.DW2.C2 = 110337;
2684 pIecpState->CscState.DW3.C3 = 76533;
2685 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-12312, 19);
2686 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-42751, 19);
2687 pIecpState->CscState.DW6.C6 = 76533;
2688 pIecpState->CscState.DW7.C7 = 140776;
2689 pIecpState->CscState.DW8.C8 = 0;
2690
2691 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
2692 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2693 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2694
2695 pIecpState->CscState.DW9.OffsetOut1 = 0;
2696 pIecpState->CscState.DW10.OffsetOut2 = 0;
2697 pIecpState->CscState.DW11.OffsetOut3 = 0;
2698 }
2699 else
2700 {
2701 pIecpState->CscState.DW0.C0 = 76607;
2702 pIecpState->CscState.DW1.C1 = 0;
2703 pIecpState->CscState.DW2.C2 = 110443;
2704 pIecpState->CscState.DW3.C3 = 76607;
2705 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-12325, 19);
2706 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-42793, 19);
2707 pIecpState->CscState.DW6.C6 = 76607;
2708 pIecpState->CscState.DW7.C7 = 140911;
2709 pIecpState->CscState.DW8.C8 = 0;
2710
2711 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
2712 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2713 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2714
2715 pIecpState->CscState.DW9.OffsetOut1 = 0;
2716 pIecpState->CscState.DW10.OffsetOut2 = 0;
2717 pIecpState->CscState.DW11.OffsetOut3 = 0;
2718 }
2719 }
2720 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange) // Full->Full
2721 {
2722 pIecpState->CscState.DW0.C0 = 65536;
2723 pIecpState->CscState.DW1.C1 = 0;
2724 pIecpState->CscState.DW2.C2 = 96639;
2725 pIecpState->CscState.DW3.C3 = 65536;
2726 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-10784, 19);
2727 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-37444, 19);
2728 pIecpState->CscState.DW6.C6 = 65536;
2729 pIecpState->CscState.DW7.C7 = 123299;
2730 pIecpState->CscState.DW8.C8 = 0;
2731
2732 pIecpState->CscState.DW9.OffsetIn1 = 0;
2733 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2734 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2735
2736 pIecpState->CscState.DW9.OffsetOut1 = 0;
2737 pIecpState->CscState.DW10.OffsetOut2 = 0;
2738 pIecpState->CscState.DW11.OffsetOut3 = 0;
2739 }
2740 else
2741 {
2742 MHW_ASSERTMESSAGE("Unsupported BeCSC input color space");
2743 }
2744
2745 eStatus = MOS_STATUS_SUCCESS;
2746
2747 finish:
2748 return eStatus;
2749 }
2750
VeboxInterface_H2SManualMode(PMHW_VEBOX_HEAP pVeboxHeapInput,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)2751 MOS_STATUS MhwVeboxInterfaceG12::VeboxInterface_H2SManualMode(
2752 PMHW_VEBOX_HEAP pVeboxHeapInput,
2753 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
2754 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
2755 {
2756 PMHW_VEBOX_HEAP pVeboxHeap;
2757 uint32_t uiOffset;
2758
2759 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pIecpState;
2760 mhw_vebox_g12_X::VEBOX_GAMUT_CONTROL_STATE_CMD *pGamutState;
2761 mhw_vebox_g12_X::Gamut_Expansion_Gamma_Correction_CMD *pVeboxGEGammaCorrection, VeboxGeGammaCorrection;
2762 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2763
2764 // HDR H2S algorithm related
2765 int32_t iToneMappingX[5] = { 40, 200, 1000, 2000, 4000 };
2766 int32_t iToneMappingY[4] = { 2500, 5000, 10000, 10000 };
2767 float fPivotX[5] = { 0.0, 0.0, 0.0, 0.0, 0.0 };
2768 float fPivotY[4] = { 0.0, 0.0, 0.0, 0.0 };
2769 float fSlope[5] = { 0.0, 0.0, 0.0, 0.0, 0.0 };
2770 float fMaxCLL = 0.0;
2771 // OETF parameters, corresponding to input
2772 uint32_t uiOETF[HDR_OETF_1DLUT_POINT_NUMBER] = { 0 };
2773 uint16_t usGE_Values[256][8] = { 0 };
2774
2775 MHW_CHK_NULL(pVeboxGamutParams);
2776 MHW_CHK_NULL(pVeboxHeapInput);
2777
2778 pVeboxHeap = pVeboxHeapInput;
2779 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2780 pIecpState = (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD*)(pVeboxHeap->pLockedDriverResourceMem + pVeboxHeap->uiIecpStateOffset + uiOffset);
2781 pVeboxGEGammaCorrection = (mhw_vebox_g12_X::Gamut_Expansion_Gamma_Correction_CMD *)(pVeboxHeap->pLockedDriverResourceMem
2782 + pVeboxHeap->uiGamutStateOffset + uiOffset);
2783 fMaxCLL = (65535 * (float)pVeboxGamutParams->uiMaxCLL) / 10000;
2784
2785 MHW_CHK_NULL(pIecpState);
2786 MHW_CHK_NULL(pVeboxGEGammaCorrection);
2787
2788 // Must initialize VeboxIecpState even if it is not used because GCE
2789 // requires GlobalIECP enable bit to be turned on
2790 if (!pVeboxIecpParams)
2791 {
2792 IecpStateInitialization(pIecpState);
2793 }
2794 pGamutState = &pIecpState->GamutState;
2795
2796 for (int32_t i = 0; i < 4; i++)
2797 {
2798 fPivotX[i] = (iToneMappingY[i] < 10000) ? (65535 * (float)iToneMappingX[i]) / 10000 : MOS_MIN((65535 * (float)iToneMappingX[i]) / 10000, fMaxCLL);
2799 fPivotY[i] = (65535 * (float)iToneMappingY[i]) / 10000;
2800 }
2801 fPivotX[4] = MOS_MIN((65535 * (float)iToneMappingX[4]) / 10000, fMaxCLL);
2802
2803 // Slope
2804 fSlope[0] = fPivotX[0] > 0 ? (float)(fPivotY[0] / fPivotX[0]) : 0;
2805 fPivotY[0] = fSlope[0] * fPivotX[0];
2806 for (int32_t i = 1; i < 4; i++)
2807 {
2808 fSlope[i] = (fPivotX[i] - fPivotX[i - 1]) > 0 ? (float)(fPivotY[i] - fPivotY[i - 1]) / (fPivotX[i] - fPivotX[i - 1]) : 0;
2809 fPivotY[i] = fSlope[i] * (fPivotX[i] - fPivotX[i - 1]) + fPivotY[i - 1];
2810 }
2811 fSlope[4] = (fPivotX[4] - fPivotX[3]) > 0 ? (float)(65535 - fPivotY[3]) / (fPivotX[4] - fPivotX[3]) : 0;
2812
2813 // Linear Operation
2814 for (int32_t n = 1; n < HDR_OETF_1DLUT_POINT_NUMBER; n++)
2815 {
2816 if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] < fSlope[0] * fPivotX[0])
2817 {
2818 uiOETF[n] = (uint32_t)((float)(g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n]) / fSlope[0]);
2819 }
2820 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] < fSlope[1] * (fPivotX[1] - fPivotX[0]) + fPivotY[0])
2821 {
2822 uiOETF[n] = (uint32_t)(((float)(g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n]) - fPivotY[0]) / fSlope[1] + fPivotX[0]);
2823 }
2824 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] < fSlope[2] * (fPivotX[2] - fPivotX[1]) + fPivotY[1])
2825 {
2826 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] - fPivotY[1]) / fSlope[2] + fPivotX[1]);
2827 }
2828 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] < fSlope[3] * (fPivotX[3] - fPivotX[2]) + fPivotY[2])
2829 {
2830 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] - fPivotY[2]) / fSlope[3] + fPivotX[2]);
2831 }
2832 else
2833 {
2834 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] - fPivotY[3]) / fSlope[4] + fPivotX[3]);
2835 }
2836 }
2837 uiOETF[0] = 0;
2838 uiOETF[255] = 65535;
2839
2840 // Back end CSC setting, need to convert BT2020 YUV input to RGB before GE
2841 MHW_CHK_STATUS(VeboxInterface_BT2020YUVToRGB(pVeboxHeap, pVeboxIecpParams, pVeboxGamutParams));
2842
2843 // Global setting
2844 pGamutState->DW0.GlobalModeEnable = true;
2845 pGamutState->DW1.CmW = 1023; // Colorimetric accurate image
2846
2847 // CCM
2848 pGamutState->DW1.C0 = 108822;
2849 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38511, 21);
2850 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4774, 21);
2851 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-8163, 21);
2852 pGamutState->DW5.C4 = 74246;
2853 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-547, 21);
2854 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1190, 21);
2855 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6592, 21);
2856 pGamutState->DW8.C8 = 73317;
2857
2858 // Gamma Expansion
2859 *pVeboxGEGammaCorrection = VeboxGeGammaCorrection;
2860 for (int32_t i = 0; i < 255; i++)
2861 {
2862 usGE_Values[i][0] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Input_g12[i];
2863 usGE_Values[i][1] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output_g12[i];
2864 usGE_Values[i][2] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output_g12[i];
2865 usGE_Values[i][3] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output_g12[i];
2866
2867 usGE_Values[i][4] = (uint16_t)uiOETF[i];
2868 usGE_Values[i][5] = g_Hdr_ColorCorrect_OETF_Rec709_Output_g12[i];
2869 usGE_Values[i][6] = g_Hdr_ColorCorrect_OETF_Rec709_Output_g12[i];
2870 usGE_Values[i][7] = g_Hdr_ColorCorrect_OETF_Rec709_Output_g12[i];
2871 }
2872 // Keep the last 4 DWs' value as defult 65535.See mhw_vebox_g10_X::Gamut_Expansion_Gamma_Correction_CMD();
2873 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t)* 1020, usGE_Values, sizeof(uint16_t)* 2040);
2874
2875 finish:
2876 return eStatus;
2877 }
2878
IecpStateInitialization(mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD * pVeboxIecpState)2879 void MhwVeboxInterfaceG12::IecpStateInitialization(mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState)
2880 {
2881 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpState);
2882
2883 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD IecpState;
2884 *pVeboxIecpState = IecpState;
2885
2886 // Re-set the values
2887 pVeboxIecpState->StdSteState.DW5.InvMarginVyl = 3300;
2888 pVeboxIecpState->StdSteState.DW5.InvSkinTypesMargin = 1638;
2889 pVeboxIecpState->StdSteState.DW12.B3U = 140;
2890 pVeboxIecpState->StdSteState.DW27.Hues0Dark = 256;
2891 pVeboxIecpState->StdSteState.DW27.Hues1Dark = 0;
2892
2893 pVeboxIecpState->AceState.DW0.LaceHistogramSize = 1;
2894
2895 pVeboxIecpState->TccState.DW0.Satfactor1 = 160;
2896 pVeboxIecpState->TccState.DW0.Satfactor2 = 160;
2897 pVeboxIecpState->TccState.DW0.Satfactor3 = 160;
2898 pVeboxIecpState->TccState.DW1.Satfactor4 = 160;
2899 pVeboxIecpState->TccState.DW1.Satfactor5 = 160;
2900 pVeboxIecpState->TccState.DW1.Satfactor6 = 160;
2901
2902 pVeboxIecpState->GamutState.DW2.CmS = 640;
2903 pVeboxIecpState->GamutState.DW3.AG = 26;
2904 pVeboxIecpState->GamutState.DW4.AB = 26;
2905 pVeboxIecpState->GamutState.DW5.RS = 768;
2906 pVeboxIecpState->GamutState.DW6.CmI = 192;
2907 pVeboxIecpState->GamutState.DW7.RI = 128;
2908
2909 return;
2910 }
2911
AdjustBoundary(PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,uint32_t * pdwSurfaceWidth,uint32_t * pdwSurfaceHeight,bool bDIEnable)2912 MOS_STATUS MhwVeboxInterfaceG12::AdjustBoundary(
2913 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,
2914 uint32_t *pdwSurfaceWidth,
2915 uint32_t *pdwSurfaceHeight,
2916 bool bDIEnable)
2917 {
2918 uint16_t wWidthAlignUnit;
2919 uint16_t wHeightAlignUnit;
2920 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2921
2922 MHW_CHK_NULL(pSurfaceParam);
2923 MHW_CHK_NULL(pdwSurfaceWidth);
2924 MHW_CHK_NULL(pdwSurfaceHeight);
2925
2926 // initialize
2927 wHeightAlignUnit = 1;
2928 wWidthAlignUnit = 1;
2929
2930 switch (pSurfaceParam->Format)
2931 {
2932 case Format_NV12:
2933 wHeightAlignUnit = bDIEnable ? 4 : 2;
2934 wWidthAlignUnit = 2;
2935 break;
2936
2937 case Format_YUYV:
2938 case Format_YUY2:
2939 case Format_UYVY:
2940 case Format_YVYU:
2941 case Format_VYUY:
2942 case Format_Y210:
2943 case Format_Y216:
2944 wHeightAlignUnit = bDIEnable ? 2 : 1;
2945 wWidthAlignUnit = 2;
2946 break;
2947
2948 case Format_AYUV:
2949 case Format_Y416:
2950 wHeightAlignUnit = 1;
2951 wWidthAlignUnit = 2;
2952 break;
2953
2954 // For other formats, we will not do any special alignment
2955 case Format_A8R8G8B8:
2956 case Format_X8R8G8B8:
2957 case Format_A8B8G8R8:
2958 case Format_X8B8G8R8:
2959 case Format_L8:
2960 default:
2961 break;
2962 }
2963
2964 //When Crop being used in vebox, source surface height/width is updated in VeboxAdjustBoundary(), and the rcMaxSrc is used for crop rectangle.
2965 //But in dynamic Crop case, if the rcMaxSrc is larger than the rcSrc, the input pdwSurfaceHeight/pdwSurfaceWidth will be the input surface size.
2966 //And if the target surface size is smaller than input surface, it may lead to pagefault issue . So in Vebox Crop case, we set the pdwSurfaceHeight/pdwSurfaceWidth
2967 //with rcSrc to ensure Vebox input size is same with target Dstrec.
2968 if (pSurfaceParam->bVEBOXCroppingUsed)
2969 {
2970 *pdwSurfaceHeight = MOS_ALIGN_CEIL(
2971 MOS_MIN(pSurfaceParam->dwHeight, MOS_MAX((uint32_t)pSurfaceParam->rcSrc.bottom, MHW_VEBOX_MIN_HEIGHT)),
2972 wHeightAlignUnit);
2973 *pdwSurfaceWidth = MOS_ALIGN_CEIL(
2974 MOS_MIN(pSurfaceParam->dwWidth, MOS_MAX((uint32_t)pSurfaceParam->rcSrc.right, MHW_VEBOX_MIN_WIDTH)),
2975 wWidthAlignUnit);
2976 MHW_NORMALMESSAGE("bVEBOXCroppingUsed = true, pSurfaceParam->rcSrc.bottom: %d, pSurfaceParam->rcSrc.right: %d; pdwSurfaceHeight: %d, pdwSurfaceWidth: %d;",
2977 (uint32_t)pSurfaceParam->rcSrc.bottom,
2978 (uint32_t)pSurfaceParam->rcSrc.right,
2979 *pdwSurfaceHeight,
2980 *pdwSurfaceWidth);
2981 MT_LOG5(MT_VP_MHW_VE_ADJUST_SURFPARAM, MT_NORMAL, MT_VP_RENDER_VE_CROPPING, 1, MT_RECT_BOTTOM, pSurfaceParam->rcSrc.bottom, MT_RECT_RIGHT, pSurfaceParam->rcSrc.right,
2982 MT_SURF_HEIGHT, *pdwSurfaceHeight, MT_SURF_WIDTH, *pdwSurfaceWidth);
2983 }
2984 else
2985 {
2986 // Align width and height with max src renctange with consideration of
2987 // these conditions:
2988 // The minimum of width/height should equal to or larger than
2989 // MHW_VEBOX_MIN_WIDTH/HEIGHT. The maximum of width/heigh should equal
2990 // to or smaller than surface width/height
2991 *pdwSurfaceHeight = MOS_ALIGN_CEIL(
2992 MOS_MIN(pSurfaceParam->dwHeight, MOS_MAX((uint32_t)pSurfaceParam->rcMaxSrc.bottom, MHW_VEBOX_MIN_HEIGHT)),
2993 wHeightAlignUnit);
2994 *pdwSurfaceWidth = MOS_ALIGN_CEIL(
2995 MOS_MIN(pSurfaceParam->dwWidth, MOS_MAX((uint32_t)pSurfaceParam->rcMaxSrc.right, MHW_VEBOX_MIN_WIDTH)),
2996 wWidthAlignUnit);
2997 MHW_NORMALMESSAGE("bVEBOXCroppingUsed = false, pSurfaceParam->rcMaxSrc.bottom: %d, pSurfaceParam->rcMaxSrc.right: %d; pdwSurfaceHeight: %d, pdwSurfaceWidth: %d;",
2998 (uint32_t)pSurfaceParam->rcMaxSrc.bottom,
2999 (uint32_t)pSurfaceParam->rcMaxSrc.right,
3000 *pdwSurfaceHeight,
3001 *pdwSurfaceWidth);
3002 }
3003
3004 finish:
3005 return eStatus;
3006 }
3007
AddVeboxSurfaceControlBits(PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams,uint32_t * pSurfCtrlBits)3008 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxSurfaceControlBits(
3009 PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams,
3010 uint32_t *pSurfCtrlBits)
3011 {
3012 PLATFORM Platform = {};
3013 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3014
3015 mhw_vebox_g12_X::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD *pVeboxSurfCtrlBits;
3016
3017 MHW_CHK_NULL(pVeboxSurfCntlParams);
3018 MHW_CHK_NULL(pSurfCtrlBits);
3019 MHW_CHK_NULL(m_osInterface);
3020
3021 m_osInterface->pfnGetPlatform(m_osInterface, &Platform);
3022
3023 pVeboxSurfCtrlBits = (mhw_vebox_g12_X::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD *)pSurfCtrlBits;
3024
3025 if (pVeboxSurfCntlParams->CompressionMode != MOS_MMC_DISABLED)
3026 {
3027 MHW_CHK_NULL(pVeboxSurfCtrlBits);
3028 pVeboxSurfCtrlBits->DW0.MemoryCompressionEnable = 1;
3029
3030 if (pVeboxSurfCntlParams->CompressionMode == MOS_MMC_RC)
3031 {
3032 pVeboxSurfCtrlBits->DW0.CompressionType = 1;
3033 }
3034 }
3035
3036 finish:
3037 return eStatus;
3038 }
3039
3040
AddVeboxTilingConvert(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VEBOX_SURFACE_PARAMS inSurParams,PMHW_VEBOX_SURFACE_PARAMS outSurParams)3041 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxTilingConvert(
3042 PMOS_COMMAND_BUFFER cmdBuffer,
3043 PMHW_VEBOX_SURFACE_PARAMS inSurParams,
3044 PMHW_VEBOX_SURFACE_PARAMS outSurParams)
3045 {
3046 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3047 PMOS_RESOURCE surface = nullptr;
3048 PMOS_RESOURCE inputSurface;
3049 PMOS_RESOURCE outputSurface;
3050 mhw_vebox_g12_X::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD veboxInputSurfCtrlBits, veboxOutputSurfCtrlBits;
3051 mhw_vebox_g12_X::VEBOX_TILING_CONVERT_CMD cmd;
3052 MHW_RESOURCE_PARAMS ResourceParams = { 0 };
3053
3054 MHW_CHK_NULL(cmdBuffer);
3055 MHW_CHK_NULL(m_osInterface);
3056 MHW_CHK_NULL(inSurParams);
3057 MHW_CHK_NULL(outSurParams);
3058
3059 inputSurface = inSurParams->pOsResource;
3060 outputSurface = outSurParams->pOsResource;
3061
3062 MHW_CHK_NULL(inputSurface);
3063 MHW_CHK_NULL(outputSurface);
3064
3065 // Set up VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS
3066 MOS_ZeroMemory(&veboxInputSurfCtrlBits, sizeof(veboxInputSurfCtrlBits));
3067 MOS_ZeroMemory(&veboxOutputSurfCtrlBits, sizeof(veboxOutputSurfCtrlBits));
3068
3069 veboxInputSurfCtrlBits.DW0.IndexToMemoryObjectControlStateMocsTables =
3070 veboxOutputSurfCtrlBits.DW0.IndexToMemoryObjectControlStateMocsTables =
3071 (m_osInterface->pfnCachePolicyGetMemoryObject(
3072 MOS_MP_RESOURCE_USAGE_DEFAULT,
3073 m_osInterface->pfnGetGmmClientContext(m_osInterface))).Gen12.Index;
3074
3075 // Set Input surface compression status
3076 if (inSurParams->CompressionMode != MOS_MMC_DISABLED)
3077 {
3078 veboxInputSurfCtrlBits.DW0.MemoryCompressionEnable = true;
3079
3080 if (inSurParams->CompressionMode == MOS_MMC_RC)
3081 {
3082 veboxInputSurfCtrlBits.DW0.CompressionType = 1;
3083 }
3084 else
3085 {
3086 veboxInputSurfCtrlBits.DW0.CompressionType = 0;
3087 }
3088 }
3089
3090 switch (inputSurface->TileType)
3091 {
3092 case MOS_TILE_YF:
3093 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYF;
3094 break;
3095 case MOS_TILE_YS:
3096 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYS;
3097 break;
3098 default:
3099 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_NONE;
3100 break;
3101 }
3102
3103 // Set Output surface compression status
3104 // Double Buffer copy
3105 surface = outputSurface;
3106
3107 if (outSurParams->CompressionMode != MOS_MMC_DISABLED)
3108 {
3109 veboxOutputSurfCtrlBits.DW0.MemoryCompressionEnable = true;
3110
3111 if (outSurParams->CompressionMode == MOS_MMC_RC)
3112 {
3113 veboxOutputSurfCtrlBits.DW0.CompressionType = 1;
3114 }
3115 else
3116 {
3117 veboxOutputSurfCtrlBits.DW0.CompressionType = 0;
3118 }
3119 }
3120
3121 if (surface)
3122 {
3123 switch (surface->TileType)
3124 {
3125 case MOS_TILE_YF:
3126 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYF;
3127 break;
3128 case MOS_TILE_YS:
3129 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYS;
3130 break;
3131 default:
3132 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_NONE;
3133 break;
3134 }
3135 }
3136
3137 MOS_ZeroMemory(&ResourceParams, sizeof(MHW_RESOURCE_PARAMS));
3138 InitMocsParams(ResourceParams, &cmd.DW1_2.Value[0], 1, 6);
3139 ResourceParams.presResource = inputSurface;
3140 ResourceParams.HwCommandType = MOS_VEBOX_TILING_CONVERT;
3141
3142 // set up DW[2:1], input graphics address
3143 ResourceParams.dwLocationInCmd = 1;
3144 ResourceParams.pdwCmd = &(cmd.DW1_2.Value[0]);
3145 ResourceParams.bIsWritable = false;
3146 ResourceParams.dwOffset = inSurParams->dwOffset + veboxInputSurfCtrlBits.DW0.Value;
3147 MHW_CHK_STATUS(pfnAddResourceToCmd(m_osInterface, cmdBuffer, &ResourceParams));
3148
3149 MOS_ZeroMemory(&ResourceParams, sizeof(MHW_RESOURCE_PARAMS));
3150 InitMocsParams(ResourceParams, &cmd.DW3_4.Value[0], 1, 6);
3151
3152 ResourceParams.presResource = outputSurface;
3153
3154 ResourceParams.HwCommandType = MOS_VEBOX_TILING_CONVERT;
3155
3156 // set up DW[4:3], output graphics address
3157 ResourceParams.dwLocationInCmd = 3;
3158 ResourceParams.pdwCmd = &(cmd.DW3_4.Value[0]);
3159 ResourceParams.bIsWritable = true;
3160 ResourceParams.dwOffset = outSurParams->dwOffset + veboxOutputSurfCtrlBits.DW0.Value;
3161 MHW_CHK_STATUS(pfnAddResourceToCmd(m_osInterface, cmdBuffer, &ResourceParams));
3162
3163 m_osInterface->pfnAddCommand(cmdBuffer, &cmd, cmd.byteSize);
3164
3165 finish:
3166 return eStatus;
3167 }
3168
3169
SetVeboxChromaParams(MHW_VEBOX_CHROMA_PARAMS * chromaParams)3170 MOS_STATUS MhwVeboxInterfaceG12::SetVeboxChromaParams(
3171 MHW_VEBOX_CHROMA_PARAMS *chromaParams)
3172 {
3173 MHW_CHK_NULL_RETURN(chromaParams);
3174 MOS_SecureMemcpy(&m_chromaParams, sizeof(MHW_VEBOX_CHROMA_PARAMS), chromaParams, sizeof(MHW_VEBOX_CHROMA_PARAMS));
3175
3176 return MOS_STATUS_SUCCESS;
3177 }
3178
SetVeboxLaceColorParams(MHW_LACE_COLOR_CORRECTION * pLaceColorParams)3179 MOS_STATUS MhwVeboxInterfaceG12::SetVeboxLaceColorParams(
3180 MHW_LACE_COLOR_CORRECTION *pLaceColorParams)
3181 {
3182 MHW_CHK_NULL_RETURN(pLaceColorParams);
3183 MOS_SecureMemcpy(&m_laceColorCorrection, sizeof(MHW_LACE_COLOR_CORRECTION), pLaceColorParams, sizeof(MHW_LACE_COLOR_CORRECTION));
3184
3185 return MOS_STATUS_SUCCESS;
3186 }
3187
3188 //!
3189 //! \brief Create Gpu Context for Vebox
3190 //! \details Create Gpu Context for Vebox
3191 //! \param [in] pOsInterface
3192 //! OS interface
3193 //! \param [in] VeboxGpuContext
3194 //! Vebox Gpu Context
3195 //! \param [in] VeboxGpuNode
3196 //! Vebox Gpu Node
3197 //! \return MOS_STATUS
3198 //! MOS_STATUS_SUCCESS if success, else fail reason
3199 //!
CreateGpuContext(PMOS_INTERFACE pOsInterface,MOS_GPU_CONTEXT VeboxGpuContext,MOS_GPU_NODE VeboxGpuNode)3200 MOS_STATUS MhwVeboxInterfaceG12::CreateGpuContext(
3201 PMOS_INTERFACE pOsInterface,
3202 MOS_GPU_CONTEXT VeboxGpuContext,
3203 MOS_GPU_NODE VeboxGpuNode)
3204 {
3205 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3206
3207 MHW_CHK_NULL(pOsInterface);
3208
3209 Mos_SetVirtualEngineSupported(pOsInterface, true);
3210 pOsInterface->pfnVirtualEngineSupported(pOsInterface, true, true);
3211
3212 if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(pOsInterface))
3213 {
3214 MOS_GPUCTX_CREATOPTIONS createOption;
3215
3216 // Create VEBOX/VEBOX2 Context
3217 MHW_CHK_STATUS(pOsInterface->pfnCreateGpuContext(
3218 pOsInterface,
3219 VeboxGpuContext,
3220 VeboxGpuNode,
3221 &createOption));
3222 }
3223 else
3224 {
3225 MOS_GPUCTX_CREATOPTIONS_ENHANCED createOptionenhanced;
3226
3227 createOptionenhanced.LRCACount = 1;
3228 createOptionenhanced.UsingSFC = true;
3229
3230 // Create VEBOX/VEBOX2 Context
3231 MHW_CHK_STATUS(pOsInterface->pfnCreateGpuContext(
3232 pOsInterface,
3233 VeboxGpuContext,
3234 VeboxGpuNode,
3235 &createOptionenhanced));
3236 }
3237
3238 finish:
3239 return eStatus;
3240 }
3241