xref: /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/Xe_M/Xe_XPM/hw/vdbox/mhw_vdbox_xe_xpm.h (revision ba62d9d3abf0e404f2022b4cd7a85e107f48596f)
1 /*===================== begin_copyright_notice ==================================
2 
3 # Copyright (c) 2020-2021, Intel Corporation
4 
5 # Permission is hereby granted, free of charge, to any person obtaining a
6 # copy of this software and associated documentation files (the "Software"),
7 # to deal in the Software without restriction, including without limitation
8 # the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 # and/or sell copies of the Software, and to permit persons to whom the
10 # Software is furnished to do so, subject to the following conditions:
11 
12 # The above copyright notice and this permission notice shall be included
13 # in all copies or substantial portions of the Software.
14 
15 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
16 # OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 # OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 # OTHER DEALINGS IN THE SOFTWARE.
22 
23 ======================= end_copyright_notice ==================================*/
24 //!
25 //! \file     mhw_vdbox_xe_xpm.h
26 //! \brief    Defines structures used for constructing VDBox commands on XeHP
27 //!
28 
29 #ifndef _MHW_VDBOX_XE_XPM_H_
30 #define _MHW_VDBOX_XE_XPM_H_
31 
32 #include "mhw_vdbox_g12_X.h"
33 
34 static constexpr uint32_t RD_MODE_INTRA_MPM    = 0;
35 static constexpr uint32_t RD_MODE_INTRA_16X16  = 1;
36 static constexpr uint32_t RD_MODE_INTRA_8X8    = 2;
37 static constexpr uint32_t RD_MODE_INTRA_4X4    = 3;
38 static constexpr uint32_t RD_MODE_INTER_16X8   = 4;
39 static constexpr uint32_t RD_MODE_INTER_8X8    = 5;
40 static constexpr uint32_t RD_MODE_INTER_8X4    = 6;
41 static constexpr uint32_t RD_MODE_INTER_16X16  = 7;
42 static constexpr uint32_t RD_MODE_INTER_BWD    = 8;
43 static constexpr uint32_t RD_MODE_REF_ID       = 9;
44 static constexpr uint32_t RD_MODE_INTRA_CHROMA = 10;
45 static constexpr uint32_t RD_MODE_SKIP_16X16   = 11;
46 static constexpr uint32_t RD_MODE_DIRECT_16X16 = 12;
47 static constexpr uint32_t NUM_RD_MODE_COST     = 13;
48 
49 static constexpr uint32_t LUTMODE_INTRA_NONPRED = 0;
50 static constexpr uint32_t LUTMODE_INTRA         = 1;
51 static constexpr uint32_t LUTMODE_INTRA_16x16   = 1;
52 static constexpr uint32_t LUTMODE_INTRA_8x8     = 2;
53 static constexpr uint32_t LUTMODE_INTRA_4x4     = 3;
54 static constexpr uint32_t LUTMODE_INTER_BWD     = 9;
55 static constexpr uint32_t LUTMODE_REF_ID        = 10;
56 static constexpr uint32_t LUTMODE_INTRA_CHROMA  = 11;
57 static constexpr uint32_t LUTMODE_INTER         = 8;
58 static constexpr uint32_t LUTMODE_INTER_16x16   = 8;
59 static constexpr uint32_t LUTMODE_INTER_16x8    = 4;
60 static constexpr uint32_t LUTMODE_INTER_8x16    = 4;
61 static constexpr uint32_t LUTMODE_INTER_8x8q    = 5;
62 static constexpr uint32_t LUTMODE_INTER_8x4q    = 6;
63 static constexpr uint32_t LUTMODE_INTER_4x8q    = 6;
64 static constexpr uint32_t LUTMODE_INTER_4x4q    = 7;
65 static constexpr uint32_t LUTMODE_SKIP_16x16    = 12;
66 static constexpr uint32_t LUTMODE_DIRECT_16x16  = 13;
67 
68 struct VDENC_COST_TABLE_XE_XPM
69 {
70     const uint16_t HmeCost[8][52];
71     const uint16_t VDEnc_MV_Cost[3][12];
72     const double AVC_RD_Mode_Cost[3][NUM_RD_MODE_COST];
73     const double VDEnc_Mode_Cost[3][12][52];
74     const uint8_t qp_lambda[42];
75 };
76 
77 struct MHW_VDBOX_AVC_IMG_PARAMS_XE_XPM : public MHW_VDBOX_AVC_IMG_PARAMS_G12
78 {
79     const VDENC_COST_TABLE_XE_XPM   *vdencCostTable   = nullptr;
80     bool                                colMVReadEnable  = false;
81     bool                                colMVWriteEnable = false;
82 };
83 using PMHW_VDBOX_AVC_IMG_PARAMS_XE_XPM = MHW_VDBOX_AVC_IMG_PARAMS_XE_XPM *;
84 
85 enum VDENC_XE_XPM_MAXTUSIZE
86 {
87     VDENC_XE_XPM_MAXTUSIZE_4x4 = 0,
88     VDENC_XE_XPM_MAXTUSIZE_8x8 = 1,
89     VDENC_XE_XPM_MAXTUSIZE_16x16 = 2,
90     VDENC_XE_XPM_MAXTUSIZE_32x32 = 3
91 };
92 
93 enum VDENC_XE_XPM_MAXCUSIZE
94 {
95     VDENC_XE_XPM_MAXCUSIZE_8x8 = 0,
96     VDENC_XE_XPM_MAXCUSIZE_16x16 = 1,
97     VDENC_XE_XPM_MAXCUSIZE_32x32 = 2,
98     VDENC_XE_XPM_MAXCUSIZE_64x64 = 3
99 };
100 
101 
102 #endif
103