1 /*
2 * Copyright (c) 2020-2021, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mhw_vdbox_vdenc_impl.h
24 //! \brief MHW VDBOX VDENC interface common base
25 //! \details
26 //!
27
28 #ifndef __MHW_VDBOX_VDENC_IMPL_H__
29 #define __MHW_VDBOX_VDENC_IMPL_H__
30
31 #include "mhw_vdbox_vdenc_itf.h"
32 #include "mhw_impl.h"
33 #include "mhw_mi_impl.h"
34
35 #ifdef IGFX_VDENC_INTERFACE_EXT_SUPPORT
36 #include "mhw_vdbox_vdenc_impl_ext.h"
37 #include "mhw_vdbox_vdenc_hwcmd_ext.h"
38 #endif
39
40 namespace mhw
41 {
42 namespace vdbox
43 {
44 namespace vdenc
45 {
MosFormatToVdencSurfaceRawFormat(MOS_FORMAT format)46 inline SurfaceFormat MosFormatToVdencSurfaceRawFormat(MOS_FORMAT format)
47 {
48 switch (format)
49 {
50 case Format_A8R8G8B8:
51 case Format_X8R8G8B8:
52 case Format_A8B8G8R8:
53 return SurfaceFormat::rgba4444;
54 case Format_NV12:
55 case Format_NV11:
56 case Format_P208:
57 case Format_IMC1:
58 case Format_IMC2:
59 case Format_IMC3:
60 case Format_IMC4:
61 return SurfaceFormat::planar4208;
62 case Format_400P:
63 case Format_P8:
64 return SurfaceFormat::y8Unorm;
65 case Format_UYVY:
66 return SurfaceFormat::yCrCbSwapY422;
67 case Format_YVYU:
68 return SurfaceFormat::yCrCbSwapUv422;
69 case Format_VYUY:
70 return SurfaceFormat::yCrCbSwapUvy422;
71 case Format_444P:
72 case Format_AYUV:
73 return SurfaceFormat::yuv444;
74 case Format_YUY2:
75 case Format_YUYV:
76 return SurfaceFormat::yuv422;
77 case Format_P010:
78 return SurfaceFormat::p010;
79 case Format_R10G10B10A2:
80 case Format_B10G10R10A2:
81 return SurfaceFormat::r10g10b10a2;
82 // Only Y210 supported now, allocated as Y216 format by 3D driver
83 case Format_Y210:
84 case Format_Y216:
85 return SurfaceFormat::y216;
86 case Format_Y410:
87 return SurfaceFormat::y410;
88 case Format_NV21:
89 return SurfaceFormat::nv21;
90 default:
91 return SurfaceFormat::planar4208;
92 }
93 }
94
MosFormatToVdencSurfaceReconFormat(MOS_FORMAT format)95 inline SurfaceFormat MosFormatToVdencSurfaceReconFormat(MOS_FORMAT format)
96 {
97 switch (format)
98 {
99 case Format_A8R8G8B8:
100 case Format_X8R8G8B8:
101 case Format_A8B8G8R8:
102 return SurfaceFormat::rgba4444;
103 case Format_NV12:
104 case Format_IMC1:
105 case Format_IMC2:
106 case Format_IMC3:
107 case Format_IMC4:
108 return SurfaceFormat::planar4208;
109 case Format_400P:
110 case Format_P8:
111 return SurfaceFormat::y8Unorm;
112 case Format_UYVY:
113 return SurfaceFormat::yCrCbSwapY422;
114 case Format_YVYU:
115 return SurfaceFormat::yCrCbSwapUv422;
116 case Format_VYUY:
117 return SurfaceFormat::yCrCbSwapUvy422;
118 case Format_444P:
119 case Format_AYUV:
120 return SurfaceFormat::ayuvVariant;
121 case Format_YUY2:
122 case Format_YUYV:
123 return SurfaceFormat::yuyvVariant;
124 case Format_P010:
125 return SurfaceFormat::p010Variant;
126 case Format_R10G10B10A2:
127 return SurfaceFormat::r10g10b10a2;
128 case Format_Y210:
129 case Format_Y216:
130 return SurfaceFormat::y216Variant;
131 case Format_Y410:
132 return SurfaceFormat::y416Variant;
133 case Format_NV21:
134 return SurfaceFormat::nv21;
135 default:
136 return SurfaceFormat::planar4208;
137 }
138 }
139
140 template <typename cmd_t>
141 class Impl : public Itf, public mhw::Impl
142 {
143 _VDENC_CMD_DEF(_MHW_CMD_ALL_DEF_FOR_IMPL);
144 MmioRegistersVdbox m_mmioRegisters[MHW_VDBOX_NODE_MAX] = {}; //!< Mfx mmio registers
145
146 public:
147
SetRowstoreCachingOffsets(const RowStorePar & par)148 MOS_STATUS SetRowstoreCachingOffsets(const RowStorePar &par) override
149 {
150 MHW_FUNCTION_ENTER;
151
152 switch (par.mode)
153 {
154 case RowStorePar::AVC:
155 {
156 if (this->m_rowStoreCache.vdenc.supported)
157 {
158 this->m_rowStoreCache.vdenc.enabled = true;
159 this->m_rowStoreCache.vdenc.dwAddress = !par.isField ? 1280 : 1536;
160 }
161 if (this->m_rowStoreCache.ipdl.supported)
162 {
163 this->m_rowStoreCache.ipdl.enabled = true;
164 this->m_rowStoreCache.ipdl.dwAddress = 512;
165 }
166
167 break;
168 }
169 case RowStorePar::HEVC:
170 {
171 constexpr bool enable[16][5] =
172 {
173 {1, 1, 1, 0, 1}, {1, 1, 1, 1, 1}, {1, 1, 0, 0, 0}, {1, 1, 0, 1, 0},
174 {1, 1, 1, 1, 1}, {1, 1, 0, 0, 1}, {1, 1, 1, 0, 0}, {1, 0, 1, 0, 1},
175 {1, 1, 1, 0, 0}, {1, 0, 1, 0, 1}, {1, 1, 1, 1, 1}, {1, 1, 0, 1, 1},
176 {1, 1, 1, 1, 1}, {1, 0, 1, 1, 1}, {1, 1, 1, 1, 1}, {1, 0, 1, 1, 1}
177 };
178
179 constexpr uint32_t address[16][5] =
180 {
181 {0, 256, 1280, 0, 2048}, {0, 256, 1280, 1824, 1792}, {0, 512, 0, 0, 0}, {0, 256, 0, 2304, 0},
182 {0, 256, 1024, 0, 1792}, {0, 512, 0, 0, 2048}, {0, 256, 1792, 0, 0}, {0, 0, 512, 0, 2048},
183 {0, 256, 1792, 0, 0}, {0, 0, 256, 0, 1792}, {0, 256, 1024, 1568, 1536}, {0, 512, 0, 2112, 2048},
184 {0, 256, 1792, 2336, 2304}, {0, 0, 512, 1600, 1536}, {0, 128, 1664, 2336, 2304}, {0, 0, 256, 1600, 1536}
185 };
186
187 bool isLcu32or64 = par.lcuSize == RowStorePar::SIZE_32 || par.lcuSize == RowStorePar::SIZE_64;
188 bool isGt4k = par.frameWidth > 4096;
189 bool isGt8k = par.frameWidth > 8192;
190 uint32_t index = 0;
191
192 if (par.format != RowStorePar::YUV444)
193 {
194 index = 2 * isGt4k + isLcu32or64;
195 }
196 else
197 {
198 uint32_t subidx = par.bitDepth == RowStorePar::DEPTH_12 ? 2 : (par.bitDepth == RowStorePar::DEPTH_10 ? 1 : 0);
199 index = 4 + 6 * isLcu32or64 + 2 * subidx + isGt4k;
200 }
201
202 if (!isGt8k && this->m_rowStoreCache.vdenc.supported)
203 {
204 this->m_rowStoreCache.vdenc.enabled = enable[index][3];
205 if (this->m_rowStoreCache.vdenc.enabled)
206 {
207 this->m_rowStoreCache.vdenc.dwAddress = address[index][3];
208 }
209 }
210
211 break;
212 }
213 case RowStorePar::AV1:
214 {
215 if (this->m_rowStoreCache.vdenc.supported)
216 {
217 this->m_rowStoreCache.vdenc.enabled = true;
218 this->m_rowStoreCache.vdenc.dwAddress = 2370;
219 }
220 if (this->m_rowStoreCache.ipdl.supported)
221 {
222 this->m_rowStoreCache.ipdl.enabled = true;
223 this->m_rowStoreCache.ipdl.dwAddress = 384;
224 }
225
226 break;
227 }
228 case RowStorePar::VP9:
229 {
230 // HVD, Meta/MV, DeBlock, VDEnc
231 const bool enableVP9[13][4] =
232 {
233 { 1, 1, 1, 1 }, { 0, 0, 1, 1 }, { 1, 0, 1, 1 }, { 1, 1, 0, 1 },
234 { 1, 1, 1, 1 }, { 0, 0, 1, 1 }, { 0, 0, 1, 0 }, { 1, 1, 0, 1 },
235 { 1, 1, 1, 1 }, { 1, 1, 0, 1 }, { 1, 1, 1, 1 }, { 1, 1, 0, 1 },
236 { 1, 1, 0, 1 }
237 };
238
239 const uint32_t addressVP9[13][4] =
240 {
241 { 0, 64, 384, 1536, }, { 0, 0, 0, 2304, }, { 0, 0, 64, 2368, }, { 0, 128, 0, 768, },
242 { 0, 64, 384, 1536, }, { 0, 0, 0, 2304, }, { 0, 0, 0, 0, }, { 0, 128, 0, 768, },
243 { 0, 64, 384, 2112, }, { 0, 128, 0, 768, }, { 0, 32, 192, 1920, }, { 0, 128, 0, 768, },
244 { 0, 128, 0, 768, }
245 };
246
247 if(this->m_rowStoreCache.vdenc.supported)
248 {
249 bool is8bit = par.bitDepth == RowStorePar::DEPTH_8;
250 bool isGt2k = par.frameWidth > 2048;
251 bool isGt4k = par.frameWidth > 4096;
252 bool isGt8k = par.frameWidth > 8192;
253 uint32_t index = 0;
254
255 if((par.format >= RowStorePar::YUV420) && (par.format <= RowStorePar::YUV444))
256 {
257 index = 4 * (par.format - RowStorePar::YUV420) + 2 * (!is8bit) + isGt4k;
258 }
259 else
260 {
261 return MOS_STATUS_SUCCESS;
262 }
263
264 if(par.format == RowStorePar::YUV444 && !is8bit)
265 {
266 index += isGt2k;
267 }
268
269 if(!isGt8k)
270 {
271 this->m_rowStoreCache.vdenc.enabled = enableVP9[index][3];
272 if(this->m_rowStoreCache.vdenc.enabled)
273 {
274 this->m_rowStoreCache.vdenc.dwAddress = addressVP9[index][3];
275 }
276 }
277 }
278 }
279 default:
280 {
281 break;
282 }
283 }
284
285 return MOS_STATUS_SUCCESS;
286 }
287
SetCacheabilitySettings(MHW_MEMORY_OBJECT_CONTROL_PARAMS settings[MOS_CODEC_RESOURCE_USAGE_END_CODEC])288 MOS_STATUS SetCacheabilitySettings(MHW_MEMORY_OBJECT_CONTROL_PARAMS settings[MOS_CODEC_RESOURCE_USAGE_END_CODEC]) override
289 {
290 MHW_FUNCTION_ENTER;
291
292 MHW_CHK_NULL_RETURN(settings);
293
294 size_t size = MOS_CODEC_RESOURCE_USAGE_END_CODEC * sizeof(MHW_MEMORY_OBJECT_CONTROL_PARAMS);
295
296 return MOS_SecureMemcpy(m_cacheabilitySettings, size, settings, size);
297 }
298
IsPerfModeSupported()299 bool IsPerfModeSupported() override
300 {
301 return m_perfModeSupported;
302 }
303
IsRhoDomainStatsEnabled()304 bool IsRhoDomainStatsEnabled() override
305 {
306 return m_rhoDomainStatsEnabled;
307 }
308
GetMmioRegisters(MHW_VDBOX_NODE_IND index)309 MmioRegistersVdbox *GetMmioRegisters(MHW_VDBOX_NODE_IND index) override
310 {
311 if (index < MHW_VDBOX_NODE_MAX)
312 {
313 return &m_mmioRegisters[index];
314 }
315 else
316 {
317 MHW_ASSERT("index is out of range!");
318 return &m_mmioRegisters[MHW_VDBOX_NODE_1];
319 }
320 }
321 private:
322 //VDBOX register offsets
323 static constexpr uint32_t MFC_IMAGE_STATUS_MASK_REG_OFFSET_NODE_1_INIT = 0x1C08B4;
324 static constexpr uint32_t MFC_IMAGE_STATUS_CTRL_REG_OFFSET_NODE_1_INIT = 0x1C08B8;
325 static constexpr uint32_t MFC_AVC_NUM_SLICES_REG_OFFSET_NODE_1_INIT = 0x1C0954;
326 static constexpr uint32_t MFC_QP_STATUS_COUNT_OFFSET_NODE_1_INIT = 0x1C08BC;
327 static constexpr uint32_t MFX_ERROR_FLAG_REG_OFFSET_NODE_1_INIT = 0x1C0800;
328 static constexpr uint32_t MFX_FRAME_CRC_REG_OFFSET_NODE_1_INIT = 0x1C0850;
329 static constexpr uint32_t MFX_MB_COUNT_REG_OFFSET_NODE_1_INIT = 0x1C0868;
330 static constexpr uint32_t MFC_BITSTREAM_BYTECOUNT_FRAME_REG_OFFSET_NODE_1_INIT = 0x1C08A0;
331 static constexpr uint32_t MFC_BITSTREAM_SE_BITCOUNT_FRAME_REG_OFFSET_NODE_1_INIT = 0x1C08A4;
332 static constexpr uint32_t MFC_BITSTREAM_BYTECOUNT_SLICE_REG_OFFSET_NODE_1_INIT = 0x1C08D0;
333 //VDBOX register initial value
334 static constexpr uint32_t MFX_LRA0_REG_OFFSET_NODE_1_INIT = 0;
335 static constexpr uint32_t MFX_LRA1_REG_OFFSET_NODE_1_INIT = 0;
336 static constexpr uint32_t MFX_LRA2_REG_OFFSET_NODE_1_INIT = 0;
337
InitMmioRegisters()338 void InitMmioRegisters()
339 {
340 MmioRegistersVdbox *mmioRegisters = &m_mmioRegisters[MHW_VDBOX_NODE_1];
341
342 mmioRegisters->generalPurposeRegister0LoOffset = mhw::mi::GENERAL_PURPOSE_REGISTER0_LO_OFFSET_NODE_1_INIT;
343 mmioRegisters->generalPurposeRegister0HiOffset = mhw::mi::GENERAL_PURPOSE_REGISTER0_HI_OFFSET_NODE_1_INIT;
344 mmioRegisters->generalPurposeRegister4LoOffset = mhw::mi::GENERAL_PURPOSE_REGISTER4_LO_OFFSET_NODE_1_INIT;
345 mmioRegisters->generalPurposeRegister4HiOffset = mhw::mi::GENERAL_PURPOSE_REGISTER4_HI_OFFSET_NODE_1_INIT;
346 mmioRegisters->generalPurposeRegister11LoOffset = mhw::mi::GENERAL_PURPOSE_REGISTER11_LO_OFFSET_NODE_1_INIT;
347 mmioRegisters->generalPurposeRegister11HiOffset = mhw::mi::GENERAL_PURPOSE_REGISTER11_HI_OFFSET_NODE_1_INIT;
348 mmioRegisters->generalPurposeRegister12LoOffset = mhw::mi::GENERAL_PURPOSE_REGISTER12_LO_OFFSET_NODE_1_INIT;
349 mmioRegisters->generalPurposeRegister12HiOffset = mhw::mi::GENERAL_PURPOSE_REGISTER12_HI_OFFSET_NODE_1_INIT;
350 mmioRegisters->mfcImageStatusMaskRegOffset = MFC_IMAGE_STATUS_MASK_REG_OFFSET_NODE_1_INIT;
351 mmioRegisters->mfcImageStatusCtrlRegOffset = MFC_IMAGE_STATUS_CTRL_REG_OFFSET_NODE_1_INIT;
352 mmioRegisters->mfcAvcNumSlicesRegOffset = MFC_AVC_NUM_SLICES_REG_OFFSET_NODE_1_INIT;
353 mmioRegisters->mfcQPStatusCountOffset = MFC_QP_STATUS_COUNT_OFFSET_NODE_1_INIT;
354 mmioRegisters->mfxErrorFlagsRegOffset = MFX_ERROR_FLAG_REG_OFFSET_NODE_1_INIT;
355 mmioRegisters->mfxFrameCrcRegOffset = MFX_FRAME_CRC_REG_OFFSET_NODE_1_INIT;
356 mmioRegisters->mfxMBCountRegOffset = MFX_MB_COUNT_REG_OFFSET_NODE_1_INIT;
357 mmioRegisters->mfcBitstreamBytecountFrameRegOffset = MFC_BITSTREAM_BYTECOUNT_FRAME_REG_OFFSET_NODE_1_INIT;
358 mmioRegisters->mfcBitstreamSeBitcountFrameRegOffset = MFC_BITSTREAM_SE_BITCOUNT_FRAME_REG_OFFSET_NODE_1_INIT;
359 mmioRegisters->mfcBitstreamBytecountSliceRegOffset = MFC_BITSTREAM_BYTECOUNT_SLICE_REG_OFFSET_NODE_1_INIT;
360 mmioRegisters->mfxLra0RegOffset = MFX_LRA0_REG_OFFSET_NODE_1_INIT;
361 mmioRegisters->mfxLra1RegOffset = MFX_LRA1_REG_OFFSET_NODE_1_INIT;
362 mmioRegisters->mfxLra2RegOffset = MFX_LRA2_REG_OFFSET_NODE_1_INIT;
363
364 m_mmioRegisters[MHW_VDBOX_NODE_2] = m_mmioRegisters[MHW_VDBOX_NODE_1];
365 }
366 protected:
367 using base_t = Itf;
368
369 struct
370 {
371 RowStoreCache vdenc;
372 RowStoreCache ipdl;
373 } m_rowStoreCache = {};
374 MHW_MEMORY_OBJECT_CONTROL_PARAMS m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_END_CODEC] = {};
375
Impl(PMOS_INTERFACE osItf)376 Impl(PMOS_INTERFACE osItf) : mhw::Impl(osItf)
377 {
378 MHW_FUNCTION_ENTER;
379
380 InitMmioRegisters();
381 InitRowstoreUserFeatureSettings();
382 }
383
InitRowstoreUserFeatureSettings()384 virtual MOS_STATUS InitRowstoreUserFeatureSettings()
385 {
386 MHW_FUNCTION_ENTER;
387
388 bool rowstoreCachingDisableDefaultValue = false;
389 if (this->m_osItf->bSimIsActive)
390 {
391 // Disable RowStore Cache on simulation by default
392 rowstoreCachingDisableDefaultValue = true;
393 }
394 else
395 {
396 rowstoreCachingDisableDefaultValue = false;
397 }
398 bool rowstoreCachingSupported = !rowstoreCachingDisableDefaultValue;
399 #if (_DEBUG || _RELEASE_INTERNAL)
400 auto userSettingPtr = m_osItf->pfnGetUserSettingInstance(m_osItf);
401 {
402 MediaUserSetting::Value outValue;
403 ReadUserSettingForDebug(userSettingPtr,
404 outValue,
405 "Disable RowStore Cache",
406 MediaUserSetting::Group::Device,
407 rowstoreCachingDisableDefaultValue,
408 true);
409 rowstoreCachingSupported = !(outValue.Get<bool>());
410 }
411 #endif // _DEBUG || _RELEASE_INTERNAL
412
413 if (!rowstoreCachingSupported)
414 {
415 return MOS_STATUS_SUCCESS;
416 }
417
418 m_rowStoreCache.vdenc.supported = true;
419 #if (_DEBUG || _RELEASE_INTERNAL)
420 {
421 MediaUserSetting::Value outValue;
422 ReadUserSettingForDebug(userSettingPtr,
423 outValue,
424 "DisableVDEncRowStoreCache",
425 MediaUserSetting::Group::Device);
426 m_rowStoreCache.vdenc.supported = !(outValue.Get<bool>());
427 }
428 #endif // _DEBUG || _RELEASE_INTERNAL
429
430 m_rowStoreCache.ipdl.supported = true;
431 #if (_DEBUG || _RELEASE_INTERNAL)
432 {
433 MediaUserSetting::Value outValue;
434 ReadUserSettingForDebug(userSettingPtr,
435 outValue,
436 "DisableIntraRowStoreCache",
437 MediaUserSetting::Group::Device);
438 m_rowStoreCache.ipdl.supported = !(outValue.Get<bool>());
439 }
440 #endif // _DEBUG || _RELEASE_INTERNAL
441
442 return MOS_STATUS_SUCCESS;
443 }
444
_MHW_SETCMD_OVERRIDE_DECL(VDENC_CONTROL_STATE)445 _MHW_SETCMD_OVERRIDE_DECL(VDENC_CONTROL_STATE)
446 {
447 _MHW_SETCMD_CALLBASE(VDENC_CONTROL_STATE);
448
449 #define DO_FIELDS() \
450 DO_FIELD(DW1, VdencInitialization, params.vdencInitialization)
451
452 #include "mhw_hwcmd_process_cmdfields.h"
453 }
454
_MHW_SETCMD_OVERRIDE_DECL(VDENC_PIPE_MODE_SELECT)455 _MHW_SETCMD_OVERRIDE_DECL(VDENC_PIPE_MODE_SELECT)
456 {
457 _MHW_SETCMD_CALLBASE(VDENC_PIPE_MODE_SELECT);
458
459 #define DO_FIELDS() \
460 DO_FIELD(DW1, StandardSelect, params.standardSelect); \
461 DO_FIELD(DW1, ScalabilityMode, params.scalabilityMode); \
462 DO_FIELD(DW1, FrameStatisticsStreamOutEnable, params.frameStatisticsStreamOut); \
463 DO_FIELD(DW1, VdencPakObjCmdStreamOutEnable, params.pakObjCmdStreamOut); \
464 DO_FIELD(DW1, TlbPrefetchEnable, params.tlbPrefetch); \
465 DO_FIELD(DW1, PakThresholdCheckEnable, params.dynamicSlice); \
466 DO_FIELD(DW1, VdencStreamInEnable, params.streamIn); \
467 DO_FIELD(DW1, BitDepth, params.bitDepthMinus8); \
468 DO_FIELD(DW1, PakChromaSubSamplingType, params.chromaType); \
469 DO_FIELD(DW1, OutputRangeControlAfterColorSpaceConversion, params.outputRangeControlCsc); \
470 DO_FIELD(DW1, TileReplayEnable, params.tileBasedReplayMode); \
471 DO_FIELD(DW1, IsRandomAccess, params.randomAccess); \
472 DO_FIELD(DW1, RgbEncodingEnable, params.rgbEncodingMode); \
473 DO_FIELD(DW1, StreamingBufferConfig, params.streamingBufferConfig); \
474 \
475 DO_FIELD(DW2, HmeRegionPreFetchenable, params.hmeRegionPrefetch); \
476 DO_FIELD(DW2, Topprefetchenablemode, params.topPrefetchEnableMode); \
477 DO_FIELD(DW2, LeftpreFetchatwraparound, params.leftPrefetchAtWrapAround); \
478 DO_FIELD(DW2, Verticalshift32Minus1, params.verticalShift32Minus1); \
479 DO_FIELD(DW2, Hzshift32Minus1, params.hzShift32Minus1); \
480 DO_FIELD(DW2, NumVerticalReqMinus1, params.numVerticalReqMinus1); \
481 DO_FIELD(DW2, Numhzreqminus1, params.numHzReqMinus1); \
482 DO_FIELD(DW2, PreFetchOffsetForReferenceIn16PixelIncrement, params.prefetchOffset); \
483 \
484 DO_FIELD(DW5, CaptureMode, params.captureMode); \
485 DO_FIELD(DW5, ParallelCaptureAndEncodeSessionId, params.wirelessSessionId); \
486 DO_FIELD(DW5, TailPointerReadFrequency, params.tailPointerReadFrequency); \
487 DO_FIELD(DW5, VDENC_PIPE_MODE_SELECT_DW5_BIT17, params.VdencPipeModeSelectPar0); \
488 DO_FIELD(DW5, VDENC_PIPE_MODE_SELECT_DW5_BIT8, params.VdencPipeModeSelectPar1);
489
490 #include "mhw_hwcmd_process_cmdfields.h"
491 }
492
_MHW_SETCMD_OVERRIDE_DECL(VDENC_SRC_SURFACE_STATE)493 _MHW_SETCMD_OVERRIDE_DECL(VDENC_SRC_SURFACE_STATE)
494 {
495 _MHW_SETCMD_CALLBASE(VDENC_SRC_SURFACE_STATE);
496
497 #define DO_FIELDS() \
498 DO_FIELD(Dwords25.DW0, Width, params.width - 1); \
499 DO_FIELD(Dwords25.DW0, Height, params.height - 1); \
500 DO_FIELD(Dwords25.DW0, ColorSpaceSelection, params.colorSpaceSelection); \
501 DO_FIELD(Dwords25.DW0, CrVCbUPixelOffsetVDirection, params.vDirection); \
502 DO_FIELD(Dwords25.DW0, SurfaceFormatByteSwizzle, params.displayFormatSwizzle); \
503 \
504 DO_FIELD(Dwords25.DW1, TileMode, GetHwTileType(params.tileType, params.tileModeGmm, params.gmmTileEn)); \
505 DO_FIELD(Dwords25.DW1, SurfaceFormat, static_cast<uint32_t>(MosFormatToVdencSurfaceRawFormat(params.format))); \
506 DO_FIELD(Dwords25.DW1, SurfacePitch, params.pitch - 1); \
507 DO_FIELD(Dwords25.DW1, ChromaDownsampleFilterControl, params.chromaDownsampleFilterControl); \
508 \
509 DO_FIELD(Dwords25.DW2, YOffsetForUCb, params.uOffset); \
510 DO_FIELD(Dwords25.DW3, YOffsetForVCr, params.vOffset)
511
512 #include "mhw_hwcmd_process_cmdfields.h"
513 }
514
_MHW_SETCMD_OVERRIDE_DECL(VDENC_REF_SURFACE_STATE)515 _MHW_SETCMD_OVERRIDE_DECL(VDENC_REF_SURFACE_STATE)
516 {
517 _MHW_SETCMD_CALLBASE(VDENC_REF_SURFACE_STATE);
518
519 #define DO_FIELDS() \
520 DO_FIELD(Dwords25.DW0, Width, params.width - 1); \
521 DO_FIELD(Dwords25.DW0, Height, params.height - 1); \
522 DO_FIELD(Dwords25.DW0, CrVCbUPixelOffsetVDirection, params.vDirection); \
523 \
524 DO_FIELD(Dwords25.DW1, TileMode, GetHwTileType(params.tileType, params.tileModeGmm, params.gmmTileEn)); \
525 DO_FIELD(Dwords25.DW1, SurfacePitch, params.pitch - 1); \
526 DO_FIELD(Dwords25.DW1, SurfaceFormat, static_cast<uint32_t>(MosFormatToVdencSurfaceReconFormat(params.format))); \
527 \
528 DO_FIELD(Dwords25.DW2, YOffsetForUCb, params.uOffset); \
529 DO_FIELD(Dwords25.DW3, YOffsetForVCr, params.vOffset)
530
531 #include "mhw_hwcmd_process_cmdfields.h"
532 }
533
_MHW_SETCMD_OVERRIDE_DECL(VDENC_DS_REF_SURFACE_STATE)534 _MHW_SETCMD_OVERRIDE_DECL(VDENC_DS_REF_SURFACE_STATE)
535 {
536 _MHW_SETCMD_CALLBASE(VDENC_DS_REF_SURFACE_STATE);
537
538 const bool stage2 = params.widthStage2 && params.heightStage2 && params.pitchStage2;
539
540 #define DO_FIELDS() \
541 DO_FIELD(Dwords25.DW0, Width, params.widthStage1 - 1); \
542 DO_FIELD(Dwords25.DW0, Height, params.heightStage1 - 1); \
543 DO_FIELD(Dwords25.DW0, CrVCbUPixelOffsetVDirection, params.vDirectionStage1); \
544 \
545 DO_FIELD(Dwords25.DW1, TileMode, GetHwTileType(params.tileTypeStage1, params.tileModeGmmStage1, params.gmmTileEnStage1)); \
546 DO_FIELD(Dwords25.DW1, SurfaceFormat, cmd_t::VDENC_Surface_State_Fields_CMD::SURFACE_FORMAT_PLANAR_420_8); \
547 DO_FIELD(Dwords25.DW1, SurfacePitch, params.pitchStage1 - 1); \
548 \
549 DO_FIELD(Dwords25.DW2, YOffsetForUCb, params.uOffsetStage1); \
550 \
551 DO_FIELD(Dwords25.DW3, YOffsetForVCr, params.vOffsetStage1); \
552 \
553 DO_FIELD(Dwords69.DW0, Width, stage2 ? params.widthStage2 - 1 : 0); \
554 DO_FIELD(Dwords69.DW0, Height, stage2 ? params.heightStage2 - 1 : 0); \
555 DO_FIELD(Dwords69.DW0, CrVCbUPixelOffsetVDirection, stage2 ? params.vDirectionStage2 : 0); \
556 \
557 DO_FIELD(Dwords69.DW1, TileMode, stage2 ? GetHwTileType(params.tileTypeStage2, params.tileModeGmmStage2, params.gmmTileEnStage2) : 0); \
558 DO_FIELD(Dwords69.DW1, SurfaceFormat, stage2 ? cmd_t::VDENC_Surface_State_Fields_CMD::SURFACE_FORMAT_PLANAR_420_8 : 0); \
559 DO_FIELD(Dwords69.DW1, SurfacePitch, stage2 ? params.pitchStage2 - 1 : 0); \
560 \
561 DO_FIELD(Dwords69.DW2, YOffsetForUCb, stage2 ? params.uOffsetStage2 : 0); \
562 \
563 DO_FIELD(Dwords69.DW3, YOffsetForVCr, stage2 ? params.vOffsetStage2 : 0)
564
565 #include "mhw_hwcmd_process_cmdfields.h"
566 }
567
_MHW_SETCMD_OVERRIDE_DECL(VDENC_PIPE_BUF_ADDR_STATE)568 _MHW_SETCMD_OVERRIDE_DECL(VDENC_PIPE_BUF_ADDR_STATE)
569 {
570 _MHW_SETCMD_CALLBASE(VDENC_PIPE_BUF_ADDR_STATE);
571
572 MHW_RESOURCE_PARAMS resourceParams = {};
573
574 if (params.surfaceRaw)
575 {
576 cmd.OriginalUncompressedPicture.PictureFields.DW0.MemoryCompressionEnable = MmcEnabled(params.mmcStateRaw);
577 cmd.OriginalUncompressedPicture.PictureFields.DW0.CompressionType = MmcRcEnabled(params.mmcStateRaw);
578 cmd.OriginalUncompressedPicture.PictureFields.DW0.CompressionFormat = params.compressionFormatRaw;
579
580 resourceParams = {};
581 resourceParams.presResource = ¶ms.surfaceRaw->OsResource;
582 resourceParams.dwOffset = params.surfaceRaw->dwOffset;
583 resourceParams.pdwCmd = (uint32_t *)&(cmd.OriginalUncompressedPicture.LowerAddress);
584 //resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(OriginalUncompressedPicture.LowerAddress);
585 resourceParams.dwLocationInCmd = 10;
586 resourceParams.bIsWritable = false;
587 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
588
589 InitMocsParams(resourceParams, &cmd.OriginalUncompressedPicture.PictureFields.DW0.Value, 1, 6);
590
591 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
592 this->m_osItf,
593 this->m_currentCmdBuf,
594 &resourceParams));
595 }
596
597 if (this->m_rowStoreCache.vdenc.enabled)
598 {
599 cmd.RowStoreScratchBuffer.BufferPictureFields.DW0.CacheSelect = cmd_t::VDENC_Surface_Control_Bits_CMD::CACHE_SELECT_UNNAMED1;
600 cmd.RowStoreScratchBuffer.LowerAddress.DW0.Value = this->m_rowStoreCache.vdenc.dwAddress << 6;
601 }
602 else if (!Mos_ResourceIsNull(params.intraRowStoreScratchBuffer))
603 {
604 resourceParams.presResource = params.intraRowStoreScratchBuffer;
605 resourceParams.dwOffset = 0;
606 resourceParams.pdwCmd = (uint32_t *)&(cmd.RowStoreScratchBuffer.LowerAddress);
607 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(RowStoreScratchBuffer.LowerAddress);
608 resourceParams.bIsWritable = true;
609 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
610
611 InitMocsParams(resourceParams, &cmd.RowStoreScratchBuffer.BufferPictureFields.DW0.Value, 1, 6);
612
613 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
614 this->m_osItf,
615 this->m_currentCmdBuf,
616 &resourceParams));
617 }
618
619 if (!Mos_ResourceIsNull(params.streamOutBuffer))
620 {
621 resourceParams.presResource = params.streamOutBuffer;
622 resourceParams.dwOffset = params.streamOutOffset;
623 resourceParams.pdwCmd = (uint32_t *)&(cmd.VdencStatisticsStreamout.LowerAddress);
624 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(VdencStatisticsStreamout.LowerAddress);
625 resourceParams.bIsWritable = true;
626 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
627
628 InitMocsParams(resourceParams, &cmd.VdencStatisticsStreamout.PictureFields.DW0.Value, 1, 6);
629
630 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
631 this->m_osItf,
632 this->m_currentCmdBuf,
633 &resourceParams));
634 }
635
636 if (!Mos_ResourceIsNull(params.streamInBuffer))
637 {
638 resourceParams.presResource = params.streamInBuffer;
639 resourceParams.dwOffset = params.streamInBuffer->dwResourceOffset;
640 resourceParams.pdwCmd = (uint32_t *)&(cmd.StreaminDataPicture.LowerAddress);
641 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(StreaminDataPicture.LowerAddress);
642 resourceParams.bIsWritable = false;
643 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
644
645 InitMocsParams(resourceParams, &cmd.StreaminDataPicture.PictureFields.DW0.Value, 1, 6);
646
647 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
648 this->m_osItf,
649 this->m_currentCmdBuf,
650 &resourceParams));
651 }
652
653 // SCC will use BwdRef0 as extra slot to store IBC if max fwd ref num is 3.
654 typename cmd_t::VDENC_Reference_Picture_CMD *fwdRefs[] =
655 {&cmd.FwdRef0, &cmd.FwdRef1, &cmd.FwdRef2, &cmd.BwdRef0};
656 uint32_t fwdRefsDwLoaction[] =
657 {_MHW_CMD_DW_LOCATION(FwdRef0), _MHW_CMD_DW_LOCATION(FwdRef1), _MHW_CMD_DW_LOCATION(FwdRef2), _MHW_CMD_DW_LOCATION(BwdRef0)};
658
659 typename cmd_t::VDENC_Down_Scaled_Reference_Picture_CMD *fwdRefsDsStage1[] =
660 {&cmd.DsFwdRef0, &cmd.DsFwdRef1};
661 uint32_t fwdRefsDsStage1DwLoaction[] =
662 {_MHW_CMD_DW_LOCATION(DsFwdRef0), _MHW_CMD_DW_LOCATION(DsFwdRef1)};
663
664 typename cmd_t::VDENC_Down_Scaled_Reference_Picture_CMD *fwdRefsDsStage2[] =
665 {&cmd.DsFwdRef04X, &cmd.DsFwdRef14X, &cmd.Additional4xDsFwdRef};
666 uint32_t fwdRefsDsStage2DwLoaction[] =
667 {_MHW_CMD_DW_LOCATION(DsFwdRef04X), _MHW_CMD_DW_LOCATION(DsFwdRef14X), _MHW_CMD_DW_LOCATION(Additional4xDsFwdRef)};
668
669 uint8_t refIdx;
670 for (refIdx = 0; refIdx < params.numActiveRefL0; refIdx++)
671 {
672 if (!Mos_ResourceIsNull(params.refs[refIdx]) && refIdx < sizeof(fwdRefs) / sizeof(fwdRefs[0]))
673 {
674 MOS_SURFACE details = {};
675 details.Format = Format_Invalid;
676 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnGetResourceInfo(this->m_osItf, params.refs[refIdx], &details));
677
678 resourceParams.presResource = params.refs[refIdx];
679 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
680 resourceParams.dwLocationInCmd = fwdRefsDwLoaction[refIdx];
681 resourceParams.bIsWritable = false;
682 resourceParams.pdwCmd = (uint32_t *)&fwdRefs[refIdx]->LowerAddress;
683 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
684
685 uint8_t mmcSkip = (params.mmcSkipMask) & (1 << refIdx);
686 auto mmcMode = MOS_MEMCOMP_DISABLED;
687 uint32_t mmcFormat = 0;
688 if (params.mmcEnabled)
689 {
690 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnGetMemoryCompressionMode(
691 this->m_osItf, params.refs[refIdx], &mmcMode));
692 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnGetMemoryCompressionFormat(
693 this->m_osItf, params.refs[refIdx], &mmcFormat));
694 }
695
696 fwdRefs[refIdx]->PictureFields.DW0.MemoryCompressionEnable = mmcSkip ? 0 : MmcEnabled(mmcMode);
697 fwdRefs[refIdx]->PictureFields.DW0.CompressionType = mmcSkip ? MOS_MEMCOMP_DISABLED : MmcRcEnabled(mmcMode);
698 fwdRefs[refIdx]->PictureFields.DW0.CompressionFormat = mmcFormat;
699
700 InitMocsParams(resourceParams, &fwdRefs[refIdx]->PictureFields.DW0.Value, 1, 6);
701
702 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
703 this->m_osItf,
704 this->m_currentCmdBuf,
705 &resourceParams));
706 }
707
708 if (!Mos_ResourceIsNull(params.refsDsStage1[refIdx]) && refIdx < sizeof(fwdRefsDsStage1) / sizeof(fwdRefsDsStage1[0]))
709 {
710 MOS_SURFACE details = {};
711 details.Format = Format_Invalid;
712 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnGetResourceInfo(this->m_osItf, params.refsDsStage1[refIdx], &details));
713
714 resourceParams.presResource = params.refsDsStage1[refIdx];
715 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
716 resourceParams.dwLocationInCmd = fwdRefsDsStage1DwLoaction[refIdx];
717 resourceParams.bIsWritable = false;
718 resourceParams.pdwCmd = (uint32_t *)&(fwdRefsDsStage1[refIdx]->LowerAddress);
719 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
720
721 auto mmcMode = params.mmcStateDsStage1;
722
723 fwdRefsDsStage1[refIdx]->PictureFields.DW0.MemoryCompressionEnable = MmcEnabled(mmcMode);
724 fwdRefsDsStage1[refIdx]->PictureFields.DW0.CompressionType = MmcRcEnabled(mmcMode);
725
726 InitMocsParams(resourceParams, &fwdRefsDsStage1[refIdx]->PictureFields.DW0.Value, 1, 6);
727
728 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
729 this->m_osItf,
730 this->m_currentCmdBuf,
731 &resourceParams));
732 }
733
734 if (!Mos_ResourceIsNull(params.refsDsStage2[refIdx]) && refIdx < sizeof(fwdRefsDsStage2) / sizeof(fwdRefsDsStage2[0]))
735 {
736 MOS_SURFACE details = {};
737 details.Format = Format_Invalid;
738 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnGetResourceInfo(this->m_osItf, params.refsDsStage2[refIdx], &details));
739
740 resourceParams.presResource = params.refsDsStage2[refIdx];
741 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
742 resourceParams.dwLocationInCmd = fwdRefsDsStage2DwLoaction[refIdx];
743 resourceParams.bIsWritable = false;
744 resourceParams.pdwCmd = (uint32_t *)&(fwdRefsDsStage2[refIdx]->LowerAddress);
745 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
746
747 auto mmcMode = params.mmcStateDsStage2;
748
749 fwdRefsDsStage2[refIdx]->PictureFields.DW0.MemoryCompressionEnable = MmcEnabled(mmcMode);
750 fwdRefsDsStage2[refIdx]->PictureFields.DW0.CompressionType = MmcRcEnabled(mmcMode);
751
752 InitMocsParams(resourceParams, &fwdRefsDsStage2[refIdx]->PictureFields.DW0.Value, 1, 6);
753
754 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
755 this->m_osItf,
756 this->m_currentCmdBuf,
757 &resourceParams));
758
759 if (params.numActiveRefL0 == 2 && params.numActiveRefL1 == 1 && refIdx == 1)
760 {
761 resourceParams.dwLocationInCmd = fwdRefsDsStage2DwLoaction[refIdx + 1];
762 resourceParams.pdwCmd = (uint32_t *)&(fwdRefsDsStage2[refIdx + 1]->LowerAddress);
763 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
764
765 fwdRefsDsStage2[refIdx + 1]->PictureFields.DW0.MemoryCompressionEnable = MmcEnabled(mmcMode);
766 fwdRefsDsStage2[refIdx + 1]->PictureFields.DW0.CompressionType = MmcRcEnabled(mmcMode);
767
768 InitMocsParams(resourceParams, &fwdRefsDsStage2[refIdx + 1]->PictureFields.DW0.Value, 1, 6);
769
770 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
771 this->m_osItf,
772 this->m_currentCmdBuf,
773 &resourceParams));
774 }
775 }
776 }
777
778 if ((!params.lowDelayB && params.numActiveRefL1) || params.isPFrame) //HW request HEVC PFrame to set address in BwdRef0 to be same as FwdRef0
779 {
780 if (!Mos_ResourceIsNull(params.refs[refIdx]))
781 {
782 MOS_SURFACE details = {};
783 details.Format = Format_Invalid;
784 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnGetResourceInfo(this->m_osItf, params.refs[refIdx], &details));
785
786 resourceParams.presResource = params.refs[refIdx];
787 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
788 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(BwdRef0);
789 resourceParams.bIsWritable = false;
790 resourceParams.pdwCmd = (uint32_t *)&(cmd.BwdRef0.LowerAddress);
791 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
792
793 auto mmcMode = MOS_MEMCOMP_DISABLED;
794 uint32_t mmcFormat = 0;
795 if (params.mmcEnabled)
796 {
797 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnGetMemoryCompressionMode(
798 this->m_osItf, params.refs[refIdx], &mmcMode));
799 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnGetMemoryCompressionFormat(
800 this->m_osItf, params.refs[refIdx], &mmcFormat));
801 }
802
803 cmd.BwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnabled(mmcMode);
804 cmd.BwdRef0.PictureFields.DW0.CompressionType = MmcRcEnabled(mmcMode);
805 cmd.BwdRef0.PictureFields.DW0.CompressionFormat = mmcFormat;
806
807 InitMocsParams(resourceParams, &cmd.BwdRef0.PictureFields.DW0.Value, 1, 6);
808
809 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
810 this->m_osItf,
811 this->m_currentCmdBuf,
812 &resourceParams));
813 }
814
815 if (!Mos_ResourceIsNull(params.refsDsStage1[refIdx]))
816 {
817 MOS_SURFACE details = {};
818 details.Format = Format_Invalid;
819 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnGetResourceInfo(this->m_osItf, params.refsDsStage1[refIdx], &details));
820
821 resourceParams.presResource = params.refsDsStage1[refIdx];
822 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
823 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(DsBwdRef0);
824 resourceParams.bIsWritable = false;
825 resourceParams.pdwCmd = (uint32_t *)&(cmd.DsBwdRef0.LowerAddress);
826 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
827
828 auto mmcMode = params.mmcStateDsStage1;
829
830 cmd.DsBwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnabled(mmcMode);
831 cmd.DsBwdRef0.PictureFields.DW0.CompressionType = MmcRcEnabled(mmcMode);
832
833 InitMocsParams(resourceParams, &cmd.DsBwdRef0.PictureFields.DW0.Value, 1, 6);
834
835 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
836 this->m_osItf,
837 this->m_currentCmdBuf,
838 &resourceParams));
839 }
840
841 if (!Mos_ResourceIsNull(params.refsDsStage2[refIdx]))
842 {
843 MOS_SURFACE details = {};
844 details.Format = Format_Invalid;
845 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnGetResourceInfo(this->m_osItf, params.refsDsStage2[refIdx], &details));
846
847 resourceParams.presResource = params.refsDsStage2[refIdx];
848 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
849 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(DsBwdRef04X);
850 resourceParams.bIsWritable = false;
851 resourceParams.pdwCmd = (uint32_t *)&(cmd.DsBwdRef04X.LowerAddress);
852 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
853
854 auto mmcMode = params.mmcStateDsStage2;
855
856 cmd.DsBwdRef04X.PictureFields.DW0.MemoryCompressionEnable = MmcEnabled(mmcMode);
857 cmd.DsBwdRef04X.PictureFields.DW0.CompressionType = MmcRcEnabled(mmcMode);
858
859 InitMocsParams(resourceParams, &cmd.DsBwdRef04X.PictureFields.DW0.Value, 1, 6);
860
861 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
862 this->m_osItf,
863 this->m_currentCmdBuf,
864 &resourceParams));
865 }
866 }
867
868 if (!Mos_ResourceIsNull(params.colocatedMvReadBuffer))
869 {
870 resourceParams.presResource = params.colocatedMvReadBuffer;
871 resourceParams.dwOffset = 0;
872 resourceParams.pdwCmd = (uint32_t *)&(cmd.ColocatedMv.LowerAddress);
873 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(ColocatedMv.LowerAddress);
874 resourceParams.bIsWritable = false;
875 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
876
877 cmd.ColocatedMv.PictureFields.DW0.MemoryCompressionEnable = 0;
878 cmd.ColocatedMv.PictureFields.DW0.CompressionType = 0;
879
880 InitMocsParams(resourceParams, &cmd.ColocatedMv.PictureFields.DW0.Value, 1, 6);
881
882 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
883 this->m_osItf,
884 this->m_currentCmdBuf,
885 &resourceParams));
886 }
887
888 if (!Mos_ResourceIsNull(params.colMvTempBuffer[0]))
889 {
890 resourceParams.presResource = params.colMvTempBuffer[0];
891 resourceParams.dwOffset = 0;
892 resourceParams.pdwCmd = (uint32_t *)&(cmd.ColocatedMv.LowerAddress);
893 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(ColocatedMv.LowerAddress);
894 resourceParams.bIsWritable = true;
895 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
896
897 cmd.ColocatedMv.PictureFields.DW0.MemoryCompressionEnable = 0;
898 cmd.ColocatedMv.PictureFields.DW0.CompressionType = 0;
899
900 InitMocsParams(resourceParams, &cmd.ColocatedMv.PictureFields.DW0.Value, 1, 6);
901
902 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
903 this->m_osItf,
904 this->m_currentCmdBuf,
905 &resourceParams));
906 }
907
908 if (params.surfaceDsStage1)
909 {
910 resourceParams.presResource = ¶ms.surfaceDsStage1->OsResource;
911 resourceParams.dwOffset = params.surfaceDsStage1->dwOffset;
912 resourceParams.pdwCmd = (uint32_t *)&(cmd.ScaledReferenceSurfaceStage1.LowerAddress);
913 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(ScaledReferenceSurfaceStage1.LowerAddress);
914 resourceParams.bIsWritable = true;
915 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
916
917 auto mmcMode = params.mmcStateDsStage1;
918
919 cmd.ScaledReferenceSurfaceStage1.PictureFields.DW0.MemoryCompressionEnable = MmcEnabled(mmcMode);
920 cmd.ScaledReferenceSurfaceStage1.PictureFields.DW0.CompressionType = MmcRcEnabled(mmcMode);
921
922 InitMocsParams(resourceParams, &cmd.ScaledReferenceSurfaceStage1.PictureFields.DW0.Value, 1, 6);
923
924 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
925 this->m_osItf,
926 this->m_currentCmdBuf,
927 &resourceParams));
928 }
929
930 if (params.surfaceDsStage2)
931 {
932 resourceParams.presResource = ¶ms.surfaceDsStage2->OsResource;
933 resourceParams.dwOffset = params.surfaceDsStage2->dwOffset;
934 resourceParams.pdwCmd = (uint32_t *)&(cmd.ScaledReferenceSurfaceStage2.LowerAddress);
935 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(ScaledReferenceSurfaceStage2.LowerAddress);
936 resourceParams.bIsWritable = true;
937 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
938
939 auto mmcMode = params.mmcStateDsStage2;
940
941 cmd.ScaledReferenceSurfaceStage2.PictureFields.DW0.MemoryCompressionEnable = MmcEnabled(mmcMode);
942 cmd.ScaledReferenceSurfaceStage2.PictureFields.DW0.CompressionType = MmcRcEnabled(mmcMode);
943
944 InitMocsParams(resourceParams, &cmd.ScaledReferenceSurfaceStage2.PictureFields.DW0.Value, 1, 6);
945
946 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
947 this->m_osItf,
948 this->m_currentCmdBuf,
949 &resourceParams));
950 }
951
952 if (!Mos_ResourceIsNull(params.pakObjCmdStreamOutBuffer))
953 {
954 resourceParams.presResource = params.pakObjCmdStreamOutBuffer;
955 resourceParams.dwOffset = 0;
956 resourceParams.pdwCmd = (uint32_t *)&(cmd.VdencLcuPakObjCmdBuffer.LowerAddress);
957 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(VdencLcuPakObjCmdBuffer.LowerAddress);
958 resourceParams.bIsWritable = true;
959 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
960
961 cmd.VdencLcuPakObjCmdBuffer.PictureFields.DW0.MemoryCompressionEnable = 0;
962 cmd.VdencLcuPakObjCmdBuffer.PictureFields.DW0.CompressionType = 0;
963
964 InitMocsParams(resourceParams, &cmd.VdencLcuPakObjCmdBuffer.PictureFields.DW0.Value, 1, 6);
965
966 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
967 this->m_osItf,
968 this->m_currentCmdBuf,
969 &resourceParams));
970 }
971
972 if (!Mos_ResourceIsNull(params.segmentMapStreamInBuffer))
973 {
974 resourceParams.presResource = params.segmentMapStreamInBuffer;
975 resourceParams.dwOffset = 0;
976 resourceParams.pdwCmd = (uint32_t *)&(cmd.Vp9SegmentationMapStreaminBuffer.LowerAddress);
977 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(Vp9SegmentationMapStreaminBuffer.LowerAddress);
978 resourceParams.bIsWritable = true;
979 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
980
981 InitMocsParams(resourceParams, &cmd.Vp9SegmentationMapStreaminBuffer.PictureFields.DW0.Value, 1, 6);
982
983 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
984 this->m_osItf,
985 this->m_currentCmdBuf,
986 &resourceParams));
987 }
988
989 if (!Mos_ResourceIsNull(params.segmentMapStreamOutBuffer))
990 {
991 resourceParams.presResource = params.segmentMapStreamOutBuffer;
992 resourceParams.dwOffset = 0;
993 resourceParams.pdwCmd = (uint32_t *)&(cmd.Vp9SegmentationMapStreamoutBuffer.LowerAddress);
994 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(Vp9SegmentationMapStreamoutBuffer.LowerAddress);
995 resourceParams.bIsWritable = true;
996 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
997
998 InitMocsParams(resourceParams, &cmd.Vp9SegmentationMapStreamoutBuffer.PictureFields.DW0.Value, 1, 6);
999
1000 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
1001 this->m_osItf,
1002 this->m_currentCmdBuf,
1003 &resourceParams));
1004 }
1005
1006 cmd.DW61.WeightsHistogramStreamoutOffset = 3 * MHW_CACHELINE_SIZE;
1007
1008 if (!Mos_ResourceIsNull(params.tileRowStoreBuffer))
1009 {
1010 resourceParams.presResource = params.tileRowStoreBuffer;
1011 resourceParams.dwOffset = 0;
1012 resourceParams.pdwCmd = (uint32_t *)&(cmd.VdencTileRowStoreBuffer.LowerAddress);
1013 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(VdencTileRowStoreBuffer.LowerAddress);
1014 resourceParams.bIsWritable = true;
1015 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
1016
1017 InitMocsParams(resourceParams, &cmd.VdencTileRowStoreBuffer.BufferPictureFields.DW0.Value, 1, 6);
1018
1019 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
1020 this->m_osItf,
1021 this->m_currentCmdBuf,
1022 &resourceParams));
1023 }
1024
1025 if (this->m_rowStoreCache.ipdl.enabled)
1026 {
1027 cmd.IntraPredictionRowstoreBaseAddress.BufferPictureFields.DW0.CacheSelect = cmd_t::VDENC_Surface_Control_Bits_CMD::CACHE_SELECT_UNNAMED1;
1028 cmd.IntraPredictionRowstoreBaseAddress.LowerAddress.DW0.Value = this->m_rowStoreCache.ipdl.dwAddress << 6;
1029 }
1030 else if (!Mos_ResourceIsNull(params.mfdIntraRowStoreScratchBuffer))
1031 {
1032 resourceParams.presResource = params.mfdIntraRowStoreScratchBuffer;
1033 resourceParams.dwOffset = 0;
1034 resourceParams.pdwCmd = (uint32_t *)&(cmd.IntraPredictionRowstoreBaseAddress);
1035 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(IntraPredictionRowstoreBaseAddress);
1036 resourceParams.bIsWritable = true;
1037 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
1038
1039 cmd.IntraPredictionRowstoreBaseAddress.BufferPictureFields.DW0.MemoryCompressionEnable = 0;
1040
1041 InitMocsParams(resourceParams, &cmd.IntraPredictionRowstoreBaseAddress.BufferPictureFields.DW0.Value, 1, 6);
1042
1043 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
1044 this->m_osItf,
1045 this->m_currentCmdBuf,
1046 &resourceParams));
1047 }
1048
1049 if (!Mos_ResourceIsNull(params.cumulativeCuCountStreamOutBuffer))
1050 {
1051 resourceParams.presResource = params.cumulativeCuCountStreamOutBuffer;
1052 resourceParams.dwOffset = 0;
1053 resourceParams.pdwCmd = (uint32_t *)&(cmd.VdencCumulativeCuCountStreamoutSurface.LowerAddress);
1054 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(VdencCumulativeCuCountStreamoutSurface.LowerAddress);
1055 resourceParams.bIsWritable = true;
1056 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
1057
1058 InitMocsParams(resourceParams, &cmd.VdencCumulativeCuCountStreamoutSurface.PictureFields.DW0.Value, 1, 6);
1059
1060 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
1061 this->m_osItf,
1062 this->m_currentCmdBuf,
1063 &resourceParams));
1064 }
1065
1066 if (!Mos_ResourceIsNull(params.colocatedMvWriteBuffer))
1067 {
1068 resourceParams.presResource = params.colocatedMvWriteBuffer;
1069 resourceParams.dwOffset = 0;
1070 resourceParams.pdwCmd = (uint32_t *)&(cmd.ColocatedMvAvcWriteBuffer.LowerAddress);
1071 resourceParams.dwLocationInCmd = _MHW_CMD_DW_LOCATION(ColocatedMvAvcWriteBuffer.LowerAddress);
1072 resourceParams.bIsWritable = true;
1073 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
1074
1075 cmd.ColocatedMvAvcWriteBuffer.PictureFields.DW0.MemoryCompressionEnable = 0;
1076 cmd.ColocatedMvAvcWriteBuffer.PictureFields.DW0.CompressionType = 0;
1077
1078 InitMocsParams(resourceParams, &cmd.ColocatedMvAvcWriteBuffer.PictureFields.DW0.Value, 1, 6);
1079
1080 MHW_CHK_STATUS_RETURN(this->AddResourceToCmd(
1081 this->m_osItf,
1082 this->m_currentCmdBuf,
1083 &resourceParams));
1084 }
1085
1086 return MOS_STATUS_SUCCESS;
1087 }
1088
_MHW_SETCMD_OVERRIDE_DECL(VDENC_WEIGHTSOFFSETS_STATE)1089 _MHW_SETCMD_OVERRIDE_DECL(VDENC_WEIGHTSOFFSETS_STATE)
1090 {
1091 _MHW_SETCMD_CALLBASE(VDENC_WEIGHTSOFFSETS_STATE);
1092
1093 #define DO_FIELDS() \
1094 DO_FIELD(DW1, WeightsForwardReference0, Clip3(-128, 127, params.weightsLuma[0][0] + params.denomLuma)); \
1095 DO_FIELD(DW1, OffsetForwardReference0, params.offsetsLuma[0][0]); \
1096 DO_FIELD(DW1, WeightsForwardReference1, Clip3(-128, 127, params.weightsLuma[0][1] + params.denomLuma)); \
1097 DO_FIELD(DW1, OffsetForwardReference1, params.offsetsLuma[0][1]); \
1098 \
1099 DO_FIELD(DW2, WeightsForwardReference2, Clip3(-128, 127, params.weightsLuma[0][2] + params.denomLuma)); \
1100 DO_FIELD(DW2, OffsetForwardReference2, params.offsetsLuma[0][2]); \
1101 DO_FIELD(DW2, WeightsBackwardReference0, Clip3(-128, 127, params.weightsLuma[1][0] + params.denomLuma)); \
1102 DO_FIELD(DW2, OffsetBackwardReference0, params.offsetsLuma[1][0]); \
1103 \
1104 DO_FIELD(DW3, CbWeightsForwardReference0, Clip3(-128, 127, params.weightsChroma[0][0][0] + params.denomChroma)); \
1105 DO_FIELD(DW3, CbOffsetForwardReference0, params.offsetsChroma[0][0][0]); \
1106 DO_FIELD(DW3, CbWeightsForwardReference1, Clip3(-128, 127, params.weightsChroma[0][1][0] + params.denomChroma)); \
1107 DO_FIELD(DW3, CbOffsetForwardReference1, params.offsetsChroma[0][1][0]); \
1108 \
1109 DO_FIELD(DW4, CbWeightsForwardReference2, Clip3(-128, 127, params.weightsChroma[0][2][0] + params.denomChroma)); \
1110 DO_FIELD(DW4, CbOffsetForwardReference2, params.offsetsChroma[0][2][0]); \
1111 DO_FIELD(DW4, CbWeightsBackwardReference0, Clip3(-128, 127, params.weightsChroma[1][0][0] + params.denomChroma)); \
1112 DO_FIELD(DW4, CbOffsetBackwardReference0, params.offsetsChroma[1][0][0]); \
1113 \
1114 DO_FIELD(DW5, CrWeightsForwardReference0, Clip3(-128, 127, params.weightsChroma[0][0][1] + params.denomChroma)); \
1115 DO_FIELD(DW5, CrOffsetForwardReference0, params.offsetsChroma[0][0][1]); \
1116 DO_FIELD(DW5, CrWeightsForwardReference1, Clip3(-128, 127, params.weightsChroma[0][1][1] + params.denomChroma)); \
1117 DO_FIELD(DW5, CrOffsetForwardReference1, params.offsetsChroma[0][1][1]); \
1118 \
1119 DO_FIELD(DW6, CrWeightsForwardReference2, Clip3(-128, 127, params.weightsChroma[0][2][1] + params.denomChroma)); \
1120 DO_FIELD(DW6, CrOffsetForwardReference2, params.offsetsChroma[0][2][1]); \
1121 DO_FIELD(DW6, CrWeightsBackwardReference0, Clip3(-128, 127, params.weightsChroma[1][0][1] + params.denomChroma)); \
1122 DO_FIELD(DW6, CrOffsetBackwardReference0, params.offsetsChroma[1][0][1])
1123
1124 #include "mhw_hwcmd_process_cmdfields.h"
1125 }
1126
_MHW_SETCMD_OVERRIDE_DECL(VDENC_HEVC_VP9_TILE_SLICE_STATE)1127 _MHW_SETCMD_OVERRIDE_DECL(VDENC_HEVC_VP9_TILE_SLICE_STATE)
1128 {
1129 _MHW_SETCMD_CALLBASE(VDENC_HEVC_VP9_TILE_SLICE_STATE);
1130
1131 #define DO_FIELDS() \
1132 DO_FIELD(DW3, NumParEngine, params.numPipe); \
1133 DO_FIELD(DW3, TileNumber, params.tileId); \
1134 DO_FIELD(DW3, TileRowStoreSelect, params.tileRowStoreSelect); \
1135 DO_FIELD(DW3, Log2WeightDenomLuma, params.log2WeightDenomLuma); \
1136 DO_FIELD(DW3, HevcVp9Log2WeightDenomLuma, params.hevcVp9Log2WeightDenomLuma); \
1137 DO_FIELD(DW3, Log2WeightDenomChroma, params.log2WeightDenomChroma); \
1138 \
1139 DO_FIELD(DW4, TileStartCtbX, params.tileStartLCUX *params.ctbSize); \
1140 DO_FIELD(DW4, TileStartCtbY, params.tileStartLCUY *params.ctbSize); \
1141 \
1142 DO_FIELD(DW5, TileWidth, (params.tileWidth >= 256 ? MOS_ALIGN_CEIL(params.tileWidth, 8) : params.tileWidth) - 1); \
1143 DO_FIELD(DW5, TileHeight, (params.tileHeight >= 128 ? MOS_ALIGN_CEIL(params.tileHeight, 8) : params.tileHeight) - 1); \
1144 \
1145 DO_FIELD(DW6, StreaminOffsetEnable, params.tileEnable); \
1146 DO_FIELD(DW6, TileStreaminOffset, params.tileStreamInOffset); \
1147 \
1148 DO_FIELD(DW7, RowStoreOffsetEnable, cmd.DW4.TileStartCtbY == 0 ? params.tileEnable : 0); \
1149 DO_FIELD(DW7, TileRowstoreOffset, params.tileRowstoreOffset); \
1150 \
1151 DO_FIELD(DW8, TileStreamoutOffsetEnable, params.tileEnable); \
1152 DO_FIELD(DW8, TileStreamoutOffset, params.tileId * 19); \
1153 \
1154 DO_FIELD(DW9, LcuStreamOutOffsetEnable, params.tileEnable); \
1155 DO_FIELD(DW9, TileLcuStreamOutOffset, params.tileLCUStreamOutOffset); \
1156 \
1157 DO_FIELD(DW11, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW11_BIT8, params.VdencHEVCVP9TileSlicePar0); \
1158 \
1159 DO_FIELD(DW12, IbcControl, params.ibcControl); \
1160 DO_FIELD(DW12, PaletteModeEnable, params.paletteModeEnable); \
1161 DO_FIELD(DW12, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW12_BIT24, params.VdencHEVCVP9TileSlicePar1); \
1162 DO_FIELD(DW12, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW12_BIT0, params.VdencHEVCVP9TileSlicePar5); \
1163 DO_FIELD(DW12, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW12_BIT18, params.VdencHEVCVP9TileSlicePar2); \
1164 DO_FIELD(DW12, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW12_BIT16, params.VdencHEVCVP9TileSlicePar3); \
1165 DO_FIELD(DW12, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW12_BIT8, params.VdencHEVCVP9TileSlicePar4); \
1166 \
1167 DO_FIELD(DW13, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW13_BIT16, params.VdencHEVCVP9TileSlicePar6); \
1168 DO_FIELD(DW13, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW13_BIT0, params.VdencHEVCVP9TileSlicePar7); \
1169 \
1170 DO_FIELD(DW14, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW14_BIT8, params.VdencHEVCVP9TileSlicePar8); \
1171 DO_FIELD(DW14, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW14_BIT0, params.VdencHEVCVP9TileSlicePar9); \
1172 DO_FIELD(DW14, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW14_BIT16, params.VdencHEVCVP9TileSlicePar10); \
1173 DO_FIELD(DW14, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW14_BIT31, params.VdencHEVCVP9TileSlicePar11); \
1174 DO_FIELD(DW14, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW14_BIT24, params.VdencHEVCVP9TileSlicePar12); \
1175 DO_FIELD(DW14, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW14_BIT21, params.VdencHEVCVP9TileSlicePar13); \
1176 \
1177 DO_FIELD(DW15, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW15_BIT0, params.VdencHEVCVP9TileSlicePar15); \
1178 DO_FIELD(DW15, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW15_BIT16, params.VdencHEVCVP9TileSlicePar14); \
1179 \
1180 DO_FIELD(DW16, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW16_BIT31, params.VdencHEVCVP9TileSlicePar16[2]); \
1181 DO_FIELD(DW16, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW16_BIT30, params.VdencHEVCVP9TileSlicePar16[1]); \
1182 DO_FIELD(DW16, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW16_BIT29, params.VdencHEVCVP9TileSlicePar16[0]); \
1183 DO_FIELD(DW16, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW16_BIT24, params.VdencHEVCVP9TileSlicePar23); \
1184 DO_FIELD(DW16, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW16_BIT16, params.VdencHEVCVP9TileSlicePar17[2]); \
1185 DO_FIELD(DW16, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW16_BIT8, params.VdencHEVCVP9TileSlicePar17[1]); \
1186 DO_FIELD(DW16, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW16_BIT0, params.VdencHEVCVP9TileSlicePar17[0]); \
1187 \
1188 DO_FIELD(DW17, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW17_BIT0, params.VdencHEVCVP9TileSlicePar18); \
1189 DO_FIELD(DW17, VDENC_HEVC_VP9_TILE_SLICE_STATE_DW17_BIT6, params.VdencHEVCVP9TileSlicePar19);
1190
1191 #include "mhw_hwcmd_process_cmdfields.h"
1192 }
1193
_MHW_SETCMD_OVERRIDE_DECL(VDENC_WALKER_STATE)1194 _MHW_SETCMD_OVERRIDE_DECL(VDENC_WALKER_STATE)
1195 {
1196 _MHW_SETCMD_CALLBASE(VDENC_WALKER_STATE);
1197
1198 #define DO_FIELDS() \
1199 DO_FIELD(DW1, FirstSuperSlice, params.firstSuperSlice); \
1200 DO_FIELD(DW1, MbLcuStartXPosition, params.tileSliceStartLcuMbX); \
1201 DO_FIELD(DW1, MbLcuStartYPosition, params.tileSliceStartLcuMbY); \
1202 \
1203 DO_FIELD(DW2, NextsliceMbLcuStartXPosition, params.nextTileSliceStartLcuMbX); \
1204 DO_FIELD(DW2, NextsliceMbStartYPosition, params.nextTileSliceStartLcuMbY)
1205
1206 #include "mhw_hwcmd_process_cmdfields.h"
1207 }
1208
_MHW_SETCMD_OVERRIDE_DECL(VD_PIPELINE_FLUSH)1209 _MHW_SETCMD_OVERRIDE_DECL(VD_PIPELINE_FLUSH)
1210 {
1211 _MHW_SETCMD_CALLBASE(VD_PIPELINE_FLUSH);
1212
1213 #define DO_FIELDS() \
1214 DO_FIELD(DW1, HevcPipelineDone, params.waitDoneHEVC); \
1215 DO_FIELD(DW1, VdencPipelineDone, params.waitDoneVDENC); \
1216 DO_FIELD(DW1, MflPipelineDone, params.waitDoneMFL); \
1217 DO_FIELD(DW1, MfxPipelineDone, params.waitDoneMFX); \
1218 DO_FIELD(DW1, VdCommandMessageParserDone, params.waitDoneVDCmdMsgParser); \
1219 DO_FIELD(DW1, HevcPipelineCommandFlush, params.flushHEVC); \
1220 DO_FIELD(DW1, VdencPipelineCommandFlush, params.flushVDENC); \
1221 DO_FIELD(DW1, MflPipelineCommandFlush, params.flushMFL); \
1222 DO_FIELD(DW1, MfxPipelineCommandFlush, params.flushMFX)
1223
1224 #define DO_FIELDS_EXT() \
1225 __MHW_VDBOX_VDENC_WRAPPER_EXT(VD_PIPELINE_FLUSH_IMPL_EXT)
1226
1227 #include "mhw_hwcmd_process_cmdfields.h"
1228 }
1229
_MHW_SETCMD_OVERRIDE_DECL(VDENC_AVC_SLICE_STATE)1230 _MHW_SETCMD_OVERRIDE_DECL(VDENC_AVC_SLICE_STATE)
1231 {
1232 _MHW_SETCMD_CALLBASE(VDENC_AVC_SLICE_STATE);
1233
1234 #define DO_FIELDS() \
1235 DO_FIELD(DW1, RoundIntra, params.roundIntra); \
1236 DO_FIELD(DW1, RoundIntraEnable, params.roundIntraEnable); \
1237 DO_FIELD(DW1, RoundInter, params.roundInter); \
1238 DO_FIELD(DW1, RoundInterEnable, params.roundInterEnable); \
1239 \
1240 DO_FIELD(DW3, Log2WeightDenomLuma, params.log2WeightDenomLuma)
1241 #include "mhw_hwcmd_process_cmdfields.h"
1242 }
1243
_MHW_SETCMD_OVERRIDE_DECL(VDENC_CMD1)1244 _MHW_SETCMD_OVERRIDE_DECL(VDENC_CMD1)
1245 {
1246 _MHW_SETCMD_CALLBASE(VDENC_CMD1);
1247
1248 #define DO_FIELDS() \
1249 DO_FIELD(DW1, VDENC_CMD1_DW1_BIT0, params.vdencCmd1Par2[0]); \
1250 DO_FIELD(DW1, VDENC_CMD1_DW1_BIT8, params.vdencCmd1Par2[1]); \
1251 DO_FIELD(DW1, VDENC_CMD1_DW1_BIT16, params.vdencCmd1Par2[2]); \
1252 DO_FIELD(DW1, VDENC_CMD1_DW1_BIT24, params.vdencCmd1Par2[3]); \
1253 \
1254 DO_FIELD(DW2, VDENC_CMD1_DW2_BIT0, params.vdencCmd1Par2[4]); \
1255 DO_FIELD(DW2, VDENC_CMD1_DW2_BIT8, params.vdencCmd1Par2[5]); \
1256 DO_FIELD(DW2, VDENC_CMD1_DW2_BIT16, params.vdencCmd1Par2[6]); \
1257 DO_FIELD(DW2, VDENC_CMD1_DW2_BIT24, params.vdencCmd1Par2[7]); \
1258 \
1259 DO_FIELD(DW3, VDENC_CMD1_DW3_BIT0, params.vdencCmd1Par3[0]); \
1260 DO_FIELD(DW3, VDENC_CMD1_DW3_BIT8, params.vdencCmd1Par3[1]); \
1261 DO_FIELD(DW3, VDENC_CMD1_DW3_BIT16, params.vdencCmd1Par3[2]); \
1262 DO_FIELD(DW3, VDENC_CMD1_DW3_BIT24, params.vdencCmd1Par3[3]); \
1263 \
1264 DO_FIELD(DW4, VDENC_CMD1_DW4_BIT0, params.vdencCmd1Par3[4]); \
1265 DO_FIELD(DW4, VDENC_CMD1_DW4_BIT8, params.vdencCmd1Par3[5]); \
1266 DO_FIELD(DW4, VDENC_CMD1_DW4_BIT16, params.vdencCmd1Par3[6]); \
1267 DO_FIELD(DW4, VDENC_CMD1_DW4_BIT24, params.vdencCmd1Par3[7]); \
1268 \
1269 DO_FIELD(DW5, VDENC_CMD1_DW5_BIT0, params.vdencCmd1Par3[8]); \
1270 DO_FIELD(DW5, VDENC_CMD1_DW5_BIT8, params.vdencCmd1Par3[9]); \
1271 DO_FIELD(DW5, VDENC_CMD1_DW5_BIT16, params.vdencCmd1Par3[10]); \
1272 DO_FIELD(DW5, VDENC_CMD1_DW5_BIT24, params.vdencCmd1Par3[11]); \
1273 \
1274 DO_FIELD(DW6, VDENC_CMD1_DW6_BIT0, params.vdencCmd1Par4[0]); \
1275 DO_FIELD(DW6, VDENC_CMD1_DW6_BIT8, params.vdencCmd1Par4[1]); \
1276 DO_FIELD(DW6, VDENC_CMD1_DW6_BIT16, params.vdencCmd1Par4[2]); \
1277 DO_FIELD(DW6, VDENC_CMD1_DW6_BIT24, params.vdencCmd1Par4[3]); \
1278 \
1279 DO_FIELD(DW7, VDENC_CMD1_DW7_BIT0, params.vdencCmd1Par4[4]); \
1280 DO_FIELD(DW7, VDENC_CMD1_DW7_BIT8, params.vdencCmd1Par4[5]); \
1281 DO_FIELD(DW7, VDENC_CMD1_DW7_BIT16, params.vdencCmd1Par4[6]); \
1282 DO_FIELD(DW7, VDENC_CMD1_DW7_BIT24, params.vdencCmd1Par4[7]); \
1283 \
1284 DO_FIELD(DW8, VDENC_CMD1_DW8_BIT0, params.vdencCmd1Par4[8]); \
1285 DO_FIELD(DW8, VDENC_CMD1_DW8_BIT8, params.vdencCmd1Par4[9]); \
1286 DO_FIELD(DW8, VDENC_CMD1_DW8_BIT16, params.vdencCmd1Par4[10]); \
1287 DO_FIELD(DW8, VDENC_CMD1_DW8_BIT24, params.vdencCmd1Par4[11]); \
1288 \
1289 DO_FIELD(DW9, VDENC_CMD1_DW9_BIT0, params.vdencCmd1Par5); \
1290 DO_FIELD(DW9, VDENC_CMD1_DW9_BIT8, params.vdencCmd1Par6); \
1291 DO_FIELD(DW9, VDENC_CMD1_DW9_BIT16, params.vdencCmd1Par7); \
1292 \
1293 DO_FIELD(DW10, VDENC_CMD1_DW10_BIT0, params.vdencCmd1Par8[0]); \
1294 DO_FIELD(DW10, VDENC_CMD1_DW10_BIT8, params.vdencCmd1Par12[0]); \
1295 DO_FIELD(DW10, VDENC_CMD1_DW10_BIT16, params.vdencCmd1Par9[0]); \
1296 DO_FIELD(DW10, VDENC_CMD1_DW10_BIT24, params.vdencCmd1Par13[0]); \
1297 \
1298 DO_FIELD(DW11, VDENC_CMD1_DW11_BIT0, params.vdencCmd1Par10[0]); \
1299 DO_FIELD(DW11, VDENC_CMD1_DW11_BIT8, params.vdencCmd1Par14[0]); \
1300 DO_FIELD(DW11, VDENC_CMD1_DW11_BIT16, params.vdencCmd1Par11[0]); \
1301 DO_FIELD(DW11, VDENC_CMD1_DW11_BIT24, params.vdencCmd1Par15[0]); \
1302 \
1303 DO_FIELD(DW12, VDENC_CMD1_DW12_BIT0, params.vdencCmd1Par16); \
1304 DO_FIELD(DW12, VDENC_CMD1_DW12_BIT8, params.vdencCmd1Par17); \
1305 DO_FIELD(DW12, VDENC_CMD1_DW12_BIT16, params.vdencCmd1Par18); \
1306 DO_FIELD(DW12, VDENC_CMD1_DW12_BIT24, params.vdencCmd1Par19); \
1307 \
1308 DO_FIELD(DW13, VDENC_CMD1_DW13_BIT0, params.vdencCmd1Par20); \
1309 DO_FIELD(DW13, VDENC_CMD1_DW13_BIT8, params.vdencCmd1Par21); \
1310 DO_FIELD(DW13, VDENC_CMD1_DW13_BIT16, params.vdencCmd1Par22); \
1311 DO_FIELD(DW13, VDENC_CMD1_DW13_BIT24, params.vdencCmd1Par23); \
1312 \
1313 DO_FIELD(DW14, VDENC_CMD1_DW14_BIT0, params.vdencCmd1Par24); \
1314 DO_FIELD(DW14, VDENC_CMD1_DW14_BIT8, params.vdencCmd1Par25); \
1315 DO_FIELD(DW14, VDENC_CMD1_DW14_BIT16, params.vdencCmd1Par26); \
1316 DO_FIELD(DW14, VDENC_CMD1_DW14_BIT24, params.vdencCmd1Par27); \
1317 \
1318 DO_FIELD(DW15, VDENC_CMD1_DW15_BIT0, params.vdencCmd1Par28); \
1319 DO_FIELD(DW15, VDENC_CMD1_DW15_BIT8, params.vdencCmd1Par29); \
1320 DO_FIELD(DW15, VDENC_CMD1_DW15_BIT16, params.vdencCmd1Par30); \
1321 DO_FIELD(DW15, VDENC_CMD1_DW15_BIT24, params.vdencCmd1Par31); \
1322 \
1323 DO_FIELD(DW16, VDENC_CMD1_DW16_BIT0, params.vdencCmd1Par32); \
1324 DO_FIELD(DW16, VDENC_CMD1_DW16_BIT8, params.vdencCmd1Par33); \
1325 DO_FIELD(DW16, VDENC_CMD1_DW16_BIT16, params.vdencCmd1Par34); \
1326 DO_FIELD(DW16, VDENC_CMD1_DW16_BIT24, params.vdencCmd1Par35); \
1327 \
1328 DO_FIELD(DW17, VDENC_CMD1_DW17_BIT0, params.vdencCmd1Par36); \
1329 DO_FIELD(DW17, VDENC_CMD1_DW17_BIT8, params.vdencCmd1Par37); \
1330 DO_FIELD(DW17, VDENC_CMD1_DW17_BIT16, params.vdencCmd1Par38); \
1331 DO_FIELD(DW17, VDENC_CMD1_DW17_BIT24, params.vdencCmd1Par39); \
1332 \
1333 DO_FIELD(DW18, VDENC_CMD1_DW18_BIT0, params.vdencCmd1Par40); \
1334 DO_FIELD(DW18, VDENC_CMD1_DW18_BIT8, params.vdencCmd1Par41); \
1335 DO_FIELD(DW18, VDENC_CMD1_DW18_BIT16, params.vdencCmd1Par42); \
1336 DO_FIELD(DW18, VDENC_CMD1_DW18_BIT24, params.vdencCmd1Par43); \
1337 \
1338 DO_FIELD(DW19, VDENC_CMD1_DW19_BIT8, params.vdencCmd1Par44); \
1339 DO_FIELD(DW19, VDENC_CMD1_DW19_BIT16, params.vdencCmd1Par45); \
1340 DO_FIELD(DW19, VDENC_CMD1_DW19_BIT24, params.vdencCmd1Par46); \
1341 \
1342 DO_FIELD(DW20, VDENC_CMD1_DW20_BIT0, params.vdencCmd1Par47); \
1343 DO_FIELD(DW20, VDENC_CMD1_DW20_BIT8, params.vdencCmd1Par48); \
1344 DO_FIELD(DW20, VDENC_CMD1_DW20_BIT16, params.vdencCmd1Par49); \
1345 DO_FIELD(DW20, VDENC_CMD1_DW20_BIT24, params.vdencCmd1Par50); \
1346 \
1347 DO_FIELD(DW21, VDENC_CMD1_DW21_BIT0, params.vdencCmd1Par51); \
1348 DO_FIELD(DW21, VDENC_CMD1_DW21_BIT8, params.vdencCmd1Par52); \
1349 DO_FIELD(DW21, VDENC_CMD1_DW21_BIT16, params.vdencCmd1Par53); \
1350 DO_FIELD(DW21, VDENC_CMD1_DW21_BIT24, params.vdencCmd1Par54); \
1351 \
1352 DO_FIELD(DW22, VDENC_CMD1_DW22_BIT0, params.vdencCmd1Par0); \
1353 DO_FIELD(DW22, VDENC_CMD1_DW22_BIT16, params.vdencCmd1Par1); \
1354 \
1355 DO_FIELD(DW23, VDENC_CMD1_DW23_BIT0, params.vdencCmd1Par55); \
1356 DO_FIELD(DW23, VDENC_CMD1_DW23_BIT8, params.vdencCmd1Par56); \
1357 DO_FIELD(DW23, VDENC_CMD1_DW23_BIT16, params.vdencCmd1Par57); \
1358 DO_FIELD(DW23, VDENC_CMD1_DW23_BIT24, params.vdencCmd1Par58); \
1359 \
1360 DO_FIELD(DW24, VDENC_CMD1_DW24_BIT0, params.vdencCmd1Par59); \
1361 DO_FIELD(DW24, VDENC_CMD1_DW24_BIT8, params.vdencCmd1Par60); \
1362 DO_FIELD(DW24, VDENC_CMD1_DW24_BIT16, params.vdencCmd1Par61); \
1363 DO_FIELD(DW24, VDENC_CMD1_DW24_BIT24, params.vdencCmd1Par62); \
1364 \
1365 DO_FIELD(DW25, VDENC_CMD1_DW25_BIT0, params.vdencCmd1Par63); \
1366 DO_FIELD(DW25, VDENC_CMD1_DW25_BIT8, params.vdencCmd1Par64); \
1367 DO_FIELD(DW25, VDENC_CMD1_DW25_BIT16, params.vdencCmd1Par65); \
1368 DO_FIELD(DW25, VDENC_CMD1_DW25_BIT24, params.vdencCmd1Par66); \
1369 \
1370 DO_FIELD(DW26, VDENC_CMD1_DW26_BIT0, params.vdencCmd1Par67); \
1371 DO_FIELD(DW26, VDENC_CMD1_DW26_BIT8, params.vdencCmd1Par68); \
1372 DO_FIELD(DW26, VDENC_CMD1_DW26_BIT16, params.vdencCmd1Par69); \
1373 DO_FIELD(DW26, VDENC_CMD1_DW26_BIT24, params.vdencCmd1Par70); \
1374 \
1375 DO_FIELD(DW27, VDENC_CMD1_DW27_BIT0, params.vdencCmd1Par71); \
1376 DO_FIELD(DW27, VDENC_CMD1_DW27_BIT8, params.vdencCmd1Par72); \
1377 DO_FIELD(DW27, VDENC_CMD1_DW27_BIT16, params.vdencCmd1Par73); \
1378 DO_FIELD(DW27, VDENC_CMD1_DW27_BIT24, params.vdencCmd1Par74); \
1379 \
1380 DO_FIELD(DW28, VDENC_CMD1_DW28_BIT0, params.vdencCmd1Par75); \
1381 DO_FIELD(DW28, VDENC_CMD1_DW28_BIT8, params.vdencCmd1Par76); \
1382 DO_FIELD(DW28, VDENC_CMD1_DW28_BIT16, params.vdencCmd1Par77); \
1383 DO_FIELD(DW28, VDENC_CMD1_DW28_BIT24, params.vdencCmd1Par78); \
1384 \
1385 DO_FIELD(DW29, VDENC_CMD1_DW29_BIT0, params.vdencCmd1Par79); \
1386 DO_FIELD(DW29, VDENC_CMD1_DW29_BIT8, params.vdencCmd1Par80); \
1387 DO_FIELD(DW29, VDENC_CMD1_DW29_BIT16, params.vdencCmd1Par81); \
1388 DO_FIELD(DW29, VDENC_CMD1_DW29_BIT24, params.vdencCmd1Par82); \
1389 \
1390 DO_FIELD(DW30, VDENC_CMD1_DW30_BIT0, params.vdencCmd1Par83); \
1391 DO_FIELD(DW30, VDENC_CMD1_DW30_BIT8, params.vdencCmd1Par84); \
1392 DO_FIELD(DW30, VDENC_CMD1_DW30_BIT16, params.vdencCmd1Par85); \
1393 DO_FIELD(DW30, VDENC_CMD1_DW30_BIT24, params.vdencCmd1Par86); \
1394 \
1395 DO_FIELD(DW31, VDENC_CMD1_DW31_BIT0, params.vdencCmd1Par87); \
1396 DO_FIELD(DW31, VDENC_CMD1_DW31_BIT8, params.vdencCmd1Par88); \
1397 DO_FIELD(DW31, VDENC_CMD1_DW31_BIT16, params.vdencCmd1Par89); \
1398 \
1399 DO_FIELD(DW32, VDENC_CMD1_DW32_BIT0, params.vdencCmd1Par90); \
1400 DO_FIELD(DW32, VDENC_CMD1_DW32_BIT8, params.vdencCmd1Par91); \
1401 DO_FIELD(DW32, VDENC_CMD1_DW32_BIT16, params.vdencCmd1Par92)
1402
1403 #include "mhw_hwcmd_process_cmdfields.h"
1404 }
1405
_MHW_SETCMD_OVERRIDE_DECL(VDENC_CMD2)1406 _MHW_SETCMD_OVERRIDE_DECL(VDENC_CMD2)
1407 {
1408 _MHW_SETCMD_CALLBASE(VDENC_CMD2);
1409
1410 #define DO_FIELDS() \
1411 DO_FIELD(DW1, FrameWidthInPixelsMinusOne, MOS_ALIGN_CEIL(params.width, 8) - 1); \
1412 DO_FIELD(DW1, FrameHeightInPixelsMinusOne, MOS_ALIGN_CEIL(params.height, 8) - 1); \
1413 \
1414 DO_FIELD(DW2, PictureType, params.pictureType); \
1415 DO_FIELD(DW2, TemporalMvpEnableFlag, params.temporalMvp); \
1416 DO_FIELD(DW2, Collocatedfroml0Flag, params.collocatedFromL0); \
1417 DO_FIELD(DW2, LongTermReferenceFlagsL0, params.longTermReferenceFlagsL0); \
1418 DO_FIELD(DW2, LongTermReferenceFlagsL1, params.longTermReferenceFlagsL1); \
1419 DO_FIELD(DW2, TransformSkip, params.transformSkip); \
1420 DO_FIELD(DW2, ConstrainedIntraPredFlag, params.constrainedIntraPred); \
1421 \
1422 DO_FIELD(DW3, FwdPocNumberForRefid0InL0, params.pocL0Ref0); \
1423 DO_FIELD(DW3, BwdPocNumberForRefid0InL1, params.pocL1Ref0); \
1424 DO_FIELD(DW3, PocNumberForRefid1InL0, params.pocL0Ref1); \
1425 DO_FIELD(DW3, PocNumberForRefid1InL1, params.pocL1Ref1); \
1426 \
1427 DO_FIELD(DW4, PocNumberForRefid2InL0, params.pocL0Ref2); \
1428 DO_FIELD(DW4, PocNumberForRefid2InL1, params.pocL1Ref2); \
1429 DO_FIELD(DW4, PocNumberForRefid3InL0, params.pocL0Ref3); \
1430 DO_FIELD(DW4, PocNumberForRefid3InL1, params.pocL1Ref3); \
1431 \
1432 DO_FIELD(DW5, StreaminRoiEnable, params.roiStreamIn); \
1433 DO_FIELD(DW5, NumRefIdxL0Minus1, params.numRefL0 > 0 ? params.numRefL0 - 1 : 0); \
1434 DO_FIELD(DW5, NumRefIdxL1Minus1, params.numRefL1 > 0 ? params.numRefL1 - 1 : 0); \
1435 DO_FIELD(DW5, SubPelMode, params.subPelMode); \
1436 \
1437 DO_FIELD(DW7, SegmentationEnable, params.segmentation); \
1438 DO_FIELD(DW7, SegmentationMapTemporalPredictionEnable, params.segmentationTemporal); \
1439 DO_FIELD(DW7, TilingEnable, params.tiling); \
1440 DO_FIELD(DW7, VdencStreamInEnable, params.vdencStreamIn); \
1441 DO_FIELD(DW7, PakOnlyMultiPassEnable, params.pakOnlyMultiPass); \
1442 \
1443 DO_FIELD(DW11, FwdRef0RefPic, params.frameIdxL0Ref0); \
1444 DO_FIELD(DW11, FwdRef1RefPic, params.frameIdxL0Ref1); \
1445 DO_FIELD(DW11, FwdRef2RefPic, params.frameIdxL0Ref2); \
1446 DO_FIELD(DW11, BwdRef0RefPic, params.frameIdxL1Ref0); \
1447 \
1448 DO_FIELD(DW16, MinQp, params.minQp); \
1449 DO_FIELD(DW16, MaxQp, params.maxQp); \
1450 \
1451 DO_FIELD(DW17, TemporalMVEnableForIntegerSearch, params.temporalMvEnableForIntegerSearch); \
1452 \
1453 DO_FIELD(DW21, IntraRefreshPos, params.intraRefreshPos); \
1454 DO_FIELD(DW21, IntraRefreshMBSizeMinusOne, params.intraRefreshMbSizeMinus1); \
1455 DO_FIELD(DW21, IntraRefreshMode, params.intraRefreshMode); \
1456 DO_FIELD(DW21, IntraRefreshEnable, params.intraRefresh); \
1457 DO_FIELD(DW21, QpAdjustmentForRollingI, params.qpAdjustmentForRollingI); \
1458 \
1459 DO_FIELD(DW24, QpForSeg0, params.qpForSegs[0]); \
1460 DO_FIELD(DW24, QpForSeg1, params.qpForSegs[1]); \
1461 DO_FIELD(DW24, QpForSeg2, params.qpForSegs[2]); \
1462 DO_FIELD(DW24, QpForSeg3, params.qpForSegs[3]); \
1463 \
1464 DO_FIELD(DW25, QpForSeg4, params.qpForSegs[4]); \
1465 DO_FIELD(DW25, QpForSeg5, params.qpForSegs[5]); \
1466 DO_FIELD(DW25, QpForSeg6, params.qpForSegs[6]); \
1467 DO_FIELD(DW25, QpForSeg7, params.qpForSegs[7]); \
1468 \
1469 DO_FIELD(DW26, Vp9DynamicSliceEnable, params.vp9DynamicSlice); \
1470 \
1471 DO_FIELD(DW27, QpPrimeYDc, params.qpPrimeYDc); \
1472 DO_FIELD(DW27, QpPrimeYAc, params.qpPrimeYAc); \
1473 \
1474 DO_FIELD(DW36, IntraRefreshBoundaryRef0, params.intraRefreshBoundary[0]); \
1475 DO_FIELD(DW36, IntraRefreshBoundaryRef1, params.intraRefreshBoundary[1]); \
1476 DO_FIELD(DW36, IntraRefreshBoundaryRef2, params.intraRefreshBoundary[2]); \
1477 \
1478 DO_FIELD(DW61, Av1L0RefID0, params.av1RefId[0][0]); \
1479 DO_FIELD(DW61, Av1L1RefID0, params.av1RefId[1][0]); \
1480 DO_FIELD(DW61, Av1L0RefID1, params.av1RefId[0][1]); \
1481 DO_FIELD(DW61, Av1L1RefID1, params.av1RefId[1][1]); \
1482 DO_FIELD(DW61, Av1L0RefID2, params.av1RefId[0][2]); \
1483 DO_FIELD(DW61, Av1L1RefID2, params.av1RefId[1][2]); \
1484 DO_FIELD(DW61, Av1L0RefID3, params.av1RefId[0][3]); \
1485 DO_FIELD(DW61, Av1L1RefID3, params.av1RefId[1][3])
1486
1487 #define DO_FIELDS_EXT() \
1488 __MHW_VDBOX_VDENC_WRAPPER_EXT(VDENC_CMD2_IMPL_EXT)
1489
1490 #include "mhw_hwcmd_process_cmdfields.h"
1491 }
1492
_MHW_SETCMD_OVERRIDE_DECL(VDENC_CMD3)1493 _MHW_SETCMD_OVERRIDE_DECL(VDENC_CMD3)
1494 {
1495 _MHW_SETCMD_CALLBASE(VDENC_CMD3);
1496
1497 for (auto i = 0; i < 12; i++)
1498 {
1499 cmd.VDENC_CMD3_DW3_5[i] = params.vdencCmd3Par1[i];
1500 cmd.VDENC_CMD3_DW6_8[i] = params.vdencCmd3Par2[i];
1501 }
1502
1503 #define DO_FIELDS() \
1504 DO_FIELD(DW1_2, VDENC_CMD3_DW1_BIT0, params.vdencCmd3Par0[0]); \
1505 DO_FIELD(DW1_2, VDENC_CMD3_DW1_BIT8, params.vdencCmd3Par0[1]); \
1506 DO_FIELD(DW1_2, VDENC_CMD3_DW1_BIT16, params.vdencCmd3Par0[2]); \
1507 DO_FIELD(DW1_2, VDENC_CMD3_DW1_BIT24, params.vdencCmd3Par0[3]); \
1508 DO_FIELD(DW1_2, VDENC_CMD3_DW2_BIT0, params.vdencCmd3Par0[4]); \
1509 DO_FIELD(DW1_2, VDENC_CMD3_DW2_BIT8, params.vdencCmd3Par0[5]); \
1510 DO_FIELD(DW1_2, VDENC_CMD3_DW2_BIT16, params.vdencCmd3Par0[6]); \
1511 DO_FIELD(DW1_2, VDENC_CMD3_DW2_BIT24, params.vdencCmd3Par0[7]); \
1512 \
1513 DO_FIELD(DW10, VDENC_CMD3_DW10_BIT16, params.vdencCmd3Par3); \
1514 DO_FIELD(DW10, VDENC_CMD3_DW10_BIT24, params.vdencCmd3Par4); \
1515 \
1516 DO_FIELD(DW12, VDENC_CMD3_DW12_BIT0, params.vdencCmd3Par5); \
1517 DO_FIELD(DW12, VDENC_CMD3_DW12_BIT8, params.vdencCmd3Par6); \
1518 DO_FIELD(DW12, VDENC_CMD3_DW12_BIT16, params.vdencCmd3Par7); \
1519 DO_FIELD(DW12, VDENC_CMD3_DW12_BIT24, params.vdencCmd3Par8); \
1520 \
1521 DO_FIELD(DW13, VDENC_CMD3_DW13_BIT0, params.vdencCmd3Par9); \
1522 DO_FIELD(DW13, VDENC_CMD3_DW13_BIT8, params.vdencCmd3Par10); \
1523 DO_FIELD(DW13, VDENC_CMD3_DW13_BIT16, params.vdencCmd3Par11); \
1524 DO_FIELD(DW13, VDENC_CMD3_DW13_BIT24, params.vdencCmd3Par12); \
1525 \
1526 DO_FIELD(DW14, VDENC_CMD3_DW14_BIT8, params.vdencCmd3Par13); \
1527 DO_FIELD(DW14, VDENC_CMD3_DW14_BIT16, params.vdencCmd3Par14); \
1528 DO_FIELD(DW14, VDENC_CMD3_DW14_BIT24, params.vdencCmd3Par15); \
1529 \
1530 DO_FIELD(DW15, VDENC_CMD3_DW15_BIT8, params.vdencCmd3Par16); \
1531 DO_FIELD(DW15, VDENC_CMD3_DW15_BIT16, params.vdencCmd3Par17); \
1532 DO_FIELD(DW15, VDENC_CMD3_DW15_BIT24, params.vdencCmd3Par18); \
1533 \
1534 DO_FIELD(DW16, VDENC_CMD3_DW16_BIT16, params.vdencCmd3Par19); \
1535 \
1536 DO_FIELD(DW17, VDENC_CMD3_DW17_BIT0, params.vdencCmd3Par20); \
1537 DO_FIELD(DW17, VDENC_CMD3_DW17_BIT8, params.vdencCmd3Par23); \
1538 DO_FIELD(DW17, VDENC_CMD3_DW17_BIT16, params.vdencCmd3Par21); \
1539 DO_FIELD(DW17, VDENC_CMD3_DW17_BIT24, params.vdencCmd3Par22); \
1540 \
1541 DO_FIELD(DW19, VDENC_CMD3_DW19_BIT8, params.vdencCmd3Par24); \
1542 DO_FIELD(DW19, VDENC_CMD3_DW19_BIT16, params.vdencCmd3Par25); \
1543 DO_FIELD(DW19, VDENC_CMD3_DW19_BIT24, params.vdencCmd3Par26); \
1544 \
1545 DO_FIELD(DW20, VDENC_CMD3_DW20_BIT0, params.vdencCmd3Par27); \
1546 DO_FIELD(DW20, VDENC_CMD3_DW20_BIT8, params.vdencCmd3Par28); \
1547 \
1548 DO_FIELD(DW21, VDENC_CMD3_DW21_BIT0, params.vdencCmd3Par29); \
1549 DO_FIELD(DW21, VDENC_CMD3_DW21_BIT8, params.vdencCmd3Par30); \
1550 \
1551 DO_FIELD(DW22, VDENC_CMD3_DW22_BIT0, params.vdencCmd3Par31); \
1552 DO_FIELD(DW22, VDENC_CMD3_DW22_BIT16, params.vdencCmd3Par32)
1553
1554 #include "mhw_hwcmd_process_cmdfields.h"
1555 }
1556
_MHW_SETCMD_OVERRIDE_DECL(VDENC_AVC_IMG_STATE)1557 _MHW_SETCMD_OVERRIDE_DECL(VDENC_AVC_IMG_STATE)
1558 {
1559 _MHW_SETCMD_CALLBASE(VDENC_AVC_IMG_STATE);
1560
1561 #define DO_FIELDS() \
1562 DO_FIELD(DW1, PictureType, params.pictureType); \
1563 DO_FIELD(DW1, Transform8X8Flag, params.transform8X8Flag); \
1564 DO_FIELD(DW1, colloc_mv_wr_en, params.colMVWriteEnable); \
1565 DO_FIELD(DW1, SubpelMode, params.subpelMode); \
1566 \
1567 DO_FIELD(DW2, colloc_mv_rd_en, params.colMVReadEnable); \
1568 DO_FIELD(DW2, BidirectionalWeight, params.bidirectionalWeight); \
1569 \
1570 DO_FIELD(DW3, PictureHeightMinusOne, params.pictureHeightMinusOne); \
1571 DO_FIELD(DW3, PictureWidth, params.pictureWidth); \
1572 \
1573 DO_FIELD(DW5, FwdRefIdx0ReferencePicture, params.fwdRefIdx0ReferencePicture); \
1574 DO_FIELD(DW5, BwdRefIdx0ReferencePicture, params.bwdRefIdx0ReferencePicture); \
1575 DO_FIELD(DW5, FwdRefIdx1ReferencePicture, params.fwdRefIdx1ReferencePicture); \
1576 DO_FIELD(DW5, FwdRefIdx2ReferencePicture, params.fwdRefIdx2ReferencePicture); \
1577 DO_FIELD(DW5, NumberOfL0ReferencesMinusOne, params.numberOfL0ReferencesMinusOne); \
1578 DO_FIELD(DW5, NumberOfL1ReferencesMinusOne, params.numberOfL1ReferencesMinusOne); \
1579 \
1580 DO_FIELD(DW6, IntraRefreshMbPos, params.intraRefreshMbPos); \
1581 DO_FIELD(DW6, IntraRefreshMbSizeMinusOne, params.intraRefreshMbSizeMinusOne); \
1582 DO_FIELD(DW6, IntraRefreshEnableRollingIEnable, params.intraRefreshEnableRollingIEnable); \
1583 DO_FIELD(DW6, IntraRefreshMode, params.intraRefreshMode); \
1584 DO_FIELD(DW6, QpAdjustmentForRollingI, params.qpAdjustmentForRollingI); \
1585 \
1586 DO_FIELD(DW9, RoiQpAdjustmentForZone0, params.roiQpAdjustmentForZone0); \
1587 DO_FIELD(DW9, RoiQpAdjustmentForZone1, params.roiQpAdjustmentForZone1); \
1588 DO_FIELD(DW9, RoiQpAdjustmentForZone2, params.roiQpAdjustmentForZone2); \
1589 DO_FIELD(DW9, RoiQpAdjustmentForZone3, params.roiQpAdjustmentForZone3); \
1590 \
1591 DO_FIELD(DW12, MinQp, params.minQp); \
1592 DO_FIELD(DW12, MaxQp, params.maxQp); \
1593 \
1594 DO_FIELD(DW13, RoiEnable, params.roiEnable); \
1595 DO_FIELD(DW13, MbLevelQpEnable, params.mbLevelQpEnable); \
1596 DO_FIELD(DW13, MbLevelDeltaQpEnable, params.mbLevelDeltaQpEnable); \
1597 DO_FIELD(DW13, LongtermReferenceFrameBwdRef0Indicator, params.longtermReferenceFrameBwdRef0Indicator); \
1598 \
1599 DO_FIELD(DW14, QpPrimeY, params.qpPrimeY); \
1600 DO_FIELD(DW14, TrellisQuantEn, params.trellisQuantEn); \
1601 \
1602 DO_FIELD(DW15, PocNumberForCurrentPicture, params.pocNumberForCurrentPicture); \
1603 DO_FIELD(DW16, PocNumberForFwdRef0, params.pocNumberForFwdRef0); \
1604 DO_FIELD(DW17, PocNumberForFwdRef1, params.pocNumberForFwdRef1); \
1605 DO_FIELD(DW18, PocNumberForFwdRef2, params.pocNumberForFwdRef2); \
1606 DO_FIELD(DW19, PocNumberForBwdRef0, params.pocNumberForBwdRef0)
1607
1608 #define DO_FIELDS_EXT() \
1609 __MHW_VDBOX_VDENC_WRAPPER_EXT(VDENC_AVC_IMG_STATE_IMPL_EXT)
1610
1611 #include "mhw_hwcmd_process_cmdfields.h"
1612 }
1613 MEDIA_CLASS_DEFINE_END(mhw__vdbox__vdenc__Impl)
1614 };
1615 } // namespace vdenc
1616 } // namespace vdbox
1617 } // namespace mhw
1618
1619 #endif // __MHW_VDBOX_VDENC_IMPL_H__
1620