1 /* 2 * Copyright (c) 2021, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_vdbox_huc_hwcmd_xe_hpm.h 24 //! \brief Auto-generated constructors for MHW and states. 25 //! \details This file may not be included outside of g12_X as other components 26 //! should use MHW interface to interact with MHW commands and states. 27 //! 28 #ifndef __MHW_VDBOX_HUC_HWCMD_XE_HPM_H__ 29 #define __MHW_VDBOX_HUC_HWCMD_XE_HPM_H__ 30 31 #pragma once 32 #pragma pack(1) 33 34 #include <cstdint> 35 #include <cstddef> 36 37 namespace mhw 38 { 39 namespace vdbox 40 { 41 namespace huc 42 { 43 namespace xe_hpm 44 { 45 struct Cmd 46 { 47 public: 48 // Internal Macros 49 #define __CODEGEN_MAX(_a, _b) (((_a) > (_b)) ? (_a) : (_b)) 50 #define __CODEGEN_BITFIELD(l, h) (h) - (l) + 1 51 #define __CODEGEN_OP_LENGTH_BIAS 2 52 #define __CODEGEN_OP_LENGTH(x) (uint32_t)((__CODEGEN_MAX(x, __CODEGEN_OP_LENGTH_BIAS)) - __CODEGEN_OP_LENGTH_BIAS) 53 GetOpLengthCmd54 static uint32_t GetOpLength(uint32_t uiLength) { return __CODEGEN_OP_LENGTH(uiLength); } 55 56 //! 57 //! \brief MEMORYADDRESSATTRIBUTES 58 //! \details 59 //! This field controls the priority of arbitration used in the GAC/GAM 60 //! pipeline for this surface. It defines the attributes for VDBOX addresses 61 //! on BDW+. 62 //! 63 struct MEMORYADDRESSATTRIBUTES_CMD 64 { 65 union 66 { 67 struct 68 { 69 uint32_t Reserved0 : __CODEGEN_BITFIELD( 0, 0) ; //!< Reserved 70 uint32_t BaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD( 1, 6) ; //!< Base Address - Index to Memory Object Control State (MOCS) Tables 71 uint32_t BaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD( 7, 8) ; //!< Base Address - Arbitration Priority Control 72 uint32_t BaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD( 9, 9) ; //!< Base Address - Memory Compression Enable 73 uint32_t CompressionType : __CODEGEN_BITFIELD(10, 10) ; //!< COMPRESSION_TYPE 74 uint32_t Reserved11 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 75 uint32_t BaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12) ; //!< BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 76 uint32_t BaseAddressTiledResourceMode : __CODEGEN_BITFIELD(13, 14) ; //!< BASE_ADDRESS_TILED_RESOURCE_MODE 77 uint32_t Reserved15 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 78 }; 79 uint32_t Value; 80 } DW0; 81 82 //! \name Local enumerations 83 84 //! \brief COMPRESSION_TYPE 85 //! \details 86 //! Indicates if buffer is render/media compressed. 87 enum COMPRESSION_TYPE 88 { 89 COMPRESSION_TYPE_MEDIACOMPRESSIONENABLE = 0, //!< No additional details 90 COMPRESSION_TYPE_RENDERCOMPRESSIONENABLE = 1, //!< No additional details 91 }; 92 93 //! \brief BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 94 //! \details 95 //! This field controls if the Row Store is going to store inside Media 96 //! Cache (rowstore cache) or to LLC. 97 enum BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 98 { 99 BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED0 = 0, //!< Buffer going to LLC. 100 BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1 = 1, //!< Buffer going to Internal Media Storage. 101 }; 102 103 //! \brief BASE_ADDRESS_TILED_RESOURCE_MODE 104 //! \details 105 //! For Media Surfaces: This field specifies the tiled resource mode. 106 enum BASE_ADDRESS_TILED_RESOURCE_MODE 107 { 108 BASE_ADDRESS_TILED_RESOURCE_MODE_TRMODENONE = 0, //!< TileY resources 109 BASE_ADDRESS_TILED_RESOURCE_MODE_TRMODETILEYF = 1, //!< 4KB tiled resources 110 BASE_ADDRESS_TILED_RESOURCE_MODE_TRMODETILEYS = 2, //!< 64KB tiled resources 111 }; 112 113 //! \name Initializations 114 115 //! \brief Explicit member initialization function 116 MEMORYADDRESSATTRIBUTES_CMD(); 117 118 static const size_t dwSize = 1; 119 static const size_t byteSize = 4; 120 }; 121 122 //! 123 //! \brief SPLITBASEADDRESS64BYTEALIGNED 124 //! \details 125 //! Specifies a 64-bit (48-bit canonical) 64-byte aligned memory base 126 //! address. 127 //! 128 struct SPLITBASEADDRESS64BYTEALIGNED_CMD 129 { 130 union 131 { 132 struct 133 { 134 uint64_t Reserved0 : __CODEGEN_BITFIELD( 0, 5) ; //!< Reserved 135 uint64_t Graphicsaddress476 : __CODEGEN_BITFIELD( 6, 47) ; //!< GraphicsAddress47-6 136 uint64_t Reserved48 : __CODEGEN_BITFIELD(48, 63) ; //!< Reserved 137 }; 138 uint32_t Value[2]; 139 } DW0_1; 140 141 //! \name Local enumerations 142 143 //! \name Initializations 144 145 //! \brief Explicit member initialization function 146 SPLITBASEADDRESS64BYTEALIGNED_CMD(); 147 148 static const size_t dwSize = 2; 149 static const size_t byteSize = 8; 150 }; 151 152 //! 153 //! \brief SPLITBASEADDRESS4KBYTEALIGNED 154 //! \details 155 //! Specifies a 64-bit (48-bit canonical) 4K-byte aligned memory base 156 //! address. GraphicsAddress is a 64-bit value [63:0], but only a portion of 157 //! it is used by hardware. The upper reserved bits are ignored and MBZ. 158 //! 159 struct SPLITBASEADDRESS4KBYTEALIGNED_CMD 160 { 161 union 162 { 163 struct 164 { 165 uint64_t Reserved0 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 166 uint64_t Graphicsaddress4712 : __CODEGEN_BITFIELD(12, 47) ; //!< GraphicsAddress47-12 167 uint64_t Reserved48 : __CODEGEN_BITFIELD(48, 63) ; //!< Reserved 168 }; 169 uint32_t Value[2]; 170 } DW0_1; 171 172 //! \name Local enumerations 173 174 //! \name Initializations 175 176 //! \brief Explicit member initialization function 177 SPLITBASEADDRESS4KBYTEALIGNED_CMD(); 178 179 static const size_t dwSize = 2; 180 static const size_t byteSize = 8; 181 }; 182 183 //! 184 //! \brief HUC_PIPE_MODE_SELECT 185 //! \details 186 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 187 //! Commands. Each HUC command has assigned a media instruction command as 188 //! defined in DWord 0, BitField 22:16. 189 //! 190 //! The HUC_PIPE_MODE_SELECT command is responsible for general pipeline 191 //! level configuration that would normally be set once for a single stream 192 //! decode and would not be modified on a frame workload basis. 193 //! 194 struct HUC_PIPE_MODE_SELECT_CMD 195 { 196 union 197 { 198 struct 199 { 200 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 201 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 202 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 203 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 204 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 205 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 206 }; 207 uint32_t Value; 208 } DW0; 209 union 210 { 211 struct 212 { 213 uint32_t Reserved32 : __CODEGEN_BITFIELD( 0, 3) ; //!< Reserved 214 uint32_t IndirectStreamOutEnable : __CODEGEN_BITFIELD( 4, 4) ; //!< INDIRECT_STREAM_OUT_ENABLE 215 uint32_t Reserved37 : __CODEGEN_BITFIELD( 5, 31) ; //!< Reserved 216 }; 217 uint32_t Value; 218 } DW1; 219 union 220 { 221 struct 222 { 223 uint32_t MediaSoftResetCounterPer1000Clocks ; //!< MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS 224 }; 225 uint32_t Value; 226 } DW2; 227 228 //! \name Local enumerations 229 230 enum MEDIA_INSTRUCTION_COMMAND 231 { 232 MEDIA_INSTRUCTION_COMMAND_HUCPIPEMODESELECT = 0, //!< No additional details 233 }; 234 235 //! \brief MEDIA_INSTRUCTION_OPCODE 236 //! \details 237 //! Codec/Engine Name = HUP = Bh 238 enum MEDIA_INSTRUCTION_OPCODE 239 { 240 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 241 }; 242 243 enum PIPELINE_TYPE 244 { 245 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 246 }; 247 248 enum COMMAND_TYPE 249 { 250 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 251 }; 252 253 //! \brief INDIRECT_STREAM_OUT_ENABLE 254 //! \details 255 //! Enables the bitstream to be written out to memory immediately following 256 //! the output of the bit stream. The memory buffer is addressed through 257 //! the HuC Indirect Stream Out ObjectBase Address. 258 enum INDIRECT_STREAM_OUT_ENABLE 259 { 260 INDIRECT_STREAM_OUT_ENABLE_DISABLEINDIRECTSTREAMOUT = 0, //!< No additional details 261 INDIRECT_STREAM_OUT_ENABLE_ENABLEINDIRECTSTREAMOUT = 1, //!< No additional details 262 }; 263 264 //! \brief MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS 265 //! \details 266 //! In decoder modes, this counter value specifies the number of clocks (per 267 //! 1000) of GAC inactivity 268 //! before a media soft-reset is applied to the HCP and HuC. If counter 269 //! value is set to 0, the media 270 //! soft-reset feature is disabled and no reset will occur. 271 //! In encoder modes, this counter must be set to 0 to disable media 272 //! soft reset. This feature is not 273 //! supported for the encoder. 274 enum MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS 275 { 276 MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS_DISABLE = 0, //!< No additional details 277 }; 278 279 //! \name Initializations 280 281 //! \brief Explicit member initialization function 282 HUC_PIPE_MODE_SELECT_CMD(); 283 284 static const size_t dwSize = 3; 285 static const size_t byteSize = 12; 286 }; 287 288 //! 289 //! \brief HUC_IMEM_STATE 290 //! \details 291 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 292 //! Commands. Each HUC command has assigned a media instruction command as 293 //! defined in DWord 0, BitField 22:16. 294 //! 295 //! The HUC_IMEM_STATE command is used to fetch the HUC firmware from the 296 //! WOPCM region and load it into the HUC 96KB L2 storage RAM. The 297 //! HUC_IMEM_STATE specifies the firmware's offset in WOPCM which is a cache 298 //! line aligned 32-bit offset address. The firmware, code and data segment 299 //! size should always be less than 96KB. If its greater than 96KB then the 300 //! firmware should be broken into smaller functions so that there is no 301 //! firmware straddling case. 302 //! When the HUC_IMEM_STATE command is received, the hardware confirms that 303 //! the code has been successfully authenticated by checking the VCR 304 //! provided authentication successful signal. If this signal is asserted, 305 //! the firmware is loaded by the HUC DMA into the 96KB L2 storage RAM. Once 306 //! the firmware is loaded, the VALID IMEM LOADED bit in the HUC_STATUS2 307 //! register is asserted high in the. If the authentication signal is not 308 //! asserted, the DMA aborts the HUC_IMEM_STATE command, the firmware is not 309 //! loaded, and the VALID IMEM LOADED bit remains low. 310 //! 311 struct HUC_IMEM_STATE_CMD 312 { 313 union 314 { 315 struct 316 { 317 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 318 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 319 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 320 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 321 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 322 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 323 }; 324 uint32_t Value; 325 } DW0; 326 union 327 { 328 struct 329 { 330 uint32_t Reserved32 ; //!< Reserved 331 }; 332 uint32_t Value; 333 } DW1; 334 union 335 { 336 struct 337 { 338 uint32_t Reserved64 ; //!< Reserved 339 }; 340 uint32_t Value; 341 } DW2; 342 union 343 { 344 struct 345 { 346 uint32_t Reserved96 ; //!< Reserved 347 }; 348 uint32_t Value; 349 } DW3; 350 union 351 { 352 struct 353 { 354 uint32_t HucFirmwareDescriptor : __CODEGEN_BITFIELD( 0, 7) ; //!< HUC_FIRMWARE_DESCRIPTOR 355 uint32_t Reserved136 : __CODEGEN_BITFIELD( 8, 31) ; //!< Reserved 356 }; 357 uint32_t Value; 358 } DW4; 359 360 //! \name Local enumerations 361 362 enum MEDIA_INSTRUCTION_COMMAND 363 { 364 MEDIA_INSTRUCTION_COMMAND_HUCIMEMSTATE = 1, //!< No additional details 365 }; 366 367 //! \brief MEDIA_INSTRUCTION_OPCODE 368 //! \details 369 //! Codec/Engine Name = HUC = Bh 370 enum MEDIA_INSTRUCTION_OPCODE 371 { 372 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 373 }; 374 375 enum PIPELINE_TYPE 376 { 377 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 378 }; 379 380 enum COMMAND_TYPE 381 { 382 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 383 }; 384 385 //! \brief HUC_FIRMWARE_DESCRIPTOR 386 //! \details 387 //! This field specifies 1 of 255 firmware descriptors which describe 388 //! which firmware is be loaded in the L2 storage RAM. If the firmware 389 //! descriptor is set to zero, the HUC will not load the firmware. 390 enum HUC_FIRMWARE_DESCRIPTOR 391 { 392 HUC_FIRMWARE_DESCRIPTOR_UNNAMED0 = 0, //!< Illegal 393 }; 394 395 //! \name Initializations 396 397 //! \brief Explicit member initialization function 398 HUC_IMEM_STATE_CMD(); 399 400 static const size_t dwSize = 5; 401 static const size_t byteSize = 20; 402 }; 403 404 //! 405 //! \brief HUC_DMEM_STATE 406 //! \details 407 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 408 //! Commands. Each HUC command has assigned a media instruction command as 409 //! defined in DWord 0, BitField 22:16. 410 //! 411 //! The HUC_DMEM_STATE command is used to fetch the HUC data from the 412 //! graphics memory and load it into the HUC 96KB L2 storage RAM. The 413 //! HUC_DMEM_STATE specifies the data source base address in graphics 414 //! memory. 415 //! 416 //! When the HUC_DMEM_STATE command is received, the data is loaded by the 417 //! HUC DMA into the 96KB L2 storage RAM at the location provided in the 418 //! HUC_DMEM_STATE command. This command also specifies the length of the 419 //! data, which is specified in bytes but must be in increments of 64 byte 420 //! cache lines. 421 //! 422 struct HUC_DMEM_STATE_CMD 423 { 424 union 425 { 426 struct 427 { 428 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 429 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 430 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 431 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 432 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 433 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 434 }; 435 uint32_t Value; 436 } DW0; 437 SPLITBASEADDRESS64BYTEALIGNED_CMD HucDataSourceBaseAddress; //!< DW1..2, HUC Data Source - Base Address 438 MEMORYADDRESSATTRIBUTES_CMD HucDataSourceAttributes; //!< DW3, HUC Data Source - Attributes 439 union 440 { 441 struct 442 { 443 uint32_t Reserved128 : __CODEGEN_BITFIELD( 0, 5) ; //!< Reserved 444 uint32_t HucDataDestinationBaseAddress : __CODEGEN_BITFIELD( 6, 16) ; //!< HUC Data Destination Base Address 445 uint32_t Reserved145 : __CODEGEN_BITFIELD(17, 31) ; //!< Reserved 446 }; 447 uint32_t Value; 448 } DW4; 449 union 450 { 451 struct 452 { 453 uint32_t Reserved160 : __CODEGEN_BITFIELD( 0, 5) ; //!< Reserved 454 uint32_t HucDataLength : __CODEGEN_BITFIELD( 6, 16) ; //!< HUC Data Length 455 uint32_t Reserved177 : __CODEGEN_BITFIELD(17, 31) ; //!< Reserved 456 }; 457 uint32_t Value; 458 } DW5; 459 460 //! \name Local enumerations 461 462 enum MEDIA_INSTRUCTION_COMMAND 463 { 464 MEDIA_INSTRUCTION_COMMAND_HUCDMEMSTATE = 2, //!< No additional details 465 }; 466 467 //! \brief MEDIA_INSTRUCTION_OPCODE 468 //! \details 469 //! Codec/Engine Name = HUC = Bh 470 enum MEDIA_INSTRUCTION_OPCODE 471 { 472 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 473 }; 474 475 enum PIPELINE_TYPE 476 { 477 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 478 }; 479 480 enum COMMAND_TYPE 481 { 482 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 483 }; 484 485 //! \name Initializations 486 487 //! \brief Explicit member initialization function 488 HUC_DMEM_STATE_CMD(); 489 490 static const size_t dwSize = 6; 491 static const size_t byteSize = 24; 492 }; 493 494 //! 495 //! \brief HUC_CFG_STATE 496 //! \details 497 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 498 //! Commands. Each HUC command has assigned a media instruction command as 499 //! defined in DWord 0, BitField 22:16. 500 //! 501 //! The HUC_CFG_STATE command is used to force the P24C (MinuteIA) into a 502 //! reset condition as well as forcing it out of a reset condition. This 503 //! command is not normally required since the hardware will handle placing 504 //! the P24C into a reset condition and releasing it from reset, but there 505 //! may be conditions that require a forced reset. 506 //! 507 struct HUC_CFG_STATE_CMD 508 { 509 union 510 { 511 struct 512 { 513 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 514 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 515 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 516 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 517 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 518 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 519 }; 520 uint32_t Value; 521 } DW0; 522 union 523 { 524 struct 525 { 526 uint32_t P24CMinuteia : __CODEGEN_BITFIELD( 0, 0) ; //!< P24C_MINUTEIA 527 uint32_t Reserved33 : __CODEGEN_BITFIELD( 1, 31) ; //!< Reserved 528 }; 529 uint32_t Value; 530 } DW1; 531 532 //! \name Local enumerations 533 534 enum MEDIA_INSTRUCTION_COMMAND 535 { 536 MEDIA_INSTRUCTION_COMMAND_HUCCFGSTATE = 3, //!< No additional details 537 }; 538 539 //! \brief MEDIA_INSTRUCTION_OPCODE 540 //! \details 541 //! Codec/Engine Name = HUC = Bh 542 enum MEDIA_INSTRUCTION_OPCODE 543 { 544 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 545 }; 546 547 enum PIPELINE_TYPE 548 { 549 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 550 }; 551 552 enum COMMAND_TYPE 553 { 554 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 555 }; 556 557 enum P24C_MINUTEIA 558 { 559 P24C_MINUTEIA_NORMALOPERATION = 0, //!< No reset. 560 P24C_MINUTEIA_FORCERESET = 1, //!< No additional details 561 }; 562 563 //! \name Initializations 564 565 //! \brief Explicit member initialization function 566 HUC_CFG_STATE_CMD(); 567 568 static const size_t dwSize = 2; 569 static const size_t byteSize = 8; 570 }; 571 572 //! 573 //! \brief HUC_VIRTUAL_ADDR_REGION 574 //! \details 575 //! 576 //! 577 struct HUC_VIRTUAL_ADDR_REGION_CMD 578 { 579 SPLITBASEADDRESS4KBYTEALIGNED_CMD HucSurfaceBaseAddressVirtualaddrregion015; //!< DW0..2, HUC Surface Base Address (VirtualAddrRegion[0-15]) 580 MEMORYADDRESSATTRIBUTES_CMD HucSurfaceVirtualaddrregion015; //!< DW0..2, HUC Surface (VirtualAddrRegion[0-15]) 581 582 //! \name Local enumerations 583 584 //! \name Initializations 585 586 //! \brief Explicit member initialization function 587 HUC_VIRTUAL_ADDR_REGION_CMD(); 588 589 static const size_t dwSize = 3; 590 static const size_t byteSize = 12; 591 }; 592 593 //! 594 //! \brief HUC_VIRTUAL_ADDR_STATE 595 //! \details 596 //! HUC is selected with the Media Instruction Opcode "Bh" for all HUC 597 //! Commands. Each HUC command has assigned a media instruction command as 598 //! defined in DWord 0, BitField 22:16. 599 //! 600 //! The HUC_VIRTUAL_ADDR_STATE command is used to define the 48-bit HUC 601 //! Surface Base Address and HUC Surface for each region. 602 //! 603 struct HUC_VIRTUAL_ADDR_STATE_CMD 604 { 605 union 606 { 607 struct 608 { 609 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 610 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 611 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 612 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 613 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 614 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 615 }; 616 uint32_t Value; 617 } DW0; 618 HUC_VIRTUAL_ADDR_REGION_CMD HucVirtualAddressRegion[16]; //!< DW1..48, Huc Virtual Address Region 619 620 //! \name Local enumerations 621 622 enum MEDIA_INSTRUCTION_COMMAND 623 { 624 MEDIA_INSTRUCTION_COMMAND_HUCVIRTUALADDRSTATE = 4, //!< No additional details 625 }; 626 627 //! \brief MEDIA_INSTRUCTION_OPCODE 628 //! \details 629 //! Codec/Engine Name = HUC = Bh 630 enum MEDIA_INSTRUCTION_OPCODE 631 { 632 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 633 }; 634 635 enum PIPELINE_TYPE 636 { 637 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 638 }; 639 640 enum COMMAND_TYPE 641 { 642 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 643 }; 644 645 //! \name Initializations 646 647 //! \brief Explicit member initialization function 648 HUC_VIRTUAL_ADDR_STATE_CMD(); 649 650 static const size_t dwSize = 49; 651 static const size_t byteSize = 196; 652 }; 653 654 //! 655 //! \brief HUC_IND_OBJ_BASE_ADDR_STATE 656 //! \details 657 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 658 //! Commands. Each HUC command has assigned a media instruction command as 659 //! defined in DWord 0, BitField 22:16. 660 //! 661 //! The HUC_IND_OBJ_BASE_ADDR_STATE command is used to define the indirect 662 //! object base address of the stream in graphics memory. This is a frame 663 //! level command. 664 //! 665 struct HUC_IND_OBJ_BASE_ADDR_STATE_CMD 666 { 667 union 668 { 669 struct 670 { 671 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 672 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 673 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 674 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 675 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 676 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 677 }; 678 uint32_t Value; 679 } DW0; 680 SPLITBASEADDRESS4KBYTEALIGNED_CMD HucIndirectStreamInObjectbaseAddress; //!< DW1..2, HUC Indirect Stream In ObjectBase Address 681 MEMORYADDRESSATTRIBUTES_CMD HucIndirectStreamInObjectbaseAttributes; //!< DW3, HUC Indirect Stream In ObjectBase Attributes 682 SPLITBASEADDRESS4KBYTEALIGNED_CMD HucIndirectStreamInObjectaccessUpperBound; //!< DW4..5, HUC Indirect Stream In ObjectAccess Upper Bound 683 SPLITBASEADDRESS4KBYTEALIGNED_CMD HucIndirectStreamOutObjectbaseAddress; //!< DW6..7, HUC Indirect Stream Out ObjectBase Address 684 MEMORYADDRESSATTRIBUTES_CMD HucIndirectStreamOutObjectbaseAttributes; //!< DW8, HUC Indirect Stream Out ObjectBase Attributes 685 SPLITBASEADDRESS4KBYTEALIGNED_CMD HucIndirectStreamOutObjectaccessUpperBound; //!< DW9..10, HUC Indirect Stream Out ObjectAccess Upper Bound 686 687 //! \name Local enumerations 688 689 enum MEDIA_INSTRUCTION_COMMAND 690 { 691 MEDIA_INSTRUCTION_COMMAND_HUCINDOBJBASEADDRSTATE = 5, //!< No additional details 692 }; 693 694 //! \brief MEDIA_INSTRUCTION_OPCODE 695 //! \details 696 //! Codec/Engine Name = HUC = Bh 697 enum MEDIA_INSTRUCTION_OPCODE 698 { 699 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 700 }; 701 702 enum PIPELINE_TYPE 703 { 704 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 705 }; 706 707 enum COMMAND_TYPE 708 { 709 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 710 }; 711 712 //! \name Initializations 713 714 //! \brief Explicit member initialization function 715 HUC_IND_OBJ_BASE_ADDR_STATE_CMD(); 716 717 static const size_t dwSize = 11; 718 static const size_t byteSize = 44; 719 }; 720 721 //! 722 //! \brief HUC_STREAM_OBJECT 723 //! \details 724 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 725 //! Commands. Each HUC command has assigned a media instruction command as 726 //! defined in DWord 0, BitField 22:16. 727 //! 728 //! The HUC_STREAM_OBJECT command is used to define the bit stream address 729 //! offset to the Stream Indirect Object base Address and the length of the 730 //! bit stream. The bitstream buffer the HUC operates upon is specified 731 //! through indirect addressing. 732 //! 733 struct HUC_STREAM_OBJECT_CMD 734 { 735 union 736 { 737 struct 738 { 739 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 740 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 741 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 742 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 743 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 744 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 745 }; 746 uint32_t Value; 747 } DW0; 748 union 749 { 750 struct 751 { 752 uint32_t IndirectStreamInDataLength ; //!< Indirect Stream In Data Length 753 }; 754 uint32_t Value; 755 } DW1; 756 union 757 { 758 struct 759 { 760 uint32_t IndirectStreamInStartAddress : __CODEGEN_BITFIELD( 0, 28) ; //!< Indirect Stream In Start Address 761 uint32_t Reserved93 : __CODEGEN_BITFIELD(29, 30) ; //!< Reserved 762 uint32_t HucProcessing : __CODEGEN_BITFIELD(31, 31) ; //!< HUC_PROCESSING 763 }; 764 uint32_t Value; 765 } DW2; 766 union 767 { 768 struct 769 { 770 uint32_t IndirectStreamOutStartAddress : __CODEGEN_BITFIELD( 0, 28) ; //!< Indirect Stream Out Start Address 771 uint32_t Reserved125 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 772 }; 773 uint32_t Value; 774 } DW3; 775 union 776 { 777 struct 778 { 779 uint32_t StartCodeByte0 : __CODEGEN_BITFIELD( 0, 7) ; //!< Start Code Byte [0] 780 uint32_t StartCodeByte1 : __CODEGEN_BITFIELD( 8, 15) ; //!< Start Code Byte [1] 781 uint32_t StartCodeByte2 : __CODEGEN_BITFIELD(16, 23) ; //!< Start Code Byte [2] 782 uint32_t StartCodeSearchEngine : __CODEGEN_BITFIELD(24, 24) ; //!< START_CODE_SEARCH_ENGINE 783 uint32_t EmulationPreventionByteRemoval : __CODEGEN_BITFIELD(25, 25) ; //!< EMULATION_PREVENTION_BYTE_REMOVAL 784 uint32_t StreamOut : __CODEGEN_BITFIELD(26, 26) ; //!< STREAM_OUT 785 uint32_t Drmlengthmode : __CODEGEN_BITFIELD(27, 28) ; //!< DRMLENGTHMODE 786 uint32_t HucBitstreamEnable : __CODEGEN_BITFIELD(29, 29) ; //!< HUC_BITSTREAM_ENABLE 787 uint32_t Reserved158 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 788 }; 789 uint32_t Value; 790 } DW4; 791 792 //! \name Local enumerations 793 794 enum MEDIA_INSTRUCTION_COMMAND 795 { 796 MEDIA_INSTRUCTION_COMMAND_HUCSTREAMOBJECT = 32, //!< No additional details 797 }; 798 799 //! \brief MEDIA_INSTRUCTION_OPCODE 800 //! \details 801 //! Codec/Engine Name = HUC = Bh 802 enum MEDIA_INSTRUCTION_OPCODE 803 { 804 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 805 }; 806 807 enum PIPELINE_TYPE 808 { 809 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 810 }; 811 812 enum COMMAND_TYPE 813 { 814 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 815 }; 816 817 //! \brief HUC_PROCESSING 818 //! \details 819 //! Disables the HEVC Decoder CABAC engine to prevent it from starting 820 //! while the HuC is processing. Must be set to "1" for HUC processing so 821 //! that the stream is directed to the HuC and not the CABAC engine. 822 enum HUC_PROCESSING 823 { 824 HUC_PROCESSING_DISABLE = 1, //!< No additional details 825 }; 826 827 enum START_CODE_SEARCH_ENGINE 828 { 829 START_CODE_SEARCH_ENGINE_DISABLE = 0, //!< Bypass Start Code Search Engine 830 START_CODE_SEARCH_ENGINE_ENABLE = 1, //!< Enables the start code search engine to stop on every third byte start code defined by Start Code Byte [2:0] defined in this DWord. 831 }; 832 833 enum EMULATION_PREVENTION_BYTE_REMOVAL 834 { 835 EMULATION_PREVENTION_BYTE_REMOVAL_DISABLE = 0, //!< Bypass Emulation Prevention Byte Removal. 836 EMULATION_PREVENTION_BYTE_REMOVAL_ENABLE = 1, //!< Emulation prevention bytes will be removed after the start code search engine. 837 }; 838 839 //! \brief STREAM_OUT 840 //! \details 841 //! Enables the stream output. 842 enum STREAM_OUT 843 { 844 STREAM_OUT_DISABLE = 0, //!< Disable the stream output. 845 STREAM_OUT_ENABLE = 1, //!< Enable the stream output. 846 }; 847 848 enum DRMLENGTHMODE 849 { 850 DRMLENGTHMODE_STARTCODEMODE = 0, //!< Stops on a start code 851 DRMLENGTHMODE_LENGTHMODE = 1, //!< Stops after a number of bytes are reached in the length counter 852 }; 853 854 //! \brief HUC_BITSTREAM_ENABLE 855 //! \details 856 //! style="color: rgb(0, 0, 0); font-family: Arial, sans-serif; 857 //! line-height: normal;">Enables the bitstream to be sent to the HuC 858 enum HUC_BITSTREAM_ENABLE 859 { 860 HUC_BITSTREAM_ENABLE_DISABLE = 0, //!< No additional details 861 HUC_BITSTREAM_ENABLE_ENABLE = 1, //!< No additional details 862 }; 863 864 //! \name Initializations 865 866 //! \brief Explicit member initialization function 867 HUC_STREAM_OBJECT_CMD(); 868 869 static const size_t dwSize = 5; 870 static const size_t byteSize = 20; 871 }; 872 873 //! 874 //! \brief HUC_START 875 //! \details 876 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 877 //! Commands. Each HUC command has assigned a media instruction command as 878 //! defined in DWord 0, BitField 22:16. 879 //! 880 struct HUC_START_CMD 881 { 882 union 883 { 884 struct 885 { 886 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 887 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 888 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 889 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 890 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 891 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 892 }; 893 uint32_t Value; 894 } DW0; 895 union 896 { 897 struct 898 { 899 uint32_t Laststreamobject : __CODEGEN_BITFIELD( 0, 0) ; //!< LASTSTREAMOBJECT 900 uint32_t Reserved33 : __CODEGEN_BITFIELD( 1, 31) ; //!< Reserved 901 }; 902 uint32_t Value; 903 } DW1; 904 905 //! \name Local enumerations 906 907 enum MEDIA_INSTRUCTION_COMMAND 908 { 909 MEDIA_INSTRUCTION_COMMAND_HUCSTART = 33, //!< No additional details 910 }; 911 912 //! \brief MEDIA_INSTRUCTION_OPCODE 913 //! \details 914 //! Codec/Engine Name = HUC = Bh 915 enum MEDIA_INSTRUCTION_OPCODE 916 { 917 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 918 }; 919 920 enum PIPELINE_TYPE 921 { 922 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 923 }; 924 925 enum COMMAND_TYPE 926 { 927 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 928 }; 929 930 enum LASTSTREAMOBJECT 931 { 932 LASTSTREAMOBJECT_NOTLASTSTREAMOBJECT = 0, //!< Not the last stream object in the workload. 933 LASTSTREAMOBJECT_LASTSTREAMOBJECT = 1, //!< Last stream object in the workload. 934 }; 935 936 //! \name Initializations 937 938 //! \brief Explicit member initialization function 939 HUC_START_CMD(); 940 941 static const size_t dwSize = 2; 942 static const size_t byteSize = 8; 943 }; 944 945 }; 946 } // namespace xe_hpm 947 } // namespace huc 948 } // namespace vdbox 949 } // namespace mhw 950 951 #pragma pack() 952 953 #endif // __MHW_VDBOX_HUC_HWCMD_XE_HPM_H__