1 /* 2 * Copyright (c) 2017-2019, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_vdbox_huc_hwcmd_g12_X.h 24 //! \brief Auto-generated constructors for MHW and states. 25 //! \details This file may not be included outside of g12_X as other components 26 //! should use MHW interface to interact with MHW commands and states. 27 //! 28 29 // DO NOT EDIT 30 31 #ifndef __MHW_VDBOX_HUC_HWCMD_G12_X_H__ 32 #define __MHW_VDBOX_HUC_HWCMD_G12_X_H__ 33 34 #pragma once 35 #pragma pack(1) 36 37 #include <cstdint> 38 #include <cstddef> 39 40 class mhw_vdbox_huc_g12_X 41 { 42 public: 43 // Internal Macros 44 #define __CODEGEN_MAX(_a, _b) (((_a) > (_b)) ? (_a) : (_b)) 45 #define __CODEGEN_BITFIELD(l, h) (h) - (l) + 1 46 #define __CODEGEN_OP_LENGTH_BIAS 2 47 #define __CODEGEN_OP_LENGTH(x) (uint32_t)((__CODEGEN_MAX(x, __CODEGEN_OP_LENGTH_BIAS)) - __CODEGEN_OP_LENGTH_BIAS) 48 GetOpLength(uint32_t uiLength)49 static uint32_t GetOpLength(uint32_t uiLength) { return __CODEGEN_OP_LENGTH(uiLength); } 50 51 //! 52 //! \brief MEMORYADDRESSATTRIBUTES 53 //! \details 54 //! This field controls the priority of arbitration used in the GAC/GAM 55 //! pipeline for this surface. It defines the attributes for VDBOX addresses 56 //! on BDW+. 57 //! 58 struct MEMORYADDRESSATTRIBUTES_CMD 59 { 60 union 61 { 62 struct 63 { 64 uint32_t Reserved0 : __CODEGEN_BITFIELD( 0, 0) ; //!< Reserved 65 uint32_t BaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD( 1, 6) ; //!< Base Address - Index to Memory Object Control State (MOCS) Tables 66 uint32_t BaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD( 7, 8) ; //!< Base Address - Arbitration Priority Control 67 uint32_t BaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD( 9, 9) ; //!< Base Address - Memory Compression Enable 68 uint32_t CompressionType : __CODEGEN_BITFIELD(10, 10) ; //!< COMPRESSION_TYPE 69 uint32_t Reserved11 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 70 uint32_t BaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12) ; //!< BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 71 uint32_t BaseAddressTiledResourceMode : __CODEGEN_BITFIELD(13, 14) ; //!< BASE_ADDRESS_TILED_RESOURCE_MODE 72 uint32_t Reserved15 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 73 }; 74 uint32_t Value; 75 } DW0; 76 77 //! \name Local enumerations 78 79 //! \brief COMPRESSION_TYPE 80 //! \details 81 //! Indicates if buffer is render/media compressed. 82 enum COMPRESSION_TYPE 83 { 84 COMPRESSION_TYPE_MEDIACOMPRESSIONENABLE = 0, //!< No additional details 85 COMPRESSION_TYPE_RENDERCOMPRESSIONENABLE = 1, //!< No additional details 86 }; 87 88 //! \brief BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 89 //! \details 90 //! This field controls if the Row Store is going to store inside Media 91 //! Cache (rowstore cache) or to LLC. 92 enum BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 93 { 94 BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED0 = 0, //!< Buffer going to LLC. 95 BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1 = 1, //!< Buffer going to Internal Media Storage. 96 }; 97 98 //! \brief BASE_ADDRESS_TILED_RESOURCE_MODE 99 //! \details 100 //! For Media Surfaces: This field specifies the tiled resource mode. 101 enum BASE_ADDRESS_TILED_RESOURCE_MODE 102 { 103 BASE_ADDRESS_TILED_RESOURCE_MODE_TRMODENONE = 0, //!< TileY resources 104 BASE_ADDRESS_TILED_RESOURCE_MODE_TRMODETILEYF = 1, //!< 4KB tiled resources 105 BASE_ADDRESS_TILED_RESOURCE_MODE_TRMODETILEYS = 2, //!< 64KB tiled resources 106 }; 107 108 //! \name Initializations 109 110 //! \brief Explicit member initialization function 111 MEMORYADDRESSATTRIBUTES_CMD(); 112 113 static const size_t dwSize = 1; 114 static const size_t byteSize = 4; 115 }; 116 117 //! 118 //! \brief SPLITBASEADDRESS64BYTEALIGNED 119 //! \details 120 //! Specifies a 64-bit (48-bit canonical) 64-byte aligned memory base 121 //! address. 122 //! 123 struct SPLITBASEADDRESS64BYTEALIGNED_CMD 124 { 125 union 126 { 127 struct 128 { 129 uint64_t Reserved0 : __CODEGEN_BITFIELD( 0, 5) ; //!< Reserved 130 uint64_t Graphicsaddress476 : __CODEGEN_BITFIELD( 6, 47) ; //!< GraphicsAddress47-6 131 uint64_t Reserved48 : __CODEGEN_BITFIELD(48, 63) ; //!< Reserved 132 }; 133 uint32_t Value[2]; 134 } DW0_1; 135 136 //! \name Local enumerations 137 138 //! \name Initializations 139 140 //! \brief Explicit member initialization function 141 SPLITBASEADDRESS64BYTEALIGNED_CMD(); 142 143 static const size_t dwSize = 2; 144 static const size_t byteSize = 8; 145 }; 146 147 //! 148 //! \brief SPLITBASEADDRESS4KBYTEALIGNED 149 //! \details 150 //! Specifies a 64-bit (48-bit canonical) 4K-byte aligned memory base 151 //! address. GraphicsAddress is a 64-bit value [63:0], but only a portion of 152 //! it is used by hardware. The upper reserved bits are ignored and MBZ. 153 //! 154 struct SPLITBASEADDRESS4KBYTEALIGNED_CMD 155 { 156 union 157 { 158 struct 159 { 160 uint64_t Reserved0 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 161 uint64_t Graphicsaddress4712 : __CODEGEN_BITFIELD(12, 47) ; //!< GraphicsAddress47-12 162 uint64_t Reserved48 : __CODEGEN_BITFIELD(48, 63) ; //!< Reserved 163 }; 164 uint32_t Value[2]; 165 } DW0_1; 166 167 //! \name Local enumerations 168 169 //! \name Initializations 170 171 //! \brief Explicit member initialization function 172 SPLITBASEADDRESS4KBYTEALIGNED_CMD(); 173 174 static const size_t dwSize = 2; 175 static const size_t byteSize = 8; 176 }; 177 178 //! 179 //! \brief HUC_PIPE_MODE_SELECT 180 //! \details 181 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 182 //! Commands. Each HUC command has assigned a media instruction command as 183 //! defined in DWord 0, BitField 22:16. 184 //! 185 //! The HUC_PIPE_MODE_SELECT command is responsible for general pipeline 186 //! level configuration that would normally be set once for a single stream 187 //! decode and would not be modified on a frame workload basis. 188 //! 189 struct HUC_PIPE_MODE_SELECT_CMD 190 { 191 union 192 { 193 struct 194 { 195 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 196 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 197 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 198 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 199 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 200 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 201 }; 202 uint32_t Value; 203 } DW0; 204 union 205 { 206 struct 207 { 208 uint32_t Reserved32 : __CODEGEN_BITFIELD( 0, 3) ; //!< Reserved 209 uint32_t IndirectStreamOutEnable : __CODEGEN_BITFIELD( 4, 4) ; //!< INDIRECT_STREAM_OUT_ENABLE 210 uint32_t Reserved37 : __CODEGEN_BITFIELD( 5, 31) ; //!< Reserved 211 }; 212 uint32_t Value; 213 } DW1; 214 union 215 { 216 struct 217 { 218 uint32_t MediaSoftResetCounterPer1000Clocks ; //!< MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS 219 }; 220 uint32_t Value; 221 } DW2; 222 223 //! \name Local enumerations 224 225 enum MEDIA_INSTRUCTION_COMMAND 226 { 227 MEDIA_INSTRUCTION_COMMAND_HUCPIPEMODESELECT = 0, //!< No additional details 228 }; 229 230 //! \brief MEDIA_INSTRUCTION_OPCODE 231 //! \details 232 //! Codec/Engine Name = HUP = Bh 233 enum MEDIA_INSTRUCTION_OPCODE 234 { 235 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 236 }; 237 238 enum PIPELINE_TYPE 239 { 240 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 241 }; 242 243 enum COMMAND_TYPE 244 { 245 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 246 }; 247 248 //! \brief INDIRECT_STREAM_OUT_ENABLE 249 //! \details 250 //! Enables the bitstream to be written out to memory immediately following 251 //! the output of the bit stream. The memory buffer is addressed through 252 //! the HuC Indirect Stream Out ObjectBase Address. 253 enum INDIRECT_STREAM_OUT_ENABLE 254 { 255 INDIRECT_STREAM_OUT_ENABLE_DISABLEINDIRECTSTREAMOUT = 0, //!< No additional details 256 INDIRECT_STREAM_OUT_ENABLE_ENABLEINDIRECTSTREAMOUT = 1, //!< No additional details 257 }; 258 259 //! \brief MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS 260 //! \details 261 //! In decoder modes, this counter value specifies the number of clocks (per 262 //! 1000) of GAC inactivity 263 //! before a media soft-reset is applied to the HCP and HuC. If counter 264 //! value is set to 0, the media 265 //! soft-reset feature is disabled and no reset will occur. 266 //! In encoder modes, this counter must be set to 0 to disable media 267 //! soft reset. This feature is not 268 //! supported for the encoder. 269 enum MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS 270 { 271 MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS_DISABLE = 0, //!< No additional details 272 }; 273 274 //! \name Initializations 275 276 //! \brief Explicit member initialization function 277 HUC_PIPE_MODE_SELECT_CMD(); 278 279 static const size_t dwSize = 3; 280 static const size_t byteSize = 12; 281 }; 282 283 //! 284 //! \brief HUC_IMEM_STATE 285 //! \details 286 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 287 //! Commands. Each HUC command has assigned a media instruction command as 288 //! defined in DWord 0, BitField 22:16. 289 //! 290 //! The HUC_IMEM_STATE command is used to fetch the HUC firmware from the 291 //! WOPCM region and load it into the HUC 96KB L2 storage RAM. The 292 //! HUC_IMEM_STATE specifies the firmware's offset in WOPCM which is a cache 293 //! line aligned 32-bit offset address. The firmware, code and data segment 294 //! size should always be less than 96KB. If its greater than 96KB then the 295 //! firmware should be broken into smaller functions so that there is no 296 //! firmware straddling case. 297 //! When the HUC_IMEM_STATE command is received, the hardware confirms that 298 //! the code has been successfully authenticated by checking the VCR 299 //! provided authentication successful signal. If this signal is asserted, 300 //! the firmware is loaded by the HUC DMA into the 96KB L2 storage RAM. Once 301 //! the firmware is loaded, the VALID IMEM LOADED bit in the HUC_STATUS2 302 //! register is asserted high in the. If the authentication signal is not 303 //! asserted, the DMA aborts the HUC_IMEM_STATE command, the firmware is not 304 //! loaded, and the VALID IMEM LOADED bit remains low. 305 //! 306 struct HUC_IMEM_STATE_CMD 307 { 308 union 309 { 310 struct 311 { 312 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 313 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 314 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 315 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 316 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 317 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 318 }; 319 uint32_t Value; 320 } DW0; 321 union 322 { 323 struct 324 { 325 uint32_t Reserved32 ; //!< Reserved 326 }; 327 uint32_t Value; 328 } DW1; 329 union 330 { 331 struct 332 { 333 uint32_t Reserved64 ; //!< Reserved 334 }; 335 uint32_t Value; 336 } DW2; 337 union 338 { 339 struct 340 { 341 uint32_t Reserved96 ; //!< Reserved 342 }; 343 uint32_t Value; 344 } DW3; 345 union 346 { 347 struct 348 { 349 uint32_t HucFirmwareDescriptor : __CODEGEN_BITFIELD( 0, 7) ; //!< HUC_FIRMWARE_DESCRIPTOR 350 uint32_t Reserved136 : __CODEGEN_BITFIELD( 8, 31) ; //!< Reserved 351 }; 352 uint32_t Value; 353 } DW4; 354 355 //! \name Local enumerations 356 357 enum MEDIA_INSTRUCTION_COMMAND 358 { 359 MEDIA_INSTRUCTION_COMMAND_HUCIMEMSTATE = 1, //!< No additional details 360 }; 361 362 //! \brief MEDIA_INSTRUCTION_OPCODE 363 //! \details 364 //! Codec/Engine Name = HUC = Bh 365 enum MEDIA_INSTRUCTION_OPCODE 366 { 367 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 368 }; 369 370 enum PIPELINE_TYPE 371 { 372 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 373 }; 374 375 enum COMMAND_TYPE 376 { 377 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 378 }; 379 380 //! \brief HUC_FIRMWARE_DESCRIPTOR 381 //! \details 382 //! This field specifies 1 of 255 firmware descriptors which describe 383 //! which firmware is be loaded in the L2 storage RAM. If the firmware 384 //! descriptor is set to zero, the HUC will not load the firmware. 385 enum HUC_FIRMWARE_DESCRIPTOR 386 { 387 HUC_FIRMWARE_DESCRIPTOR_UNNAMED0 = 0, //!< Illegal 388 }; 389 390 //! \name Initializations 391 392 //! \brief Explicit member initialization function 393 HUC_IMEM_STATE_CMD(); 394 395 static const size_t dwSize = 5; 396 static const size_t byteSize = 20; 397 }; 398 399 //! 400 //! \brief HUC_DMEM_STATE 401 //! \details 402 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 403 //! Commands. Each HUC command has assigned a media instruction command as 404 //! defined in DWord 0, BitField 22:16. 405 //! 406 //! The HUC_DMEM_STATE command is used to fetch the HUC data from the 407 //! graphics memory and load it into the HUC 96KB L2 storage RAM. The 408 //! HUC_DMEM_STATE specifies the data source base address in graphics 409 //! memory. 410 //! 411 //! When the HUC_DMEM_STATE command is received, the data is loaded by the 412 //! HUC DMA into the 96KB L2 storage RAM at the location provided in the 413 //! HUC_DMEM_STATE command. This command also specifies the length of the 414 //! data, which is specified in bytes but must be in increments of 64 byte 415 //! cache lines. 416 //! 417 struct HUC_DMEM_STATE_CMD 418 { 419 union 420 { 421 struct 422 { 423 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 424 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 425 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 426 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 427 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 428 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 429 }; 430 uint32_t Value; 431 } DW0; 432 SPLITBASEADDRESS64BYTEALIGNED_CMD HucDataSourceBaseAddress; //!< DW1..2, HUC Data Source - Base Address 433 MEMORYADDRESSATTRIBUTES_CMD HucDataSourceAttributes; //!< DW3, HUC Data Source - Attributes 434 union 435 { 436 struct 437 { 438 uint32_t Reserved128 : __CODEGEN_BITFIELD( 0, 5) ; //!< Reserved 439 uint32_t HucDataDestinationBaseAddress : __CODEGEN_BITFIELD( 6, 16) ; //!< HUC Data Destination Base Address 440 uint32_t Reserved145 : __CODEGEN_BITFIELD(17, 31) ; //!< Reserved 441 }; 442 uint32_t Value; 443 } DW4; 444 union 445 { 446 struct 447 { 448 uint32_t Reserved160 : __CODEGEN_BITFIELD( 0, 5) ; //!< Reserved 449 uint32_t HucDataLength : __CODEGEN_BITFIELD( 6, 16) ; //!< HUC Data Length 450 uint32_t Reserved177 : __CODEGEN_BITFIELD(17, 31) ; //!< Reserved 451 }; 452 uint32_t Value; 453 } DW5; 454 455 //! \name Local enumerations 456 457 enum MEDIA_INSTRUCTION_COMMAND 458 { 459 MEDIA_INSTRUCTION_COMMAND_HUCDMEMSTATE = 2, //!< No additional details 460 }; 461 462 //! \brief MEDIA_INSTRUCTION_OPCODE 463 //! \details 464 //! Codec/Engine Name = HUC = Bh 465 enum MEDIA_INSTRUCTION_OPCODE 466 { 467 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 468 }; 469 470 enum PIPELINE_TYPE 471 { 472 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 473 }; 474 475 enum COMMAND_TYPE 476 { 477 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 478 }; 479 480 //! \name Initializations 481 482 //! \brief Explicit member initialization function 483 HUC_DMEM_STATE_CMD(); 484 485 static const size_t dwSize = 6; 486 static const size_t byteSize = 24; 487 }; 488 489 //! 490 //! \brief HUC_CFG_STATE 491 //! \details 492 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 493 //! Commands. Each HUC command has assigned a media instruction command as 494 //! defined in DWord 0, BitField 22:16. 495 //! 496 //! The HUC_CFG_STATE command is used to force the P24C (MinuteIA) into a 497 //! reset condition as well as forcing it out of a reset condition. This 498 //! command is not normally required since the hardware will handle placing 499 //! the P24C into a reset condition and releasing it from reset, but there 500 //! may be conditions that require a forced reset. 501 //! 502 struct HUC_CFG_STATE_CMD 503 { 504 union 505 { 506 struct 507 { 508 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 509 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 510 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 511 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 512 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 513 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 514 }; 515 uint32_t Value; 516 } DW0; 517 union 518 { 519 struct 520 { 521 uint32_t P24CMinuteia : __CODEGEN_BITFIELD( 0, 0) ; //!< P24C_MINUTEIA 522 uint32_t Reserved33 : __CODEGEN_BITFIELD( 1, 31) ; //!< Reserved 523 }; 524 uint32_t Value; 525 } DW1; 526 527 //! \name Local enumerations 528 529 enum MEDIA_INSTRUCTION_COMMAND 530 { 531 MEDIA_INSTRUCTION_COMMAND_HUCCFGSTATE = 3, //!< No additional details 532 }; 533 534 //! \brief MEDIA_INSTRUCTION_OPCODE 535 //! \details 536 //! Codec/Engine Name = HUC = Bh 537 enum MEDIA_INSTRUCTION_OPCODE 538 { 539 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 540 }; 541 542 enum PIPELINE_TYPE 543 { 544 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 545 }; 546 547 enum COMMAND_TYPE 548 { 549 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 550 }; 551 552 enum P24C_MINUTEIA 553 { 554 P24C_MINUTEIA_NORMALOPERATION = 0, //!< No reset. 555 P24C_MINUTEIA_FORCERESET = 1, //!< No additional details 556 }; 557 558 //! \name Initializations 559 560 //! \brief Explicit member initialization function 561 HUC_CFG_STATE_CMD(); 562 563 static const size_t dwSize = 2; 564 static const size_t byteSize = 8; 565 }; 566 567 //! 568 //! \brief HUC_VIRTUAL_ADDR_REGION 569 //! \details 570 //! 571 //! 572 struct HUC_VIRTUAL_ADDR_REGION_CMD 573 { 574 SPLITBASEADDRESS4KBYTEALIGNED_CMD HucSurfaceBaseAddressVirtualaddrregion015; //!< DW0..2, HUC Surface Base Address (VirtualAddrRegion[0-15]) 575 MEMORYADDRESSATTRIBUTES_CMD HucSurfaceVirtualaddrregion015; //!< DW0..2, HUC Surface (VirtualAddrRegion[0-15]) 576 577 //! \name Local enumerations 578 579 //! \name Initializations 580 581 //! \brief Explicit member initialization function 582 HUC_VIRTUAL_ADDR_REGION_CMD(); 583 584 static const size_t dwSize = 3; 585 static const size_t byteSize = 12; 586 }; 587 588 //! 589 //! \brief HUC_VIRTUAL_ADDR_STATE 590 //! \details 591 //! HUC is selected with the Media Instruction Opcode "Bh" for all HUC 592 //! Commands. Each HUC command has assigned a media instruction command as 593 //! defined in DWord 0, BitField 22:16. 594 //! 595 //! The HUC_VIRTUAL_ADDR_STATE command is used to define the 48-bit HUC 596 //! Surface Base Address and HUC Surface for each region. 597 //! 598 struct HUC_VIRTUAL_ADDR_STATE_CMD 599 { 600 union 601 { 602 struct 603 { 604 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 605 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 606 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 607 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 608 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 609 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 610 }; 611 uint32_t Value; 612 } DW0; 613 HUC_VIRTUAL_ADDR_REGION_CMD HucVirtualAddressRegion[16]; //!< DW1..48, Huc Virtual Address Region 614 615 //! \name Local enumerations 616 617 enum MEDIA_INSTRUCTION_COMMAND 618 { 619 MEDIA_INSTRUCTION_COMMAND_HUCVIRTUALADDRSTATE = 4, //!< No additional details 620 }; 621 622 //! \brief MEDIA_INSTRUCTION_OPCODE 623 //! \details 624 //! Codec/Engine Name = HUC = Bh 625 enum MEDIA_INSTRUCTION_OPCODE 626 { 627 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 628 }; 629 630 enum PIPELINE_TYPE 631 { 632 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 633 }; 634 635 enum COMMAND_TYPE 636 { 637 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 638 }; 639 640 //! \name Initializations 641 642 //! \brief Explicit member initialization function 643 HUC_VIRTUAL_ADDR_STATE_CMD(); 644 645 static const size_t dwSize = 49; 646 static const size_t byteSize = 196; 647 }; 648 649 //! 650 //! \brief HUC_IND_OBJ_BASE_ADDR_STATE 651 //! \details 652 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 653 //! Commands. Each HUC command has assigned a media instruction command as 654 //! defined in DWord 0, BitField 22:16. 655 //! 656 //! The HUC_IND_OBJ_BASE_ADDR_STATE command is used to define the indirect 657 //! object base address of the stream in graphics memory. This is a frame 658 //! level command. 659 //! 660 struct HUC_IND_OBJ_BASE_ADDR_STATE_CMD 661 { 662 union 663 { 664 struct 665 { 666 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 667 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 668 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 669 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 670 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 671 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 672 }; 673 uint32_t Value; 674 } DW0; 675 SPLITBASEADDRESS4KBYTEALIGNED_CMD HucIndirectStreamInObjectbaseAddress; //!< DW1..2, HUC Indirect Stream In ObjectBase Address 676 MEMORYADDRESSATTRIBUTES_CMD HucIndirectStreamInObjectbaseAttributes; //!< DW3, HUC Indirect Stream In ObjectBase Attributes 677 SPLITBASEADDRESS4KBYTEALIGNED_CMD HucIndirectStreamInObjectaccessUpperBound; //!< DW4..5, HUC Indirect Stream In ObjectAccess Upper Bound 678 SPLITBASEADDRESS4KBYTEALIGNED_CMD HucIndirectStreamOutObjectbaseAddress; //!< DW6..7, HUC Indirect Stream Out ObjectBase Address 679 MEMORYADDRESSATTRIBUTES_CMD HucIndirectStreamOutObjectbaseAttributes; //!< DW8, HUC Indirect Stream Out ObjectBase Attributes 680 SPLITBASEADDRESS4KBYTEALIGNED_CMD HucIndirectStreamOutObjectaccessUpperBound; //!< DW9..10, HUC Indirect Stream Out ObjectAccess Upper Bound 681 682 //! \name Local enumerations 683 684 enum MEDIA_INSTRUCTION_COMMAND 685 { 686 MEDIA_INSTRUCTION_COMMAND_HUCINDOBJBASEADDRSTATE = 5, //!< No additional details 687 }; 688 689 //! \brief MEDIA_INSTRUCTION_OPCODE 690 //! \details 691 //! Codec/Engine Name = HUC = Bh 692 enum MEDIA_INSTRUCTION_OPCODE 693 { 694 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 695 }; 696 697 enum PIPELINE_TYPE 698 { 699 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 700 }; 701 702 enum COMMAND_TYPE 703 { 704 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 705 }; 706 707 //! \name Initializations 708 709 //! \brief Explicit member initialization function 710 HUC_IND_OBJ_BASE_ADDR_STATE_CMD(); 711 712 static const size_t dwSize = 11; 713 static const size_t byteSize = 44; 714 }; 715 716 //! 717 //! \brief HUC_STREAM_OBJECT 718 //! \details 719 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 720 //! Commands. Each HUC command has assigned a media instruction command as 721 //! defined in DWord 0, BitField 22:16. 722 //! 723 //! The HUC_STREAM_OBJECT command is used to define the bit stream address 724 //! offset to the Stream Indirect Object base Address and the length of the 725 //! bit stream. The bitstream buffer the HUC operates upon is specified 726 //! through indirect addressing. 727 //! 728 struct HUC_STREAM_OBJECT_CMD 729 { 730 union 731 { 732 struct 733 { 734 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 735 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 736 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 737 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 738 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 739 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 740 }; 741 uint32_t Value; 742 } DW0; 743 union 744 { 745 struct 746 { 747 uint32_t IndirectStreamInDataLength ; //!< Indirect Stream In Data Length 748 }; 749 uint32_t Value; 750 } DW1; 751 union 752 { 753 struct 754 { 755 uint32_t IndirectStreamInStartAddress : __CODEGEN_BITFIELD( 0, 28) ; //!< Indirect Stream In Start Address 756 uint32_t Reserved93 : __CODEGEN_BITFIELD(29, 30) ; //!< Reserved 757 uint32_t HucProcessing : __CODEGEN_BITFIELD(31, 31) ; //!< HUC_PROCESSING 758 }; 759 uint32_t Value; 760 } DW2; 761 union 762 { 763 struct 764 { 765 uint32_t IndirectStreamOutStartAddress : __CODEGEN_BITFIELD( 0, 28) ; //!< Indirect Stream Out Start Address 766 uint32_t Reserved125 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 767 }; 768 uint32_t Value; 769 } DW3; 770 union 771 { 772 struct 773 { 774 uint32_t StartCodeByte0 : __CODEGEN_BITFIELD( 0, 7) ; //!< Start Code Byte [0] 775 uint32_t StartCodeByte1 : __CODEGEN_BITFIELD( 8, 15) ; //!< Start Code Byte [1] 776 uint32_t StartCodeByte2 : __CODEGEN_BITFIELD(16, 23) ; //!< Start Code Byte [2] 777 uint32_t StartCodeSearchEngine : __CODEGEN_BITFIELD(24, 24) ; //!< START_CODE_SEARCH_ENGINE 778 uint32_t EmulationPreventionByteRemoval : __CODEGEN_BITFIELD(25, 25) ; //!< EMULATION_PREVENTION_BYTE_REMOVAL 779 uint32_t StreamOut : __CODEGEN_BITFIELD(26, 26) ; //!< STREAM_OUT 780 uint32_t Drmlengthmode : __CODEGEN_BITFIELD(27, 28) ; //!< DRMLENGTHMODE 781 uint32_t HucBitstreamEnable : __CODEGEN_BITFIELD(29, 29) ; //!< HUC_BITSTREAM_ENABLE 782 uint32_t Reserved158 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 783 }; 784 uint32_t Value; 785 } DW4; 786 787 //! \name Local enumerations 788 789 enum MEDIA_INSTRUCTION_COMMAND 790 { 791 MEDIA_INSTRUCTION_COMMAND_HUCSTREAMOBJECT = 32, //!< No additional details 792 }; 793 794 //! \brief MEDIA_INSTRUCTION_OPCODE 795 //! \details 796 //! Codec/Engine Name = HUC = Bh 797 enum MEDIA_INSTRUCTION_OPCODE 798 { 799 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 800 }; 801 802 enum PIPELINE_TYPE 803 { 804 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 805 }; 806 807 enum COMMAND_TYPE 808 { 809 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 810 }; 811 812 //! \brief HUC_PROCESSING 813 //! \details 814 //! Disables the HEVC Decoder CABAC engine to prevent it from starting 815 //! while the HuC is processing. Must be set to "1" for HUC processing so 816 //! that the stream is directed to the HuC and not the CABAC engine. 817 enum HUC_PROCESSING 818 { 819 HUC_PROCESSING_DISABLE = 1, //!< No additional details 820 }; 821 822 enum START_CODE_SEARCH_ENGINE 823 { 824 START_CODE_SEARCH_ENGINE_DISABLE = 0, //!< Bypass Start Code Search Engine 825 START_CODE_SEARCH_ENGINE_ENABLE = 1, //!< Enables the start code search engine to stop on every third byte start code defined by Start Code Byte [2:0] defined in this DWord. 826 }; 827 828 enum EMULATION_PREVENTION_BYTE_REMOVAL 829 { 830 EMULATION_PREVENTION_BYTE_REMOVAL_DISABLE = 0, //!< Bypass Emulation Prevention Byte Removal. 831 EMULATION_PREVENTION_BYTE_REMOVAL_ENABLE = 1, //!< Emulation prevention bytes will be removed after the start code search engine. 832 }; 833 834 //! \brief STREAM_OUT 835 //! \details 836 //! Enables the stream output. 837 enum STREAM_OUT 838 { 839 STREAM_OUT_DISABLE = 0, //!< Disable the stream output. 840 STREAM_OUT_ENABLE = 1, //!< Enable the stream output. 841 }; 842 843 enum DRMLENGTHMODE 844 { 845 DRMLENGTHMODE_STARTCODEMODE = 0, //!< Stops on a start code 846 DRMLENGTHMODE_LENGTHMODE = 1, //!< Stops after a number of bytes are reached in the length counter 847 }; 848 849 //! \brief HUC_BITSTREAM_ENABLE 850 //! \details 851 //! style="color: rgb(0, 0, 0); font-family: Arial, sans-serif; 852 //! line-height: normal;">Enables the bitstream to be sent to the HuC 853 enum HUC_BITSTREAM_ENABLE 854 { 855 HUC_BITSTREAM_ENABLE_DISABLE = 0, //!< No additional details 856 HUC_BITSTREAM_ENABLE_ENABLE = 1, //!< No additional details 857 }; 858 859 //! \name Initializations 860 861 //! \brief Explicit member initialization function 862 HUC_STREAM_OBJECT_CMD(); 863 864 static const size_t dwSize = 5; 865 static const size_t byteSize = 20; 866 }; 867 868 //! 869 //! \brief HUC_START 870 //! \details 871 //! The HUC is selected with the Media Instruction Opcode "Bh" for all HUC 872 //! Commands. Each HUC command has assigned a media instruction command as 873 //! defined in DWord 0, BitField 22:16. 874 //! 875 struct HUC_START_CMD 876 { 877 union 878 { 879 struct 880 { 881 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 882 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 883 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22) ; //!< MEDIA_INSTRUCTION_COMMAND 884 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_INSTRUCTION_OPCODE 885 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE_TYPE 886 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 887 }; 888 uint32_t Value; 889 } DW0; 890 union 891 { 892 struct 893 { 894 uint32_t Laststreamobject : __CODEGEN_BITFIELD( 0, 0) ; //!< LASTSTREAMOBJECT 895 uint32_t Reserved33 : __CODEGEN_BITFIELD( 1, 31) ; //!< Reserved 896 }; 897 uint32_t Value; 898 } DW1; 899 900 //! \name Local enumerations 901 902 enum MEDIA_INSTRUCTION_COMMAND 903 { 904 MEDIA_INSTRUCTION_COMMAND_HUCSTART = 33, //!< No additional details 905 }; 906 907 //! \brief MEDIA_INSTRUCTION_OPCODE 908 //! \details 909 //! Codec/Engine Name = HUC = Bh 910 enum MEDIA_INSTRUCTION_OPCODE 911 { 912 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 11, //!< No additional details 913 }; 914 915 enum PIPELINE_TYPE 916 { 917 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 918 }; 919 920 enum COMMAND_TYPE 921 { 922 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 923 }; 924 925 enum LASTSTREAMOBJECT 926 { 927 LASTSTREAMOBJECT_NOTLASTSTREAMOBJECT = 0, //!< Not the last stream object in the workload. 928 LASTSTREAMOBJECT_LASTSTREAMOBJECT = 1, //!< Last stream object in the workload. 929 }; 930 931 //! \name Initializations 932 933 //! \brief Explicit member initialization function 934 HUC_START_CMD(); 935 936 static const size_t dwSize = 2; 937 static const size_t byteSize = 8; 938 }; 939 940 }; 941 942 #pragma pack() 943 944 #endif // __MHW_VDBOX_HUC_HWCMD_G12_X_H__