1 /*===================== begin_copyright_notice ================================== 2 3 # Copyright (c) 2022-2024, Intel Corporation 4 5 # Permission is hereby granted, free of charge, to any person obtaining a 6 # copy of this software and associated documentation files (the "Software"), 7 # to deal in the Software without restriction, including without limitation 8 # the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 # and/or sell copies of the Software, and to permit persons to whom the 10 # Software is furnished to do so, subject to the following conditions: 11 12 # The above copyright notice and this permission notice shall be included 13 # in all copies or substantial portions of the Software. 14 15 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 16 # OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 # OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 # OTHER DEALINGS IN THE SOFTWARE. 22 23 ======================= end_copyright_notice ==================================*/ 24 //! 25 //! \file mhw_vdbox_avp_hwcmd_xe_lpm_plus.h 26 //! \brief Auto-generated constructors for MHW and states. 27 //! \details This file may not be included outside of Xe_LPM_plus as other components 28 //! should use MHW interface to interact with MHW commands and states. 29 //! 30 31 // DO NOT EDIT 32 33 #ifndef __MHW_VDBOX_AVP_HWCMD_XE_LPM_PLUS_H__ 34 #define __MHW_VDBOX_AVP_HWCMD_XE_LPM_PLUS_H__ 35 36 #pragma once 37 #pragma pack(1) 38 39 #include "mhw_hwcmd.h" 40 #include <cstdint> 41 #include <cstddef> 42 #include "media_class_trace.h" 43 44 #ifdef IGFX_AVP_INTERFACE_EXT_SUPPORT 45 #include "mhw_vdbox_avp_hwcmd_ext.h" 46 #endif 47 48 49 namespace mhw 50 { 51 namespace vdbox 52 { 53 namespace avp 54 { 55 namespace xe_lpm_plus_base 56 { 57 namespace v0 58 { 59 class Cmd 60 { 61 public: 62 virtual ~Cmd() = default; 63 GetOpLength(uint32_t uiLength)64 static uint32_t GetOpLength(uint32_t uiLength) { return __CODEGEN_OP_LENGTH(uiLength); } 65 66 //! 67 //! \brief MEMORYADDRESSATTRIBUTES 68 //! \details 69 //! This field controls the priority of arbitration used in the GAC/GAM 70 //! pipeline for this surface. It defines the attributes for VDBOX addresses 71 //! on BDW+. 72 //! 73 struct MEMORYADDRESSATTRIBUTES_CMD 74 { 75 union 76 { 77 struct 78 { 79 uint32_t Reserved0 : __CODEGEN_BITFIELD(0, 0); //!< Reserved 80 uint32_t BaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD(1, 6); //!< Base Address - Index to Memory Object Control State (MOCS) Tables 81 uint32_t BaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD(7, 8); //!< Base Address - Arbitration Priority Control 82 uint32_t BaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD(9, 9); //!< Base Address - Memory Compression Enable 83 uint32_t CompressionType : __CODEGEN_BITFIELD(10, 10); //!< COMPRESSION_TYPE 84 uint32_t Reserved11 : __CODEGEN_BITFIELD(11, 11); //!< Reserved 85 uint32_t BaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12); //!< BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 86 uint32_t TileMode : __CODEGEN_BITFIELD(13, 14); //!< TILEMODE 87 uint32_t MediaLevel2CachingEnable : __CODEGEN_BITFIELD(15, 15); //!< MEDIA_LEVEL_2_CACHING_ENABLE 88 uint32_t Reserved16 : __CODEGEN_BITFIELD(16, 31); //!< Reserved 89 }; 90 uint32_t Value; 91 } DW0; 92 93 //! \name Local enumerations 94 95 //! \brief COMPRESSION_TYPE 96 //! \details 97 //! Indicates if buffer is render/media compressed. 98 enum COMPRESSION_TYPE 99 { 100 COMPRESSION_TYPE_MEDIACOMPRESSIONENABLE = 0, //!< No additional details 101 COMPRESSION_TYPE_RENDERCOMPRESSIONENABLE = 1, //!< Only support rendered compression with unified memory 102 }; 103 104 //! \brief BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 105 //! \details 106 //! This field controls if the Row Store is going to store inside Media 107 //! Cache (rowstore cache) or to LLC. 108 enum BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 109 { 110 BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED0 = 0, //!< Buffer going to LLC. 111 BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1 = 1, //!< Buffer going to Internal Media Storage. 112 }; 113 114 enum TILEMODE 115 { 116 TILEMODE_LINEAR = 0, //!< No additional details 117 TILEMODE_TILES_64K = 1, //!< No additional details 118 TILEMODE_TILEX = 2, //!< No additional details 119 TILEMODE_TILEF = 3, //!< No additional details 120 }; 121 122 enum MEDIA_LEVEL_2_CACHING_ENABLE 123 { 124 MEDIA_LEVEL_2_CACHING_ENABLE_DISABLEMEDIACACHE = 0, //!< No additional details 125 MEDIA_LEVEL_2_CACHING_ENABLE_ENABLEMEDIACACHE = 1, //!< No additional details 126 }; 127 128 //! \name Initializations 129 130 //! \brief Explicit member initialization function 131 MEMORYADDRESSATTRIBUTES_CMD(); 132 133 static const size_t dwSize = 1; 134 static const size_t byteSize = 4; 135 }; 136 137 //! 138 //! \brief SPLITBASEADDRESS4KBYTEALIGNED 139 //! \details 140 //! Specifies a 64-bit (48-bit canonical) 4K-byte aligned memory base 141 //! address. GraphicsAddress is a 64-bit value [63:0], but only a portion of 142 //! it is used by hardware. The upper reserved bits are ignored and MBZ. 143 //! 144 //! Bits 63:48 must be zero. 145 //! 146 struct SPLITBASEADDRESS4KBYTEALIGNED_CMD 147 { 148 union 149 { 150 struct 151 { 152 uint64_t Reserved64 : __CODEGEN_BITFIELD(0, 11); //!< Reserved 153 uint64_t BaseAddress : __CODEGEN_BITFIELD(12, 56); //!< Base Address 154 uint64_t Reserved121 : __CODEGEN_BITFIELD(57, 63); //!< Reserved 155 }; 156 uint32_t Value[2]; 157 } DW0_1; 158 159 //! \name Local enumerations 160 161 //! \name Initializations 162 163 //! \brief Explicit member initialization function 164 SPLITBASEADDRESS4KBYTEALIGNED_CMD(); 165 166 static const size_t dwSize = 2; 167 static const size_t byteSize = 8; 168 }; 169 170 //! 171 //! \brief SPLITBASEADDRESS64BYTEALIGNED 172 //! \details 173 //! Specifies a 64-bit (48-bit canonical) 64-byte aligned memory base 174 //! address. 175 //! 176 //! Bits 63:48 must be zero. 177 //! 178 struct SPLITBASEADDRESS64BYTEALIGNED_CMD 179 { 180 union 181 { 182 struct 183 { 184 uint64_t Reserved64 : __CODEGEN_BITFIELD(0, 5); //!< Reserved 185 uint64_t BaseAddress : __CODEGEN_BITFIELD(6, 56); //!< Base Address 186 uint64_t Reserved121 : __CODEGEN_BITFIELD(57, 63); //!< Reserved 187 }; 188 uint32_t Value[2]; 189 } DW0_1; 190 191 //! \name Local enumerations 192 193 //! \name Initializations 194 195 //! \brief Explicit member initialization function 196 SPLITBASEADDRESS64BYTEALIGNED_CMD(); 197 198 static const size_t dwSize = 2; 199 static const size_t byteSize = 8; 200 }; 201 202 //! 203 //! \brief VD_CONTROL_STATE_BODY 204 //! \details 205 //! 206 //! 207 struct VD_CONTROL_STATE_BODY_CMD 208 { 209 union 210 { 211 struct 212 { 213 uint32_t PipelineInitialization : __CODEGEN_BITFIELD(0, 0); //!< Pipeline Initialization 214 uint32_t Reserved1 : __CODEGEN_BITFIELD(1, 31); //!< Reserved 215 }; 216 uint32_t Value; 217 } DW0; 218 union 219 { 220 struct 221 { 222 uint32_t ScalableModePipeLock : __CODEGEN_BITFIELD(0, 0); //!< Scalable Mode Pipe Lock 223 uint32_t ScalableModePipeUnlock : __CODEGEN_BITFIELD(1, 1); //!< Scalable Mode Pipe Unlock 224 uint32_t MemoryImplicitFlush : __CODEGEN_BITFIELD(2, 2); //!< Memory Implicit Flush 225 uint32_t Reserved35 : __CODEGEN_BITFIELD(3, 31); //!< Reserved 226 }; 227 uint32_t Value; 228 } DW1; 229 230 //! \name Local enumerations 231 232 //! \name Initializations 233 234 //! \brief Explicit member initialization function 235 VD_CONTROL_STATE_BODY_CMD(); 236 237 static const size_t dwSize = 2; 238 static const size_t byteSize = 8; 239 }; 240 241 //! 242 //! \brief AVP_BSD_OBJECT 243 //! \details 244 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 245 //! all AVP Commands. Each AVP command has assigned a media instruction 246 //! command as defined in DWord 0, BitField 22:16. 247 //! 248 //! style="margin:0in 0in 7.5pt"> The AVP_BSD_OBJECT command sends to 249 //! HW a tile at a time from an AV1 bitstream, starting with the first coded 250 //! byte of the tile, not including the prefixed tile byte size. The bit 251 //! stream of a tile, tile group, and of a frame may end with trailing bits 252 //! and extra padding zero bytes. The prefixed tile byte size includes all 253 //! the trailing bits and padding zero bytes at the end of a tile. 254 //! style="margin:0in 0in 7.5pt">Each tile's coded/compressed bitstream is 255 //! started and ended at a byte boundary. style="margin:0in 0in 7.5pt">HW 256 //! is not required to parse the trailing bits and padding zero bytes. HW 257 //! can stop processing right after it has completed the decoding of the 258 //! last block in the tile. Potentially, error checkng can be implemented to 259 //! detect the trailing bits and padding zeros, but is not implemented in 260 //! this generation of AVP Pipeline. style="margin:0in 0in 7.5pt"> 261 //! here can be multiple tiles in an AV1 frame and thus this command can be 262 //! issued multiple times per frame. A coded frame minumum has at least 1 263 //! tile definition, i.e a tile can cover the entire frame, unless the frame 264 //! size exceeds the max allowed tile size limits in pixels, then the frame 265 //! must contain more than 1 tile. There is no compressed 266 //! header in AV1, hence AVP_BSD_OBJECT command is only used to process the 267 //! bitstream of each individual tile of a frame. 268 //! style="margin:0in 0in 7.5pt; text-align:start; 269 //! -webkit-text-stroke-width:0px"> The AVP_BSD_OBJECT command 270 //! must be the last command issued in the sequence of batch commands before 271 //! the AVP Pipeline starts decoding. Prior to issuing this command, it is 272 //! assumed that all configuration parameters needed by the AVP Pipeline 273 //! have been loaded in a specific order,including workload configuration 274 //! registers and configuration tables. When this command is issued, the AVP 275 //! Pipeline is waiting for bitstream data to be presented to its bitstream 276 //! input shift register. 277 //! 278 struct AVP_BSD_OBJECT_CMD 279 { 280 union 281 { 282 struct 283 { 284 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 285 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 286 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 287 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 288 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 289 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 290 }; 291 uint32_t Value; 292 } DW0; 293 union 294 { 295 struct 296 { 297 uint32_t TileIndirectBsdDataLength; //!< Tile Indirect BSD Data Length 298 }; 299 uint32_t Value; 300 } DW1; 301 union 302 { 303 struct 304 { 305 uint32_t TileIndirectDataStartAddress; //!< Tile Indirect Data Start Address 306 }; 307 uint32_t Value; 308 } DW2; 309 310 //! \name Local enumerations 311 312 enum MEDIA_INSTRUCTION_COMMAND 313 { 314 MEDIA_INSTRUCTION_COMMAND_AVPBSDOBJECTSTATE = 32, //!< No additional details 315 }; 316 317 //! \brief MEDIA_INSTRUCTION_OPCODE 318 //! \details 319 //! Codec/Engine Name = AV1 = 3h 320 enum MEDIA_INSTRUCTION_OPCODE 321 { 322 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 323 }; 324 325 enum PIPELINE_TYPE 326 { 327 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 328 }; 329 330 enum COMMAND_TYPE 331 { 332 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 333 }; 334 335 //! \name Initializations 336 337 //! \brief Explicit member initialization function 338 AVP_BSD_OBJECT_CMD(); 339 340 static const size_t dwSize = 3; 341 static const size_t byteSize = 12; 342 }; 343 344 //! 345 //! \brief AVP_PIC_STATE 346 //! \details 347 //! All AVP_PIC_STATE should stay the same for the whole frame even if 348 //! AVP_PIC_STATE is re-programmed for every tiles. The bitfields of 349 //! AVP_PIC_STATE are defined either from 1) syntax elements of the 350 //! uncompressed sequence header (received from sequence_header_obu) and of 351 //! the uncompressed frame header (received from frame_header_obu), 2) or, 352 //! parameters derived from 1). Note : Bitstreams may contain several 353 //! copies of the frame header (there can only be one frame_header_obu, but 354 //! multiple redundant_frame_header_obu)interspersed with tile_group_obu to 355 //! allow for greater error resilience. However, the copies must contain 356 //! identical contents to the original frame_header_obu. Note : there 357 //! should be only one sequence_header_obu per video sequence. Note : AVP 358 //! pipeline is invoked to decode a frame from the bitstream, only if that 359 //! frame has show_existing_frame flag (syntax element in the frame header) 360 //! set to 0. For the case thatshow_existing_frame flag is set to 1, 361 //! application and driver process the frame instead, no block level 362 //! decoding is needed. Note : Unlike VP9, AV1 does not have a compressed 363 //! header. All the syntax elements defined in the AV1 sequence and frame 364 //! level headers are not arithmetic coded, hence application and driver can 365 //! directly read them off from the bitstream. If protect is ON, then 366 //! only application can parse the sequence and frame headers. Note : the 367 //! values of the sequence header/level syntax elements and their derived 368 //! parameters are to last throughout all frames in the video sequence, 369 //! until the next Sequence Header OBU is received that may change them. But 370 //! some sequence header/level syntax elements or their derived parameters 371 //! may further qualified by frame header/level syntax elements and their 372 //! derived parameters, then these type of syntax elements and their derived 373 //! parameters can be changed frame to frame. Note : the values of the 374 //! frame header/level syntax elements and their derived parameters can be 375 //! changed from frame to frame. Note : there are some syntax elements and 376 //! their derived parameters can be changed only at KEY FRAME. Hence, the 377 //! values of these type of syntax elements and their derived parameters can 378 //! last for the entire GOP, i.e. until the next KEY FRAME that may change 379 //! them. Note : there is no separate profile for Still Picture. Still 380 //! Picture is coded and decoded as a KEY FRAME, with all coding tools 381 //! supported (tiling, all post in-loop filters, film grain injection, 382 //! monochrome, intraBC, palette prediction mode, etc.). There is no 383 //! restriction in coding Still Picture as a KEY FRAME. 384 //! 385 struct AVP_PIC_STATE_CMD 386 { 387 union 388 { 389 struct 390 { 391 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 392 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 393 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 394 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 395 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 396 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 397 }; 398 uint32_t Value; 399 } DW0; 400 union 401 { 402 struct 403 { 404 uint32_t FrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Frame Width In Pixel Minus 1 405 uint32_t FrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Frame Height In Pixel Minus 1 406 }; 407 uint32_t Value; 408 } DW1; 409 union 410 { 411 struct 412 { 413 uint32_t SequenceChromaSubsamplingFormat : __CODEGEN_BITFIELD(0, 1); //!< SEQUENCE_CHROMA_SUBSAMPLING_FORMAT 414 uint32_t Reserved66 : __CODEGEN_BITFIELD(2, 2); //!< Reserved (for expansion of Chroma SubSampling Format) 415 uint32_t SequencePixelBitDepthIdc : __CODEGEN_BITFIELD(3, 4); //!< Sequence Pixel Bit-Depth Idc 416 uint32_t Reserved69 : __CODEGEN_BITFIELD(5, 6); //!< Reserved (for expansion of Sequence Pixel Bit-Depth Idc) 417 uint32_t SequenceSuperblockSizeUsed : __CODEGEN_BITFIELD(7, 8); //!< Sequence Superblock Size Used 418 uint32_t SequenceEnableOrderHintFlag : __CODEGEN_BITFIELD(9, 9); //!< Sequence Enable Order Hint Flag 419 uint32_t SequenceOrderHintBitsMinus1 : __CODEGEN_BITFIELD(10, 12); //!< Sequence Order Hint Bits Minus1 420 uint32_t Reserved77 : __CODEGEN_BITFIELD(13, 15); //!< Reserved (for the expansion of Sequence Order Hint Bits Minus1) 421 uint32_t SequenceEnableFilterIntraFlag : __CODEGEN_BITFIELD(16, 16); //!< Sequence Enable Filter_Intra Flag 422 uint32_t SequenceEnableIntraEdgeFilterFlag : __CODEGEN_BITFIELD(17, 17); //!< Sequence Enable Intra Edge Filter Flag 423 uint32_t SequenceEnableDualFilterFlag : __CODEGEN_BITFIELD(18, 18); //!< Sequence Enable Dual_Filter Flag 424 uint32_t SequenceEnableInterIntraCompoundFlag : __CODEGEN_BITFIELD(19, 19); //!< Sequence Enable Inter-Intra Compound Flag 425 uint32_t SequenceEnableMaskedCompoundFlag : __CODEGEN_BITFIELD(20, 20); //!< Sequence Enable Masked Compound Flag 426 uint32_t SequenceEnableJointCompoundFlag : __CODEGEN_BITFIELD(21, 21); //!< Sequence Enable Joint Compound Flag 427 uint32_t TailPresentFlag : __CODEGEN_BITFIELD(22, 22); //!< Tail Present Flag 428 uint32_t HeaderPresentFlag : __CODEGEN_BITFIELD(23, 23); //!< Header Present Flag 429 uint32_t EnableBistreamStitchingInHardware : __CODEGEN_BITFIELD(24, 24); //!< Enable Bistream Stitching in hardware 430 uint32_t Reserved89 : __CODEGEN_BITFIELD(25, 31); //!< Reserved 431 }; 432 uint32_t Value; 433 } DW2; 434 union 435 { 436 struct 437 { 438 uint32_t AllowScreenContentToolsFlag : __CODEGEN_BITFIELD(0, 0); //!< Allow Screen Content Tools Flag 439 uint32_t ForceIntegerMvFlag : __CODEGEN_BITFIELD(1, 1); //!< Force Integer MV Flag 440 uint32_t AllowWarpedMotionFlag : __CODEGEN_BITFIELD(2, 2); //!< Allow Warped Motion Flag 441 uint32_t Reserved99 : __CODEGEN_BITFIELD(3, 3); //!< Reserved 442 uint32_t UseCdefFilterFlag : __CODEGEN_BITFIELD(4, 4); //!< Use CDEF Filter Flag 443 uint32_t UseSuperResFlag : __CODEGEN_BITFIELD(5, 5); //!< Use Super-Res Flag 444 uint32_t FrameLevelLoopRestorationFilterEnableFlag : __CODEGEN_BITFIELD(6, 6); //!< Frame Level Loop Restoration Filter Enable Flag 445 uint32_t ApplyFilmGrainFlag : __CODEGEN_BITFIELD(7, 7); //!< Apply Film Grain Flag 446 uint32_t LargeScaleTileEnableFlag : __CODEGEN_BITFIELD(8, 8); //!< Large Scale Tile Enable Flag 447 uint32_t Reserved105 : __CODEGEN_BITFIELD(9, 13); //!< Reserved 448 uint32_t PostCdefFilteredReconPixelsWriteoutEn : __CODEGEN_BITFIELD(14, 14); //!< Post CDEF Filtered Recon Pixels Writeout En 449 uint32_t PostWienerFilteredReconPixelsWriteouten : __CODEGEN_BITFIELD(15, 15); //!< Post Wiener Filtered Recon Pixels WriteoutEn 450 uint32_t FrameType : __CODEGEN_BITFIELD(16, 17); //!< Frame Type 451 uint32_t Reserved114 : __CODEGEN_BITFIELD(18, 18); //!< Reserved (for the expansion of Frame Type) 452 uint32_t IntraonlyFlag : __CODEGEN_BITFIELD(19, 19); //!< IntraOnly Flag 453 uint32_t Reserved116 : __CODEGEN_BITFIELD(20, 21); //!< Reserved 454 uint32_t ErrorResilientModeFlag : __CODEGEN_BITFIELD(22, 22); //!< ERROR_RESILIENT_MODE_FLAG 455 uint32_t AllowIntrabcFlag : __CODEGEN_BITFIELD(23, 23); //!< Allow IntraBC Flag 456 uint32_t Reserved120 : __CODEGEN_BITFIELD(24, 27); //!< Reserved 457 uint32_t PrimaryReferenceFrameIdx : __CODEGEN_BITFIELD(28, 30); //!< Primary Reference Frame Idx 458 uint32_t Reserved127 : __CODEGEN_BITFIELD(31, 31); //!< Reserved (for future expansion of Primary Reference Frame Idx) 459 }; 460 uint32_t Value; 461 } DW3; 462 union 463 { 464 struct 465 { 466 uint32_t SegmentationEnableFlag : __CODEGEN_BITFIELD(0, 0); //!< SEGMENTATION_ENABLE_FLAG 467 uint32_t SegmentationUpdateMapFlag : __CODEGEN_BITFIELD(1, 1); //!< Segmentation Update Map Flag 468 uint32_t SegmentationTemporalUpdateFlag : __CODEGEN_BITFIELD(2, 2); //!< SEGMENTATION_TEMPORAL_UPDATE_FLAG 469 uint32_t PreSkipSegmentIdFlag : __CODEGEN_BITFIELD(3, 3); //!< Pre-Skip Segment ID Flag 470 uint32_t LastActiveSegmentId : __CODEGEN_BITFIELD(4, 6); //!< Last Active Segment ID 471 uint32_t DeltaQPresentFlag : __CODEGEN_BITFIELD(7, 7); //!< Delta Q Present Flag 472 uint32_t DeltaQRes : __CODEGEN_BITFIELD(8, 9); //!< Delta Q RES 473 uint32_t FrameCodedLosslessMode : __CODEGEN_BITFIELD(10, 10); //!< FRAME_CODED_LOSSLESS_MODE 474 uint32_t SegmentMapIsZeroFlag : __CODEGEN_BITFIELD(11, 11); //!< Segment Map Is Zero Flag 475 uint32_t SegmentIdBufferStreamInEnableFlag : __CODEGEN_BITFIELD(12, 12); //!< Segment ID Buffer Stream-In Enable Flag 476 uint32_t SegmentIdBufferStreamOutEnableFlag : __CODEGEN_BITFIELD(13, 13); //!< Segment ID Buffer Stream-Out Enable Flag 477 uint32_t Reserved142 : __CODEGEN_BITFIELD(14, 15); //!< Reserved 478 uint32_t BaseQindex : __CODEGEN_BITFIELD(16, 23); //!< Base Qindex 479 uint32_t YDcDeltaQ : __CODEGEN_BITFIELD(24, 30); //!< Y_dc_delta_q 480 uint32_t Reserved159 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 481 }; 482 uint32_t Value; 483 } DW4; 484 union 485 { 486 struct 487 { 488 uint32_t UDcDeltaQ : __CODEGEN_BITFIELD(0, 6); //!< U_dc_delta_q 489 uint32_t Reserved167 : __CODEGEN_BITFIELD(7, 7); //!< Reserved 490 uint32_t UAcDeltaQ : __CODEGEN_BITFIELD(8, 14); //!< U_ac_delta_q 491 uint32_t Reserved175 : __CODEGEN_BITFIELD(15, 15); //!< Reserved 492 uint32_t VDcDeltaQ : __CODEGEN_BITFIELD(16, 22); //!< V_dc_delta_q 493 uint32_t Reserved183 : __CODEGEN_BITFIELD(23, 23); //!< Reserved 494 uint32_t VAcDeltaQ : __CODEGEN_BITFIELD(24, 30); //!< V_ac_delta_q 495 uint32_t Reserved191 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 496 }; 497 uint32_t Value; 498 } DW5; 499 union 500 { 501 struct 502 { 503 uint32_t AllowHighPrecisionMv : __CODEGEN_BITFIELD(0, 0); //!< Allow High Precision MV 504 uint32_t FrameLevelReferenceModeSelect : __CODEGEN_BITFIELD(1, 1); //!< Frame Level Reference Mode Select 505 uint32_t McompFilterType : __CODEGEN_BITFIELD(2, 4); //!< MCOMP_FILTER_TYPE 506 uint32_t Reserved197 : __CODEGEN_BITFIELD(5, 5); //!< Reserved (for future expansion of Mcomp Filter Type) 507 uint32_t MotionModeSwitchableFlag : __CODEGEN_BITFIELD(6, 6); //!< Motion Mode Switchable Flag 508 uint32_t UseReferenceFrameMvSetFlag : __CODEGEN_BITFIELD(7, 7); //!< Use Reference Frame MV Set Flag 509 uint32_t ReferenceFrameSignBiasI0To7 : __CODEGEN_BITFIELD(8, 15); //!< Reference Frame Sign Bias [i=0 to 7] 510 uint32_t CurrentFrameOrderHint : __CODEGEN_BITFIELD(16, 23); //!< Current Frame Order Hint 511 uint32_t Reserved216 : __CODEGEN_BITFIELD(24, 31); //!< Reserved (for future expansion of Frame Order Hint) 512 }; 513 uint32_t Value; 514 } DW6; 515 union 516 { 517 struct 518 { 519 uint32_t ReducedTxSetUsed : __CODEGEN_BITFIELD(0, 0); //!< Reduced Tx Set Used 520 uint32_t FrameTransformMode : __CODEGEN_BITFIELD(1, 2); //!< Frame Transform Mode 521 uint32_t Reserved227 : __CODEGEN_BITFIELD(3, 3); //!< Reserved 522 uint32_t SkipModePresentFlag : __CODEGEN_BITFIELD(4, 4); //!< Skip Mode Present Flag 523 uint32_t SkipModeFrame0 : __CODEGEN_BITFIELD(5, 7); //!< Skip Mode Frame [0] 524 uint32_t Reserved232 : __CODEGEN_BITFIELD(8, 8); //!< Reserved (for future expansion of Skip Mode Frame[0]) 525 uint32_t SkipModeFrame1 : __CODEGEN_BITFIELD(9, 11); //!< Skip Mode Frame [1] 526 uint32_t Reserved236 : __CODEGEN_BITFIELD(12, 23); //!< Reserved (for future expansion of Skip Mode Frame[1]) 527 uint32_t ReferenceFrameSideI0To7 : __CODEGEN_BITFIELD(24, 31); //!< Reference Frame Side [i=0 to 7] 528 }; 529 uint32_t Value; 530 } DW7; 531 union 532 { 533 struct 534 { 535 uint32_t Reserved256 : __CODEGEN_BITFIELD(0, 2); //!< Reserved (for future expansion of Global Motion Type[0]) 536 uint32_t GlobalMotionType1 : __CODEGEN_BITFIELD(3, 4); //!< Global Motion Type[1] 537 uint32_t Reserved261 : __CODEGEN_BITFIELD(5, 5); //!< Reserved (for future expansion of Global Motion Type[1] 538 uint32_t GlobalMotionType2 : __CODEGEN_BITFIELD(6, 7); //!< Global Motion Type[2] 539 uint32_t Reserved264 : __CODEGEN_BITFIELD(8, 8); //!< Reserved (for future expansion of Global Motion Type[2] 540 uint32_t GlobalMotionType3 : __CODEGEN_BITFIELD(9, 10); //!< Global Motion Type[3] 541 uint32_t Reserved267 : __CODEGEN_BITFIELD(11, 11); //!< Reserved (for future expansion of Global Motion Type[3] 542 uint32_t GlobalMotionType4 : __CODEGEN_BITFIELD(12, 13); //!< Global Motion Type[4] 543 uint32_t Reserved270 : __CODEGEN_BITFIELD(14, 14); //!< Reserved (for future expansion of Global Motion Type[4] 544 uint32_t GlobalMotionType5 : __CODEGEN_BITFIELD(15, 16); //!< Global Motion Type[5] 545 uint32_t Reserved273 : __CODEGEN_BITFIELD(17, 17); //!< Reserved (for future expansion of Global Motion Type[5] 546 uint32_t GlobalMotionType6 : __CODEGEN_BITFIELD(18, 19); //!< Global Motion Type[6] 547 uint32_t Reserved276 : __CODEGEN_BITFIELD(20, 20); //!< Reserved (for future expansion of Global Motion Type[6] 548 uint32_t GlobalMotionType7 : __CODEGEN_BITFIELD(21, 22); //!< Global Motion Type[7] 549 uint32_t Reserved279 : __CODEGEN_BITFIELD(23, 23); //!< Reserved (for future expansion of Global Motion Type[7] 550 uint32_t FrameLevelGlobalMotionInvalidFlags : __CODEGEN_BITFIELD(24, 31); //!< Frame Level Global Motion Invalid Flags 551 }; 552 uint32_t Value; 553 } DW8; 554 uint32_t WarpParametersArrayReference1To7Projectioncoeff0To5[21]; //!< Warp Parameters Array [Reference=1 to 7][ProjectionCoeff=0 to 5] 555 union 556 { 557 struct 558 { 559 uint32_t ReferenceFrameIdx0 : __CODEGEN_BITFIELD(0, 2); //!< Reference Frame Idx[0] 560 uint32_t Reserved963 : __CODEGEN_BITFIELD(3, 3); //!< Reserved (for future expansion of reference frame idx0) 561 uint32_t ReferenceFrameIdx1 : __CODEGEN_BITFIELD(4, 6); //!< Reference Frame Idx[1] 562 uint32_t Reserved967 : __CODEGEN_BITFIELD(7, 7); //!< Reserved (for future expansion of reference frame idx1) 563 uint32_t ReferenceFrameIdx2 : __CODEGEN_BITFIELD(8, 10); //!< Reference Frame Idx[2] 564 uint32_t Reserved971 : __CODEGEN_BITFIELD(11, 11); //!< Reserved (for future expansion of reference frame idx2) 565 uint32_t ReferenceFrameIdx3 : __CODEGEN_BITFIELD(12, 14); //!< Reference Frame Idx[3] 566 uint32_t Reserved975 : __CODEGEN_BITFIELD(15, 15); //!< Reserved (for future expansion of reference frame idx3) 567 uint32_t ReferenceFrameIdx4 : __CODEGEN_BITFIELD(16, 18); //!< Reference Frame Idx[4] 568 uint32_t Reserved979 : __CODEGEN_BITFIELD(19, 19); //!< Reserved (for future expansion of reference frame idx4) 569 uint32_t ReferenceFrameIdx5 : __CODEGEN_BITFIELD(20, 22); //!< Reference Frame Idx[5] 570 uint32_t Reserved983 : __CODEGEN_BITFIELD(23, 23); //!< Reserved (for future expansion of reference frame idx5) 571 uint32_t ReferenceFrameIdx6 : __CODEGEN_BITFIELD(24, 26); //!< Reference Frame Idx[6] 572 uint32_t Reserved987 : __CODEGEN_BITFIELD(27, 27); //!< Reserved (for future expansion of reference frame idx6) 573 uint32_t ReferenceFrameIdx7 : __CODEGEN_BITFIELD(28, 30); //!< Reference Frame Idx[7] 574 uint32_t Reserved991 : __CODEGEN_BITFIELD(31, 31); //!< Reserved (for future expansion of reference frame idx7) 575 }; 576 uint32_t Value; 577 } DW30; 578 union 579 { 580 struct 581 { 582 uint32_t IntraFrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Intra Frame Width In Pixel Minus 1 583 uint32_t IntraFrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Intra Frame Height In Pixel Minus 1 584 }; 585 uint32_t Value; 586 } DW31; 587 union 588 { 589 struct 590 { 591 uint32_t LastFrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Last Frame Width In Pixel Minus 1 592 uint32_t LastFrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Last Frame Height In Pixel Minus 1 593 }; 594 uint32_t Value; 595 } DW32; 596 union 597 { 598 struct 599 { 600 uint32_t Last2FrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Last2 Frame Width In Pixel Minus 1 601 uint32_t Last2FrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Last2 Frame Height In Pixel Minus 1 602 }; 603 uint32_t Value; 604 } DW33; 605 union 606 { 607 struct 608 { 609 uint32_t Last3FrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Last3 Frame Width In Pixel Minus 1 610 uint32_t Last3FrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Last3 Frame Height In Pixel Minus 1 611 }; 612 uint32_t Value; 613 } DW34; 614 union 615 { 616 struct 617 { 618 uint32_t GoldenFrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Golden Frame Width In Pixel Minus 1 619 uint32_t GoldenFrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Golden Frame Height In Pixel Minus 1 620 }; 621 uint32_t Value; 622 } DW35; 623 union 624 { 625 struct 626 { 627 uint32_t BwdrefFrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< BWDREF Frame Width In Pixel Minus 1 628 uint32_t BwdrefFrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< BWDREF Frame Height In Pixel Minus 1 629 }; 630 uint32_t Value; 631 } DW36; 632 union 633 { 634 struct 635 { 636 uint32_t Altref2FrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< ALTREF2 Frame Width In Pixel Minus 1 637 uint32_t Altref2FrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< ALTREF2 Frame Height In Pixel Minus 1 638 }; 639 uint32_t Value; 640 } DW37; 641 union 642 { 643 struct 644 { 645 uint32_t AltrefFrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< ALTREF Frame Width In Pixel Minus 1 646 uint32_t AltrefFrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< ALTREF Frame Height In Pixel Minus 1 647 }; 648 uint32_t Value; 649 } DW38; 650 union 651 { 652 struct 653 { 654 uint32_t VerticalScaleFactorForIntra : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for INTRA 655 uint32_t HorizontalScaleFactorForIntra : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for INTRA 656 }; 657 uint32_t Value; 658 } DW39; 659 union 660 { 661 struct 662 { 663 uint32_t VerticalScaleFactorForLast : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for LAST 664 uint32_t HorizontalScaleFactorForLast : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for LAST 665 }; 666 uint32_t Value; 667 } DW40; 668 union 669 { 670 struct 671 { 672 uint32_t VerticalScaleFactorForLast2 : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for LAST2 673 uint32_t HorizontalScaleFactorForLast2 : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for LAST2 674 }; 675 uint32_t Value; 676 } DW41; 677 union 678 { 679 struct 680 { 681 uint32_t VerticalScaleFactorForLast3 : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for LAST3 682 uint32_t HorizontalScaleFactorForLast3 : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for LAST3 683 }; 684 uint32_t Value; 685 } DW42; 686 union 687 { 688 struct 689 { 690 uint32_t VerticalScaleFactorForGolden : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for GOLDEN 691 uint32_t HorizontalScaleFactorForGolden : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for GOLDEN 692 }; 693 uint32_t Value; 694 } DW43; 695 union 696 { 697 struct 698 { 699 uint32_t VerticalScaleFactorForBwdrefFrame : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for BWDREF_FRAME 700 uint32_t HorizontalScaleFactorForBwdrefFrame : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for BWDREF_FRAME 701 }; 702 uint32_t Value; 703 } DW44; 704 union 705 { 706 struct 707 { 708 uint32_t VerticalScaleFactorForAltref2 : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for ALTREF2 709 uint32_t HorizontalScaleFactorForAltref2 : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for ALTREF2 710 }; 711 uint32_t Value; 712 } DW45; 713 union 714 { 715 struct 716 { 717 uint32_t VerticalScaleFactorForAltref : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for ALTREF 718 uint32_t HorizontalScaleFactorForAltref : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for ALTREF 719 }; 720 uint32_t Value; 721 } DW46; 722 union 723 { 724 struct 725 { 726 uint32_t ReferenceFrameOrderHint0ForIntraFrame : __CODEGEN_BITFIELD(0, 7); //!< Reference Frame Order Hint [0] for Intra Frame 727 uint32_t ReferenceFrameOrderHint1ForLastFrame : __CODEGEN_BITFIELD(8, 15); //!< Reference Frame Order Hint [1] for Last Frame 728 uint32_t ReferenceFrameOrderHint2ForLast2Frame : __CODEGEN_BITFIELD(16, 23); //!< Reference Frame Order Hint [2] for Last2 Frame 729 uint32_t ReferenceFrameOrderHint3ForLast3Frame : __CODEGEN_BITFIELD(24, 31); //!< Reference Frame Order Hint [3] for Last3 Frame 730 }; 731 uint32_t Value; 732 } DW47; 733 union 734 { 735 struct 736 { 737 uint32_t ReferenceFrameOrderHint4ForGoldenFrame : __CODEGEN_BITFIELD(0, 7); //!< Reference Frame Order Hint [4] for Golden Frame 738 uint32_t ReferenceFrameOrderHint5ForBwdrefFrame : __CODEGEN_BITFIELD(8, 15); //!< Reference Frame Order Hint [5] for BWDREF Frame 739 uint32_t ReferenceFrameOrderHint6ForAltref2Frame : __CODEGEN_BITFIELD(16, 23); //!< Reference Frame Order Hint [6] for ALTREF2 Frame 740 uint32_t ReferenceFrameOrderHint7ForAltrefFrame : __CODEGEN_BITFIELD(24, 31); //!< Reference Frame Order Hint [7] for ALTREF Frame 741 }; 742 uint32_t Value; 743 } DW48; 744 union 745 { 746 struct 747 { 748 uint32_t Reserved1568; //!< Reserved 749 }; 750 uint32_t Value; 751 } DW49; 752 union 753 { 754 struct 755 { 756 uint32_t Reserved1600; //!< Reserved 757 }; 758 uint32_t Value; 759 } DW50; 760 union 761 { 762 struct 763 { 764 uint32_t Reserved1632 : __CODEGEN_BITFIELD(0, 15); //!< Reserved 765 uint32_t Nonfirstpassflag : __CODEGEN_BITFIELD(16, 16); //!< NONFIRSTPASSFLAG 766 uint32_t VdencPakOnlyPass : __CODEGEN_BITFIELD(17, 17); //!< VDENC PAK_ONLY PASS 767 uint32_t Reserved1650 : __CODEGEN_BITFIELD(18, 24); //!< Reserved 768 uint32_t FrameszoverstatusenFramebitratemaxreportmask : __CODEGEN_BITFIELD(25, 25); //!< FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK 769 uint32_t FrameszunderstatusenFramebitrateminreportmask : __CODEGEN_BITFIELD(26, 26); //!< FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK 770 uint32_t AVP_PIC_STATE_DW51_BIT27 : __CODEGEN_BITFIELD(27, 27); 771 uint32_t Reserved1660 : __CODEGEN_BITFIELD(28, 31); //!< Reserved 772 }; 773 uint32_t Value; 774 } DW51; 775 union 776 { 777 struct 778 { 779 uint32_t Framebitratemax : __CODEGEN_BITFIELD(0, 13); //!< FrameBitRateMax 780 uint32_t Reserved1678 : __CODEGEN_BITFIELD(14, 30); //!< Reserved 781 uint32_t Framebitratemaxunit : __CODEGEN_BITFIELD(31, 31); //!< FRAMEBITRATEMAXUNIT 782 }; 783 uint32_t Value; 784 } DW52; 785 union 786 { 787 struct 788 { 789 uint32_t Framebitratemin : __CODEGEN_BITFIELD(0, 13); //!< FrameBitRateMin 790 uint32_t Reserved1710 : __CODEGEN_BITFIELD(14, 30); //!< Reserved 791 uint32_t Framebitrateminunit : __CODEGEN_BITFIELD(31, 31); //!< FRAMEBITRATEMINUNIT 792 }; 793 uint32_t Value; 794 } DW53; 795 union 796 { 797 struct 798 { 799 uint64_t Framedeltaqindexmax; //!< FrameDeltaQindexMax 800 }; 801 uint32_t Value[2]; 802 } DW54_55; 803 union 804 { 805 struct 806 { 807 uint32_t Framedeltaqindexmin; //!< FrameDeltaQindexMin 808 }; 809 uint32_t Value; 810 } DW56; 811 union 812 { 813 struct 814 { 815 uint64_t Framedeltalfmax; //!< FrameDeltaLFMax 816 }; 817 uint32_t Value[2]; 818 } DW57_58; 819 union 820 { 821 struct 822 { 823 uint32_t Framedeltalfmin; //!< FrameDeltaLFMin 824 }; 825 uint32_t Value; 826 } DW59; 827 union 828 { 829 struct 830 { 831 uint64_t Framedeltaqindexlfmaxrange; //!< FrameDeltaQindexLFMaxRange 832 }; 833 uint32_t Value[2]; 834 } DW60_61; 835 union 836 { 837 struct 838 { 839 uint32_t Framedeltaqindexlfminrange; //!< FrameDeltaQindexLFMinRange 840 }; 841 uint32_t Value; 842 } DW62; 843 union 844 { 845 struct 846 { 847 uint32_t Minframsize : __CODEGEN_BITFIELD(0, 15); //!< MinFramSize 848 uint32_t Reserved2032 : __CODEGEN_BITFIELD(16, 29); //!< Reserved 849 uint32_t Minframesizeunits : __CODEGEN_BITFIELD(30, 31); //!< MINFRAMESIZEUNITS 850 }; 851 uint32_t Value; 852 } DW63; 853 union 854 { 855 struct 856 { 857 uint32_t Bitoffsetforfirstpartitionsize : __CODEGEN_BITFIELD(0, 15); //!< BitOffsetForFirstPartitionSize 858 uint32_t Reserved2064 : __CODEGEN_BITFIELD(16, 31); //!< Reserved 859 }; 860 uint32_t Value; 861 } DW64; 862 union 863 { 864 struct 865 { 866 uint32_t Class0SseThreshold0 : __CODEGEN_BITFIELD(0, 15); //!< Class0_SSE_Threshold0 867 uint32_t Class0SseThreshold1 : __CODEGEN_BITFIELD(16, 31); //!< Class0_SSE_Threshold1 868 }; 869 uint32_t Value; 870 } DW65; 871 uint32_t SseThresholdsForClass18[8]; //!< SSE thresholds for Class1-8 872 union 873 { 874 struct 875 { 876 uint32_t Rdmult; //!< rdmult 877 }; 878 uint32_t Value; 879 } DW74; 880 union 881 { 882 struct 883 { 884 uint32_t SbMaxBitsizeallowed : __CODEGEN_BITFIELD(0, 17); //!< SB Max BitSizeAllowed 885 uint32_t Reserved2418 : __CODEGEN_BITFIELD(18, 19); //!< Reserved 886 uint32_t SbmaxbitstatusenSbmaxsizereportmask : __CODEGEN_BITFIELD(20, 20); //!< SBMaxBitStatusEn - SBMaxSizeReportMask 887 uint32_t Reserved2421 : __CODEGEN_BITFIELD(21, 31); //!< Reserved 888 }; 889 uint32_t Value; 890 } DW75; 891 892 //! \name Local enumerations 893 894 enum MEDIA_INSTRUCTION_COMMAND 895 { 896 MEDIA_INSTRUCTION_COMMAND_AVPPICSTATE = 48, //!< No additional details 897 }; 898 899 //! \brief MEDIA_INSTRUCTION_OPCODE 900 //! \details 901 //! Codec/Engine Name = AVP = 3h 902 enum MEDIA_INSTRUCTION_OPCODE 903 { 904 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 905 }; 906 907 enum PIPELINE_TYPE 908 { 909 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 910 }; 911 912 enum COMMAND_TYPE 913 { 914 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 915 }; 916 917 //! \brief SEQUENCE_CHROMA_SUBSAMPLING_FORMAT 918 //! \details 919 //! It specifies the chroma subsampling format for all frames in the 920 //! video sequence being decoded. [1:0] = 00 ; stands for 921 //! Monochrome 4:0:0, no Chroma planes at all, but [subsampling_x and 922 //! subsampling_y] is defaulted to [1, 1], as only Profile 0 can support 923 //! monochrome video coding. [1:0] = 01 ; stands for 4:2:0, 924 //! with[subsampling_x and subsampling_y] defining as[1, 1]. It is supported 925 //! in all profiles (seq_profile=0, 1, 2 - syntax element in the sequence 926 //! header) [1:0] = 10 ; stands for 4:2:2, 927 //! with[subsampling_x and subsampling_y] defining as[1, 0]. It is supported 928 //! only in seq_profile=2. [1:0] = 11 ; stands for 4:4:4 929 //! with[subsampling_x and subsampling_y] defining as[0, 0]. It is supported 930 //! in both seq_profile=1 and 2. It is a sequence-level 931 //! parameter derived from the sequence header syntax elements: seq_profile, 932 //! subsampling_x, subsampling_y, monochome, high_bitdepth and twelve_bit. 933 //! Default is 1, i.e. 4:2:0.. Note : AV1 supports 3 934 //! profiles: seq_profile Bit_depth Chroma Subsampling 935 //! 0 (Main Profile) 8 / 10 YUV 4:2:0 and 4:0:0 1 936 //! (High Profile) 8 / 10 YUV 4:4:4 (4:0:0 is not allowed) 2 937 //! (Pro Profile) 8 / 10 /12 YUV 4:2:2 AND 12 YUV 938 //! 4:2:0/4:4:4/4:0:0 Note : for AV1 decoder: 939 //! type="disc" style="margin-top:0in; margin-bottom:0in"><li 940 //! style="margin:0in 0in 0.0001pt; font-size:11pt; font-family:Calibri, 941 //! sans-serif">A profile 0 compliant decoder must be able to decode all 942 //! bitstreams labeled profile 0 943 //! style="margin:0in 0in 0.0001pt; 944 //! font-size:11pt; font-family:Calibri, sans-serif">A profile 1 compliant 945 //! decoder must be able to decode all bitstreams labeled profile 0 or 946 //! 1 947 //! style="margin:0in 0in 0.0001pt; font-size:11pt; 948 //! font-family:Calibri, sans-serif">A profile 2 compliant decoder must be 949 //! able to decode all bitstreams labeled profile 0, 1, or 2 950 951 enum SEQUENCE_CHROMA_SUBSAMPLING_FORMAT 952 { 953 SEQUENCE_CHROMA_SUBSAMPLING_FORMAT_420 = 1, //!< Chroma Sampling 4:2:0 954 }; 955 956 //! \brief ERROR_RESILIENT_MODE_FLAG 957 //! \details 958 //! It specifies whether all syntax decoding of the current frame is 959 //! independent of the previous frames, or not. Set to 0 to 960 //! disable error resilient mode Set to 1 to enable error 961 //! resilient mode (for independent syntax decoding) It is 962 //! the frame-level syntax element, error_resilient_mode. Default is 0. 963 //! It is read from the bitstream for all frame types (KEY Frame, 964 //! INTRA-ONLY Frame and INTER Frame), except when frame_type is set to 965 //! SWITCH_FRAME, in which it is forced to 1 instead of reading from the 966 //! bitstream. When error resilient mode is set to 1 967 //! (active), Refresh Frame Context is set to0. When error resilient is set 968 //! to 0,Refresh Frame Context is read from the bit stream. <p 969 //! /> Valid only in Decoder Mode /> <p 970 //! /> 971 enum ERROR_RESILIENT_MODE_FLAG 972 { 973 ERROR_RESILIENT_MODE_FLAG_DISABLE = 0, //!< No additional details 974 ERROR_RESILIENT_MODE_FLAG_ENABLE = 1, //!< No additional details 975 }; 976 977 //! \brief SEGMENTATION_ENABLE_FLAG 978 //! \details 979 //! Indicate if segementation is enabled or not 980 enum SEGMENTATION_ENABLE_FLAG 981 { 982 SEGMENTATION_ENABLE_FLAG_ALLBLOCKSAREIMPLIEDTOBELONGTOSEGMENT0 = 0, //!< No additional details 983 SEGMENTATION_ENABLE_FLAG_SEGIDDETERMINATIONDEPENDSONSEGMENTATIONUPDATEMAPSETTING = 1, //!< No additional details 984 }; 985 986 //! \brief SEGMENTATION_TEMPORAL_UPDATE_FLAG 987 //! \details 988 //! Indicates whether segID is decoding from bitstream or predicted from 989 //! previous frame. 990 enum SEGMENTATION_TEMPORAL_UPDATE_FLAG 991 { 992 SEGMENTATION_TEMPORAL_UPDATE_FLAG_DECODESEGIDFROMBITSTREAM = 0, //!< No additional details 993 SEGMENTATION_TEMPORAL_UPDATE_FLAG_GETSEGIDEITHERFROMBITSTREAMORFROMPREVIOUSFRAME = 1, //!< No additional details 994 }; 995 996 //! \brief FRAME_CODED_LOSSLESS_MODE 997 //! \details 998 //! This bitSet to indicate lossless coding mode at frame level. 999 //! Frame Coded Lossless Mode is set to 1, if all active segment's 1000 //! segment lossless flag are set to 1. The equation for 1001 //! deriving coded lossless mode is presented in the AVP_SEGMENT_STATE 1002 //! Command. AllLossless = CodedLossless && ( 1003 //! FrameWidth == UpscaledWidth ). The second condition in this equation is 1004 //! equivalent tohaving Super-res NOT enabled. Only 1005 //! CodedLossless flag is sent to HW. AllLossless flag is not. 1006 //! CodedLossless directly control the enabling/disabling of deblocker, 1007 //! CDEF in-loop filters. But AllLossless is used to control 1008 //! the enabling/disabling of Loop Restoration filter. Hence, when super-res 1009 //! is ON, Loop Restoration filter can still be ON/OFF, regardless of 1010 //! CodedLossless. 1011 enum FRAME_CODED_LOSSLESS_MODE 1012 { 1013 FRAME_CODED_LOSSLESS_MODE_NORMALMODE = 0, //!< No additional details 1014 FRAME_CODED_LOSSLESS_MODE_CODEDLOSSLESSMODE = 1, //!< No additional details 1015 }; 1016 1017 //! \brief MCOMP_FILTER_TYPE 1018 //! \details 1019 //! It specifies which Motion Compensation Filter type is to be used for 1020 //! the current frame. It is a frame-level derived 1021 //! parameters. It is derived from the frame level syntax elements 1022 //! (is_filter_switchable flag and the 2-bits interpolation_filter). 1023 //! Default is 0 (i.e. use the eight-tap basic filter). 1024 enum MCOMP_FILTER_TYPE 1025 { 1026 MCOMP_FILTER_TYPE_EIGHT_TAP = 0, //!< No additional details 1027 MCOMP_FILTER_TYPE_EIGHT_TAP_SMOOTH = 1, //!< No additional details 1028 MCOMP_FILTER_TYPE_EIGHT_TAP_SHARP = 2, //!< No additional details 1029 MCOMP_FILTER_TYPE_BILINEAR = 3, //!< No additional details 1030 MCOMP_FILTER_TYPE_SWITCHABLE = 4, //!< No additional details 1031 }; 1032 1033 //! \brief NONFIRSTPASSFLAG 1034 //! \details 1035 //! This signals the current pass is not the first pass. It will imply 1036 //! designate HW behavior. 1037 enum NONFIRSTPASSFLAG 1038 { 1039 NONFIRSTPASSFLAG_DISABLE = 0, //!< If it is initial-Pass, this bit is set to 0. 1040 NONFIRSTPASSFLAG_ENABLE = 1, //!< For subsequent passes, this bit is set to 1. 1041 }; 1042 1043 //! \brief FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK 1044 //! \details 1045 //! This is a mask bit controlling if the condition of frame level bit count 1046 //! exceeds FrameBitRateMax. 1047 enum FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK 1048 { 1049 FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK_DISABLE = 0, //!< Do not update bit 1 of HCP_VP9_IMAGE_STATUS control register. 1050 FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK_ENABLE = 1, //!< Set bit 1 of HCP_VP9_IMAGE_STATUS control register if the total frame level bit counter is greater than or equal to Frame Bit Rate Maximum limit. 1051 }; 1052 1053 //! \brief FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK 1054 //! \details 1055 //! This is a mask bit controlling if the condition of frame level bit count 1056 //! is less than FrameBitRateMin. 1057 enum FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK 1058 { 1059 FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK_DISABLE = 0, //!< Do not update bit 2 (Frame Bit Count Violate -- under run) of HCP_VP9_IMAGE_STATUS control register. 1060 FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK_ENABLE = 1, //!< Set bit 2 (Frame Bit Count Violate -- under run) of HCP_VP9_IMAGE_STATUS control register if the total frame level bit counter is less than or equal to Frame Bit Rate Minimum limit. 1061 }; 1062 1063 //! \brief FRAMEBITRATEMAXUNIT 1064 //! \details 1065 //! This field is the Frame Bitrate Maximum Limit Units. 1066 enum FRAMEBITRATEMAXUNIT 1067 { 1068 FRAMEBITRATEMAXUNIT_BYTE = 0, //!< 32byte unit 1069 FRAMEBITRATEMAXUNIT_KILOBYTE = 1, //!< 4Kbyte unit 1070 }; 1071 1072 //! \brief FRAMEBITRATEMINUNIT 1073 //! \details 1074 //! This field is the Frame Bitrate Maximum Limit Units. 1075 enum FRAMEBITRATEMINUNIT 1076 { 1077 FRAMEBITRATEMINUNIT_BYTE = 0, //!< 32byte unit 1078 FRAMEBITRATEMINUNIT_KILOBYTE = 1, //!< 4Kbyte unit 1079 }; 1080 1081 //! \brief MINFRAMESIZEUNITS 1082 //! \details 1083 //! This field is the Minimum Frame Size Units 1084 enum MINFRAMESIZEUNITS 1085 { 1086 MINFRAMESIZEUNITS_4KB = 0, //!< Minimum Frame Size is in 4Kbytes. 1087 MINFRAMESIZEUNITS_16KB = 1, //!< Minimum Frame Size is in 4Kbytes. 1088 MINFRAMESIZEUNITS_COMAPTIBILITYMODE = 2, //!< No additional details 1089 MINFRAMESIZEUNITS_6BYTES = 3, //!< No additional details 1090 }; 1091 1092 //! \name Initializations 1093 1094 //! \brief Explicit member initialization function 1095 AVP_PIC_STATE_CMD(); 1096 1097 static const size_t dwSize = 76; 1098 static const size_t byteSize = 304; 1099 }; 1100 1101 //! 1102 //! \brief AVP_PIPE_MODE_SELECT 1103 //! \details 1104 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 1105 //! all AVP Commands. Each AVP command has assigned a media instruction 1106 //! command as defined in DWord 0, BitField 22:16. 1107 //! 1108 //! The workload for the AVP pipeline is tile based. Once the bit stream DMA 1109 //! is configured with the AVP_BSD_OBJECT command for a tile in a frame, and 1110 //! the tile's bitstream is presented to the AVP, the tile decoding will 1111 //! begin. AVP pipeline is stateless, i.e. there is no states saved between 1112 //! the decoding of each tile. Hence all sequence, frame and segment state 1113 //! commands have to be resent before the tile coding command and the BSD 1114 //! object command. The AVP_PIPE_MODE_SELECT command is responsible for 1115 //! general pipeline level configuration that would normally be set once for 1116 //! a single stream encode or decode and would not be modified on a frame 1117 //! workload basis. This is a frame level state command and is shared by 1118 //! both encoding and decoding processes. 1119 //! 1120 struct AVP_PIPE_MODE_SELECT_CMD 1121 { 1122 union 1123 { 1124 struct 1125 { 1126 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1127 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1128 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1129 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1130 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1131 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1132 }; 1133 uint32_t Value; 1134 } DW0; 1135 union 1136 { 1137 struct 1138 { 1139 uint32_t CodecSelect : __CODEGEN_BITFIELD(0, 0); //!< CODEC_SELECT 1140 uint32_t Reserved33 : __CODEGEN_BITFIELD(1, 2); //!< Reserved 1141 uint32_t PicStatusErrorReportEnable : __CODEGEN_BITFIELD(3, 3); //!< PIC_STATUSERROR_REPORT_ENABLE 1142 uint32_t FrameReconstructionDisable : __CODEGEN_BITFIELD(4, 4); //!< Frame reconstruction disable 1143 uint32_t CodecStandardSelect : __CODEGEN_BITFIELD(5, 7); //!< CODEC_STANDARD_SELECT 1144 uint32_t Reserved40 : __CODEGEN_BITFIELD(8, 9); //!< Reserved 1145 uint32_t VdencMode : __CODEGEN_BITFIELD(10, 10); //!< VDENC Mode 1146 uint32_t Reserved43 : __CODEGEN_BITFIELD(11, 11); //!< Reserved 1147 uint32_t TileStatisticsStreamoutEnable : __CODEGEN_BITFIELD(12, 12); //!< Tile Statistics Streamout Enable 1148 uint32_t MultiEngineMode : __CODEGEN_BITFIELD(13, 14); //!< MULTI_ENGINE_MODE 1149 uint32_t PipeWorkingMode : __CODEGEN_BITFIELD(15, 16); //!< PIPE_WORKING_MODE 1150 uint32_t TileBasedEngine : __CODEGEN_BITFIELD(17, 17); //!< Tile Based Engine 1151 uint32_t Reserved50 : __CODEGEN_BITFIELD(18, 22); //!< Reserved 1152 uint32_t MotionCompMemTrackerCounterEnable : __CODEGEN_BITFIELD(23, 23); //!< Motion Comp Memory Tracker Counter Enable 1153 uint32_t Reserved56 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 1154 }; 1155 uint32_t Value; 1156 } DW1; 1157 union 1158 { 1159 struct 1160 { 1161 uint32_t Reserved64; //!< Reserved 1162 }; 1163 uint32_t Value; 1164 } DW2; 1165 union 1166 { 1167 struct 1168 { 1169 uint32_t PicStatusErrorReportId; //!< Pic Status/Error Report ID 1170 }; 1171 uint32_t Value; 1172 } DW3; 1173 union 1174 { 1175 struct 1176 { 1177 uint32_t Reserved128 : __CODEGEN_BITFIELD(0, 3); //!< Reserved 1178 uint32_t AlcChickenbitRestrictSingleTileGroupInAFrame : __CODEGEN_BITFIELD(4, 4); //!< ALC chickenbit(Restrict single tile group in a frame) 1179 uint32_t Reserved133 : __CODEGEN_BITFIELD(5, 31); //!< Reserved 1180 }; 1181 uint32_t Value; 1182 } DW4; 1183 union 1184 { 1185 struct 1186 { 1187 uint32_t PhaseIndicator : __CODEGEN_BITFIELD(0, 1); //!< PHASE_INDICATOR 1188 uint32_t Reserved162 : __CODEGEN_BITFIELD(2, 31); //!< Reserved 1189 }; 1190 uint32_t Value; 1191 } DW5; 1192 union 1193 { 1194 struct 1195 { 1196 uint32_t Reserved192 : __CODEGEN_BITFIELD(0, 1); //!< Reserved 1197 uint32_t DownscaledSourcePixelPrefetchLength : __CODEGEN_BITFIELD(2, 4); //!< Downscaled Source Pixel Prefetch Length 1198 uint32_t DownscaledSourcePixelPrefetchEnable : __CODEGEN_BITFIELD(5, 5); //!< Downscaled Source Pixel Prefetch Enable 1199 uint32_t Reserved198 : __CODEGEN_BITFIELD(6, 6); //!< Reserved (for SSE Enable in future project) 1200 uint32_t OriginalSourcePixelPrefetchLength : __CODEGEN_BITFIELD(7, 9); //!< Original Source Pixel Prefetch Length 1201 uint32_t OriginalSourcePixelPrefetchEnable : __CODEGEN_BITFIELD(10, 10); //!< Original Source Pixel Prefetch Enable 1202 uint32_t Reserved203 : __CODEGEN_BITFIELD(11, 31); //!< Reserved 1203 }; 1204 uint32_t Value; 1205 } DW6; 1206 1207 //! \name Local enumerations 1208 1209 enum MEDIA_INSTRUCTION_COMMAND 1210 { 1211 MEDIA_INSTRUCTION_COMMAND_AVPPIPEMODESELECT = 0, //!< No additional details 1212 }; 1213 1214 //! \brief MEDIA_INSTRUCTION_OPCODE 1215 //! \details 1216 //! Codec/Engine Name = AVP = 3h 1217 enum MEDIA_INSTRUCTION_OPCODE 1218 { 1219 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1220 }; 1221 1222 enum PIPELINE_TYPE 1223 { 1224 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1225 }; 1226 1227 enum COMMAND_TYPE 1228 { 1229 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1230 }; 1231 1232 enum CODEC_SELECT 1233 { 1234 CODEC_SELECT_DECODE = 0, //!< No additional details 1235 CODEC_SELECT_ENCODE = 1, //!< No additional details 1236 }; 1237 1238 enum PIC_STATUSERROR_REPORT_ENABLE 1239 { 1240 PIC_STATUSERROR_REPORT_ENABLE_DISABLE = 0, //!< Disable status/error reporting 1241 PIC_STATUSERROR_REPORT_ENABLE_ENABLE = 1, //!< Status/Error reporting is written out once per picture. The Pic Status/Error Report ID in DWord3 along with the status/error status bits are packed into one cache line and written to the Status/Error Buffer address in the AVP_PIPE_BUF_ADDR_STATE command. Must be zero for encoder mode. 1242 }; 1243 1244 enum CODEC_STANDARD_SELECT 1245 { 1246 CODEC_STANDARD_SELECT_AV1 = 2, //!< No additional details 1247 }; 1248 1249 //! \brief MULTI_ENGINE_MODE 1250 //! \details 1251 //! This indicates the current pipe is in single pipe mode or if in 1252 //! scalable mode is in left/right/middle pipe in multi-engine mode. 1253 enum MULTI_ENGINE_MODE 1254 { 1255 MULTI_ENGINE_MODE_SINGLEENGINEMODEORMSACFEONLYDECODEMODE = 0, //!< This is for single engine mode (legacy) OR MSAC FE only decode mode 1256 MULTI_ENGINE_MODE_PIPEISTHELEFTENGINEINAMULTI_ENGINEMODE = 1, //!< Current pipe is the most left engine while running in scalable multi-engine mode 1257 MULTI_ENGINE_MODE_PIPEISTHERIGHTENGINEINAMULTI_ENGINEMODE = 2, //!< Current pipe is the most right engine while running in scalable multi-engine mode 1258 MULTI_ENGINE_MODE_PIPEISONEOFTHEMIDDLEENGINEINAMULTI_ENGINEMODE = 3, //!< Current pipe is in one of the middle engine while running in scalable multi-engine mode 1259 }; 1260 1261 //! \brief PIPE_WORKING_MODE 1262 //! \details 1263 //! This programs the working mode for AVP pipe. 1264 enum PIPE_WORKING_MODE 1265 { 1266 PIPE_WORKING_MODE_LEGACYDECODERENCODERMODE_SINGLEPIPE = 0, //!< This is for single pipe mode non-scalable mode. It is used by both decoder and encoder. 1267 PIPE_WORKING_MODE_ENCODERMODE_SCALABLEMULTI_PIPE = 2, //!< This is for multiple-pipe scalable mode for encoder model only. In encoder, it is for PAK. 1268 PIPE_WORKING_MODE_DECODERSCALABLEMODEWITHMSACINREALTILES_SCALABLEMULTI_PIPE = 3, //!< This is for multiple-pipe scalable mode decoder mode in real tiles. MSAC and reconstruction will run together. Each pipes will run in real tiles vertically. 1269 }; 1270 1271 //! \brief PHASE_INDICATOR 1272 //! \details 1273 //! This is used to indicate whether this is first, middle or last phase 1274 //! of programming during Real-Tile Decoder Mode. This is used by hardware 1275 //! to know if the current programming is first or last phases. 1276 //! This field is ignored (programmed to 0) for other modes other than 1277 //! AV1 Real-Tile Decoder Mode. 1278 enum PHASE_INDICATOR 1279 { 1280 PHASE_INDICATOR_FIRSTPHASE = 0, //!< No additional details 1281 PHASE_INDICATOR_MIDDLEPHASE = 1, //!< No additional details 1282 PHASE_INDICATOR_LASTPHASE = 2, //!< No additional details 1283 }; 1284 1285 //! \name Initializations 1286 1287 //! \brief Explicit member initialization function 1288 AVP_PIPE_MODE_SELECT_CMD(); 1289 1290 static const size_t dwSize = 7; 1291 static const size_t byteSize = 28; 1292 }; 1293 1294 //! 1295 //! \brief AVP_IND_OBJ_BASE_ADDR_STATE 1296 //! \details 1297 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 1298 //! all AVP Commands. Each AVP command has assigned a media instruction 1299 //! command as defined in DWord 0, BitField 22:16. 1300 //! 1301 //! The AVP_IND_OBJ_BASE_ADDR_STATE command is used to define the indirect 1302 //! object base address of the AV1 compressed bitstream in graphics memory. 1303 //! This is a frame level command issued in both encoding and decoding 1304 //! processes. Although a frame is coded as separate tiles, all tiles' 1305 //! compressed bitstream are still required to line up sequentially as one 1306 //! AV1 bitstream. Hence, there is only one Indirect Object Base Address for 1307 //! the entire AV1 codedframe. If the frame contains more than 1 tiles, the 1308 //! BSD Object Command will be issued multiple times, once for each tile and 1309 //! with its own tile bitstream starting memory address. 1310 //! 1311 struct AVP_IND_OBJ_BASE_ADDR_STATE_CMD 1312 { 1313 union 1314 { 1315 struct 1316 { 1317 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1318 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1319 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1320 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1321 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1322 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1323 }; 1324 uint32_t Value; 1325 } DW0; 1326 SPLITBASEADDRESS4KBYTEALIGNED_CMD AvpIndirectBitstreamObjectBaseAddress; //!< DW1..2, AVP Indirect Bitstream Object Base Address 1327 MEMORYADDRESSATTRIBUTES_CMD AvpIndirectBitstreamObjectMemoryAddressAttributes; //!< DW3, AVP Indirect Bitstream Object Memory Address Attributes 1328 SPLITBASEADDRESS4KBYTEALIGNED_CMD AvpIndirectBitstreamObjectAccessUpperBound; //!< DW4..5, AVP Indirect Bitstream Object Access Upper Bound 1329 SPLITBASEADDRESS4KBYTEALIGNED_CMD AvpIndirectCuObjectBaseAddress; //!< DW6..7, AVP Indirect CU Object Base Address 1330 MEMORYADDRESSATTRIBUTES_CMD AvpIndirectCuObjectMemoryAddressAttributes; //!< DW8, AVP Indirect CU Object Object Memory Address Attributes 1331 1332 //! \name Local enumerations 1333 1334 enum MEDIA_INSTRUCTION_COMMAND 1335 { 1336 MEDIA_INSTRUCTION_COMMAND_AVPINDOBJBASEADDRSTATE = 3, //!< No additional details 1337 }; 1338 1339 //! \brief MEDIA_INSTRUCTION_OPCODE 1340 //! \details 1341 //! Codec/Engine Name = AVP = 3h 1342 enum MEDIA_INSTRUCTION_OPCODE 1343 { 1344 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1345 }; 1346 1347 enum PIPELINE_TYPE 1348 { 1349 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1350 }; 1351 1352 enum COMMAND_TYPE 1353 { 1354 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1355 }; 1356 1357 //! \name Initializations 1358 1359 //! \brief Explicit member initialization function 1360 AVP_IND_OBJ_BASE_ADDR_STATE_CMD(); 1361 1362 static const size_t dwSize = 9; 1363 static const size_t byteSize = 36; 1364 }; 1365 1366 //! 1367 //! \brief AVP_TILE_CODING 1368 //! \details 1369 //! This command is used only for AV1codec. It is issued for every tile of a 1370 //! frame. If a frame is composed of only 1 tile, it is still being issued. 1371 //! Tiling and Tile Group organization in AV1 cannot be disabled, a frame 1372 //! minimum must have 1 tile. Currently, each batch buffer can contain only 1373 //! 1 tile to be processed, it cannot contain more than 1 tile or the entire 1374 //! tile group of tiles. When the tile width exceeds 4096 pixels or the 1375 //! tile area exceeds 4096x2304 pixels, tiling must be performed and number 1376 //! of tiles in such frame must be >1. There is no mandatory tiling driven 1377 //! by tile height. The frame height in pixels will limit the allowed tile 1378 //! height in extreme situation. Hence, the AVP_TILE_CODING can be issued 1379 //! multiple times for decoding a frame. Since AVP HW pipeline is 1380 //! stateless, all sequence, frame and segment level states (coding 1381 //! parameters in all Frame Level State Commands) must be resent before 1382 //! sending each TILE_CODING_STATE command. Although tile size is specified 1383 //! in SuperBlock unit, the minimum tile size is actually set to be 8x8 1384 //! pixels (which is the same as the minimum frame size in pixels). It can 1385 //! also happen to the rightmost tile column and bottommost tile row of a 1386 //! frame which is not divisible by the SuperBlock size - this leads to the 1387 //! presence of partial tile and partial SuperBlock handling. AV1 supports 1388 //! both 1) a uniform-spacing tiling scheme (as in VP9, which is always in 1389 //! the form of 2^N x 2^M number of tiles, for the entire frame), and 2) a 1390 //! non-uniform-spacing tiling scheme. Bitstream syntax elements will 1391 //! specify the width and height of each tile size in the frame. AVP HW 1392 //! pipeline is a tile-based codec engine, it does not need to distinguish 1393 //! between these two tiling schemes. Driver will take care of the 1394 //! difference and details of these tiling schemes. At the end, Driver will 1395 //! send out one tile at a time with all the related tile information to the 1396 //! HW through this TILE_CODING State Command. In AV1, a frame is 1397 //! partitioned by tile row and tile column. That is, a tile boundary must 1398 //! go across the full frame width or the full frame height only. There is 1399 //! no tiling within a tile. For AV1, the max number of tiles per frame is 1400 //! set to 256 in the LEVEL definition for regular video decoding. The 1401 //! ext-tile (Virtual Reality mode, currently not supported) has a different 1402 //! tiling configuration, constraints and definition. 1403 //! 1404 struct AVP_TILE_CODING_CMD 1405 { 1406 union 1407 { 1408 struct 1409 { 1410 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1411 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1412 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1413 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1414 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1415 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1416 }; 1417 uint32_t Value; 1418 } DW0; 1419 union 1420 { 1421 struct 1422 { 1423 uint32_t FrameTileId : __CODEGEN_BITFIELD(0, 11); //!< Frame Tile ID 1424 uint32_t TgTileNum : __CODEGEN_BITFIELD(12, 23); //!< TG Tile Num 1425 uint32_t TileGroupId : __CODEGEN_BITFIELD(24, 31); //!< Tile Group ID 1426 }; 1427 uint32_t Value; 1428 } DW1; 1429 union 1430 { 1431 struct 1432 { 1433 uint32_t TileColumnPositionInSbUnit : __CODEGEN_BITFIELD(0, 9); //!< Tile Column Position in SB Unit 1434 uint32_t Reserved74 : __CODEGEN_BITFIELD(10, 15); //!< Reserved 1435 uint32_t TileRowPositionInSbUnit : __CODEGEN_BITFIELD(16, 25); //!< Tile Row Position in SB Unit 1436 uint32_t Reserved90 : __CODEGEN_BITFIELD(26, 31); //!< Reserved 1437 }; 1438 uint32_t Value; 1439 } DW2; 1440 union 1441 { 1442 struct 1443 { 1444 uint32_t TileWidthInSuperblockUnitMinus1 : __CODEGEN_BITFIELD(0, 5); //!< Tile Width in SuperBlock Unit Minus1 1445 uint32_t Reserved102 : __CODEGEN_BITFIELD(6, 15); //!< Reserved 1446 uint32_t TileHeightInSuperblockUnitMinus1 : __CODEGEN_BITFIELD(16, 25); //!< Tile Height in SuperBlock Unit Minus1 1447 uint32_t Reserved122 : __CODEGEN_BITFIELD(26, 31); //!< Reserved 1448 }; 1449 uint32_t Value; 1450 } DW3; 1451 union 1452 { 1453 struct 1454 { 1455 uint32_t FirstPhaseOnScalabilityMode : __CODEGEN_BITFIELD(0, 0); //!< First Phase on Scalability Mode 1456 uint32_t LastPhaseOnScalabilityMode : __CODEGEN_BITFIELD(1, 1); //!< Last Phase on Scalability Mode 1457 uint32_t AvpCrcEnable : __CODEGEN_BITFIELD(2, 2); 1458 uint32_t Reserved131 : __CODEGEN_BITFIELD(3, 22); //!< Reserved 1459 uint32_t FirstTileInAFrame : __CODEGEN_BITFIELD(23, 23); //!< First Tile in a Frame 1460 uint32_t Reserved152 : __CODEGEN_BITFIELD(24, 24); //!< Reserved 1461 uint32_t IslasttileofcolumnFlag : __CODEGEN_BITFIELD(25, 25); //!< IsLastTileOfColumn Flag 1462 uint32_t IslasttileofrowFlag : __CODEGEN_BITFIELD(26, 26); //!< IsLastTileOfRow Flag 1463 uint32_t IsstarttileoftilegroupFlag : __CODEGEN_BITFIELD(27, 27); //!< IsStartTileOfTileGroup Flag 1464 uint32_t IsendtileoftilegroupFlag : __CODEGEN_BITFIELD(28, 28); //!< IsEndTileOfTileGroup Flag 1465 uint32_t IslasttileofframeFlag : __CODEGEN_BITFIELD(29, 29); //!< IsLastTileOfFrame Flag 1466 uint32_t DisableCdfUpdateFlag : __CODEGEN_BITFIELD(30, 30); //!< Disable CDF Update Flag 1467 uint32_t DisableFrameContextUpdateFlag : __CODEGEN_BITFIELD(31, 31); //!< Disable Frame Context Update Flag 1468 }; 1469 uint32_t Value; 1470 } DW4; 1471 union 1472 { 1473 struct 1474 { 1475 uint32_t NumberOfActiveBePipes : __CODEGEN_BITFIELD(0, 7); //!< Number of Active BE Pipes 1476 uint32_t Reserved168 : __CODEGEN_BITFIELD(8, 11); //!< Reserved MBZ 1477 uint32_t NumOfTileColumnsMinus1InAFrame : __CODEGEN_BITFIELD(12, 21); //!< Num of Tile Columns Minus1 in a Frame 1478 uint32_t NumOfTileRowsMinus1InAFrame : __CODEGEN_BITFIELD(22, 31); //!< Num of Tile Rows Minus1 in a Frame 1479 }; 1480 uint32_t Value; 1481 } DW5; 1482 union 1483 { 1484 struct 1485 { 1486 uint32_t OutputDecodedTileColumnPositionInSbUnit : __CODEGEN_BITFIELD(0, 9); //!< Output Decoded Tile Column Position in SB Unit 1487 uint32_t Reserved202 : __CODEGEN_BITFIELD(10, 15); //!< Reserved 1488 uint32_t OutputDecodedTileRowPositionInSbUnit : __CODEGEN_BITFIELD(16, 25); //!< Output Decoded Tile Row Position in SB Unit 1489 uint32_t Reserved218 : __CODEGEN_BITFIELD(26, 31); //!< Reserved 1490 }; 1491 uint32_t Value; 1492 } DW6; 1493 1494 //! \name Local enumerations 1495 1496 enum MEDIA_INSTRUCTION_COMMAND 1497 { 1498 MEDIA_INSTRUCTION_COMMAND_AVPTILECODING = 21, //!< No additional details 1499 }; 1500 1501 enum MEDIA_INSTRUCTION_OPCODE 1502 { 1503 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1504 }; 1505 1506 enum PIPELINE_TYPE 1507 { 1508 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1509 }; 1510 1511 enum COMMAND_TYPE 1512 { 1513 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1514 }; 1515 1516 //! \name Initializations 1517 1518 //! \brief Explicit member initialization function 1519 AVP_TILE_CODING_CMD(); 1520 1521 static const size_t dwSize = 7; 1522 static const size_t byteSize = 28; 1523 }; 1524 1525 //! 1526 //! \brief AVP_SURFACE_STATE 1527 //! \details 1528 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 1529 //! all AVP Commands. Each AVP command has assigned a media instruction 1530 //! command as defined in DWord 0, BitField 22:16. 1531 //! 1532 //! The AVP_SURFACE_STATE command is responsible for defining the frame 1533 //! buffer pitch and the offset of the chroma component.This is a picture 1534 //! level state command and is shared by both encoding and decoding 1535 //! processes.For Decoder, this command is issued once per surface type. 1536 //! There is one reconstructed surface, 8 reference pictures surfaces and 1537 //! one optional IntraBC Decoded Surface (only if IBC is ON).For Encoder, 1538 //! this command is issued once per surface type. There are4 surface types 1539 //! :source down scaled, source original, reference and reconstructed 1540 //! picture. All reference frames are defined with the same surface 1541 //! command.Tile-Yf and Tile-Ys are not supported in Gen12, but HW interface 1542 //! still need to keep these bits as reserved bits.Note : When NV12 and Tile 1543 //! Y are being used, full pitch and interleaved UV is always in use. U and 1544 //! V Xoffset must be set to 0; U and V Yoffset must be 8-pixel aligned. For 1545 //! 10-bit pixel, P010 surface definition is being used. 1546 //! 1547 struct AVP_SURFACE_STATE_CMD 1548 { 1549 union 1550 { 1551 struct 1552 { 1553 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1554 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1555 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1556 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1557 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1558 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1559 }; 1560 uint32_t Value; 1561 } DW0; 1562 union 1563 { 1564 struct 1565 { 1566 uint32_t SurfacePitchMinus1 : __CODEGEN_BITFIELD(0, 16); //!< Surface Pitch Minus1 1567 uint32_t Reserved49 : __CODEGEN_BITFIELD(17, 27); //!< Reserved 1568 uint32_t SurfaceId : __CODEGEN_BITFIELD(28, 31); //!< SURFACE_ID 1569 }; 1570 uint32_t Value; 1571 } DW1; 1572 union 1573 { 1574 struct 1575 { 1576 uint32_t YOffsetForUCbInPixel : __CODEGEN_BITFIELD(0, 14); //!< Y Offset for U(Cb) in pixel 1577 uint32_t Reserved79 : __CODEGEN_BITFIELD(15, 24); //!< Reserved 1578 uint32_t VariantFormatLsbPackedEnable : __CODEGEN_BITFIELD(25, 25); //!< VARIANT_FORMAT_LSB_PACKED_ENABLE 1579 uint32_t Reserved90 : __CODEGEN_BITFIELD(26, 26); //!< Reserved 1580 uint32_t SurfaceFormat : __CODEGEN_BITFIELD(27, 31); //!< SURFACE_FORMAT 1581 }; 1582 uint32_t Value; 1583 } DW2; 1584 union 1585 { 1586 struct 1587 { 1588 uint32_t DefaultAlphaValue : __CODEGEN_BITFIELD(0, 15); //!< Default Alpha Value 1589 uint32_t YOffsetForVCr : __CODEGEN_BITFIELD(16, 31); //!< Y Offset for V(Cr) 1590 }; 1591 uint32_t Value; 1592 } DW3; 1593 union 1594 { 1595 struct 1596 { 1597 uint32_t MemoryCompressionEnableForAv1IntraFrame : __CODEGEN_BITFIELD(0, 0); //!< MEMORY_COMPRESSION_ENABLE_FOR_AV1_INTRA_FRAME 1598 uint32_t MemoryCompressionEnableForAv1LastFrame : __CODEGEN_BITFIELD(1, 1); //!< MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST_FRAME 1599 uint32_t MemoryCompressionEnableForAv1Last2Frame : __CODEGEN_BITFIELD(2, 2); //!< MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST2_FRAME 1600 uint32_t MemoryCompressionEnableForAv1Last3Frame : __CODEGEN_BITFIELD(3, 3); //!< MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST3_FRAME 1601 uint32_t MemoryCompressionEnableForAv1GoldenFrame : __CODEGEN_BITFIELD(4, 4); //!< MEMORY_COMPRESSION_ENABLE_FOR_AV1_GOLDEN_FRAME 1602 uint32_t MemoryCompressionEnableForAv1BwdrefFrame : __CODEGEN_BITFIELD(5, 5); //!< MEMORY_COMPRESSION_ENABLE_FOR_AV1_BWDREF_FRAME 1603 uint32_t MemoryCompressionEnableForAv1Altref2Frame : __CODEGEN_BITFIELD(6, 6); //!< MEMORY_COMPRESSION_ENABLE_FOR_AV1_ALTREF2_FRAME 1604 uint32_t MemoryCompressionEnableForAv1AltrefFrame : __CODEGEN_BITFIELD(7, 7); //!< MEMORY_COMPRESSION_ENABLE_FOR_AV1_ALTREF_FRAME 1605 uint32_t CompressionTypeForIntraFrame : __CODEGEN_BITFIELD(8, 8); //!< COMPRESSION_TYPE_FOR_INTRA_FRAME 1606 uint32_t CompressionTypeForLastFrame : __CODEGEN_BITFIELD(9, 9); //!< COMPRESSION_TYPE_FOR_LAST_FRAME 1607 uint32_t CompressionTypeForLast2Frame : __CODEGEN_BITFIELD(10, 10); //!< COMPRESSION_TYPE_FOR_LAST2_FRAME 1608 uint32_t CompressionTypeForLast3Frame : __CODEGEN_BITFIELD(11, 11); //!< COMPRESSION_TYPE_FOR_LAST3_FRAME 1609 uint32_t CompressionTypeForGoldenFrame : __CODEGEN_BITFIELD(12, 12); //!< COMPRESSION_TYPE_FOR_GOLDEN_FRAME 1610 uint32_t CompressionTypeForBwdrefFrame : __CODEGEN_BITFIELD(13, 13); //!< COMPRESSION_TYPE_FOR_BWDREF_FRAME 1611 uint32_t CompressionTypeForAltref2Frame : __CODEGEN_BITFIELD(14, 14); //!< COMPRESSION_TYPE_FOR_ALTREF2_FRAME 1612 uint32_t CompressionTypeForAltrefFrame : __CODEGEN_BITFIELD(15, 15); //!< COMPRESSION_TYPE_FOR_ALTREF_FRAME 1613 uint32_t CompressionFormat : __CODEGEN_BITFIELD(16, 20); //!< Compression Format 1614 uint32_t Reserved149 : __CODEGEN_BITFIELD(21, 31); //!< Reserved 1615 }; 1616 uint32_t Value; 1617 } DW4; 1618 1619 //! \name Local enumerations 1620 1621 enum MEDIA_INSTRUCTION_COMMAND 1622 { 1623 MEDIA_INSTRUCTION_COMMAND_SURFACESTATE = 1, //!< No additional details 1624 }; 1625 1626 //! \brief MEDIA_INSTRUCTION_OPCODE 1627 //! \details 1628 //! Codec/Engine Name = AVP = 3h 1629 enum MEDIA_INSTRUCTION_OPCODE 1630 { 1631 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1632 }; 1633 1634 enum PIPELINE_TYPE 1635 { 1636 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1637 }; 1638 1639 enum COMMAND_TYPE 1640 { 1641 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1642 }; 1643 1644 enum SURFACE_ID 1645 { 1646 SURFACE_ID_RECONSTRUCTEDPICTURE = 0, //!< This is for the reconstructed picture surface state 1647 SURFACE_ID_SOURCEDOWNSCALEDINPUTPICTURE_ENCODERONLY = 1, //!< Downscaled source pixels used for encoding (creating bitstream)Valid for encoder only 1648 SURFACE_ID_AV1FILMGRAININJECTEDOUTPUTPIXELS_DECODERONLY = 2, //!< This is for output surface generated after film grain. This is only enabled in decoder mode with film grain enabled only 1649 SURFACE_ID_AV1ORIGINALUPSCALEDSOURCEPIXELS_ENCODERONLY = 3, //!< This is for AV1 original/upscaled source pixels surface used for Wiener filterValid for encoder only 1650 SURFACE_ID_AV1INTRAFRAME = 6, //!< This is for AV1 Intra Frame (Reference Picture 0). Each AV1 Reference Pictures can have different size so a separate ID is needed.For 8bit: NV12 formatFor 10bit: P010V format WITHLSBs fully maintained.This is the reconstructed frame output at the output end of the Loop Restoration Filter, and will be used as a reference frame placed inside the DPB for future frame to reference for inter-prediction. 1651 SURFACE_ID_AV1LASTFRAME = 7, //!< This is for AV1Last Frame (Reference Picture 1). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1652 SURFACE_ID_AV1LAST2FRAME = 8, //!< This is for AV1 Last2 Frame (Reference Picture 2). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1653 SURFACE_ID_AV1LAST3FRAME = 9, //!< This is for AV1 Last3 Frame (Reference Picture 3). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1654 SURFACE_ID_AV1GOLDENFRAME = 10, //!< This is for AV1 Golden Frame (Reference Picture 4). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1655 SURFACE_ID_AV1BWDREFFRAME = 11, //!< This is for AV1 Bwdref Frame (Reference Picture 5). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1656 SURFACE_ID_AV1ALTREF2FRAME = 12, //!< This is for AV1 Altref2 Frame (Reference Picture 6). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1657 SURFACE_ID_AV1ALTREFFRAME = 13, //!< This is for AV1 Altref Frame (Reference Picture 7). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1658 SURFACE_ID_INTRABCDECODEDFRAME = 14, //!< This is for AV1 IntraBC Decoded Frame. It will be used both Read/Write at the same time. This surface requires multiple of 8 pixels on both width and height. 1659 SURFACE_ID_AV1CDEFPIXELSSTREAMOUT_ENCODERONLY = 15, //!< Surface forwriting out Post CDEF pixels as,For 8bit: NV12 formatFor 10bit: P010V format WITHOUT LSBs 1660 }; 1661 1662 //! \brief VARIANT_FORMAT_LSB_PACKED_ENABLE 1663 //! \details 1664 //! This bit indicates if the LSB portion of the variant format is packed 1665 //! together or byte-aligned with 0 to lower portion part of the byte. 1666 //! This is only valid forP010Variant/P016Variant 1667 //! andY210Variant/Y216Variant (444 Variant is not supported currently). 1668 //! This bit must be programmed to 0 for all other format. 1669 enum VARIANT_FORMAT_LSB_PACKED_ENABLE 1670 { 1671 VARIANT_FORMAT_LSB_PACKED_ENABLE_LSBUNPACKED = 0, //!< Indicates LSB portion of the Variant format is byte-aligned per pixel by adding "0" to the lower part of the byte 1672 VARIANT_FORMAT_LSB_PACKED_ENABLE_LSBPACKED = 1, //!< Indicates LSB portion of the Variant format is packed together (multiple LSB pixels are packed together to form a byte). The number of LSB pixels can be packed together depends on the bitdepth of the pixels. 1673 }; 1674 1675 //! \brief SURFACE_FORMAT 1676 //! \details 1677 //! Specifies the format of the surface. 1678 enum SURFACE_FORMAT 1679 { 1680 SURFACE_FORMAT_P010VARIANT = 3, //!< P010Variant is a modified P010 format, >8 bit planar 420 with MSB together and LSB at an offset in x direction where the x-offset should be 32-bit aligned. 1681 SURFACE_FORMAT_PLANAR4208 = 4, //!< No additional details 1682 SURFACE_FORMAT_P010 = 13, //!< No additional details 1683 }; 1684 1685 //! \brief MEMORY_COMPRESSION_ENABLE_FOR_AV1_INTRA_FRAME 1686 //! \details 1687 //! This bit is for AV1 Intra Frame (Reference Picture 0). 1688 enum MEMORY_COMPRESSION_ENABLE_FOR_AV1_INTRA_FRAME 1689 { 1690 MEMORY_COMPRESSION_ENABLE_FOR_AV1_INTRA_FRAME_MEMORYCOMPRESSIONDISABLE = 0, //!< No additional details 1691 MEMORY_COMPRESSION_ENABLE_FOR_AV1_INTRA_FRAME_MEMORYCOMPRESSIONENABLE = 1, //!< No additional details 1692 }; 1693 1694 //! \brief MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST_FRAME 1695 //! \details 1696 //! This bit is for AV1 Last Frame (Reference Picture 1). 1697 enum MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST_FRAME 1698 { 1699 MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST_FRAME_MEMORYCOMPRESSIONDISABLE = 0, //!< No additional details 1700 MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST_FRAME_MEMORYCOMPRESSIONENABLE = 1, //!< No additional details 1701 }; 1702 1703 //! \brief MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST2_FRAME 1704 //! \details 1705 //! This bit is for AV1 Last2 Frame (Reference Picture 2). 1706 enum MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST2_FRAME 1707 { 1708 MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST2_FRAME_MEMORYCOMPRESSIONDISABLE = 0, //!< No additional details 1709 MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST2_FRAME_MEMORYCOMPRESSIONENABLE = 1, //!< No additional details 1710 }; 1711 1712 //! \brief MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST3_FRAME 1713 //! \details 1714 //! This bit is for AV1 Last3 Frame (Reference Picture 3). 1715 enum MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST3_FRAME 1716 { 1717 MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST3_FRAME_MEMORYCOMPRESSIONDISABLE = 0, //!< No additional details 1718 MEMORY_COMPRESSION_ENABLE_FOR_AV1_LAST3_FRAME_MEMORYCOMPRESSIONENABLE = 1, //!< No additional details 1719 }; 1720 1721 //! \brief MEMORY_COMPRESSION_ENABLE_FOR_AV1_GOLDEN_FRAME 1722 //! \details 1723 //! This bit is for AV1 Golden Frame (Reference Picture 4). 1724 enum MEMORY_COMPRESSION_ENABLE_FOR_AV1_GOLDEN_FRAME 1725 { 1726 MEMORY_COMPRESSION_ENABLE_FOR_AV1_GOLDEN_FRAME_MEMORYCOMPRESSIONDISABLE = 0, //!< No additional details 1727 MEMORY_COMPRESSION_ENABLE_FOR_AV1_GOLDEN_FRAME_MEMORYCOMPRESSIONENABLE = 1, //!< No additional details 1728 }; 1729 1730 //! \brief MEMORY_COMPRESSION_ENABLE_FOR_AV1_BWDREF_FRAME 1731 //! \details 1732 //! This bit is for AV1 Bwdref Frame (Reference Picture 5). 1733 enum MEMORY_COMPRESSION_ENABLE_FOR_AV1_BWDREF_FRAME 1734 { 1735 MEMORY_COMPRESSION_ENABLE_FOR_AV1_BWDREF_FRAME_MEMORYCOMPRESSIONDISABLE = 0, //!< No additional details 1736 MEMORY_COMPRESSION_ENABLE_FOR_AV1_BWDREF_FRAME_MEMORYCOMPRESSIONENABLE = 1, //!< No additional details 1737 }; 1738 1739 //! \brief MEMORY_COMPRESSION_ENABLE_FOR_AV1_ALTREF2_FRAME 1740 //! \details 1741 //! This bit is for AV1Altref2 Frame (Reference Picture 6). 1742 enum MEMORY_COMPRESSION_ENABLE_FOR_AV1_ALTREF2_FRAME 1743 { 1744 MEMORY_COMPRESSION_ENABLE_FOR_AV1_ALTREF2_FRAME_MEMORYCOMPRESSIONDISABLE = 0, //!< No additional details 1745 MEMORY_COMPRESSION_ENABLE_FOR_AV1_ALTREF2_FRAME_MEMORYCOMPRESSIONENABLE = 1, //!< No additional details 1746 }; 1747 1748 //! \brief MEMORY_COMPRESSION_ENABLE_FOR_AV1_ALTREF_FRAME 1749 //! \details 1750 //! This bit is for AV1Altref Frame (Reference Picture 7). 1751 enum MEMORY_COMPRESSION_ENABLE_FOR_AV1_ALTREF_FRAME 1752 { 1753 MEMORY_COMPRESSION_ENABLE_FOR_AV1_ALTREF_FRAME_MEMORYCOMPRESSIONDISABLE = 0, //!< No additional details 1754 MEMORY_COMPRESSION_ENABLE_FOR_AV1_ALTREF_FRAME_MEMORYCOMPRESSIONENABLE = 1, //!< No additional details 1755 }; 1756 1757 //! \brief COMPRESSION_TYPE_FOR_INTRA_FRAME 1758 //! \details 1759 //! This bit is for Intra Frame (Reference Picture 0). Valid only when 1760 //! Memory Compression for Intra Frame is enabled. 1761 enum COMPRESSION_TYPE_FOR_INTRA_FRAME 1762 { 1763 COMPRESSION_TYPE_FOR_INTRA_FRAME_MEDIACOMPRESSIONENABLED = 0, //!< No additional details 1764 COMPRESSION_TYPE_FOR_INTRA_FRAME_RENDERCOMPRESSIONENABLED = 1, //!< No additional details 1765 }; 1766 1767 //! \brief COMPRESSION_TYPE_FOR_LAST_FRAME 1768 //! \details 1769 //! This bit is for AV1 Last Frame (Reference Picture 1). Valid only when 1770 //! Memory Compression for Last Frameis enabled. 1771 enum COMPRESSION_TYPE_FOR_LAST_FRAME 1772 { 1773 COMPRESSION_TYPE_FOR_LAST_FRAME_MEDIACOMPRESSIONENABLED = 0, //!< No additional details 1774 COMPRESSION_TYPE_FOR_LAST_FRAME_RENDERCOMPRESSIONENABLED = 1, //!< No additional details 1775 }; 1776 1777 //! \brief COMPRESSION_TYPE_FOR_LAST2_FRAME 1778 //! \details 1779 //! This bit is for AV1 Last2 Frame (Reference Picture 2). Valid only when 1780 //! Memory Compression for Last2 Frame is enabled. 1781 enum COMPRESSION_TYPE_FOR_LAST2_FRAME 1782 { 1783 COMPRESSION_TYPE_FOR_LAST2_FRAME_MEDIACOMPRESSIONENABLED = 0, //!< No additional details 1784 COMPRESSION_TYPE_FOR_LAST2_FRAME_RENDERCOMPRESSIONENABLED = 1, //!< No additional details 1785 }; 1786 1787 //! \brief COMPRESSION_TYPE_FOR_LAST3_FRAME 1788 //! \details 1789 //! This bit is for AV1 Last3 Frame (Reference Picture 3). Valid only when 1790 //! Memory Compression for Last3 Frameis enabled. 1791 enum COMPRESSION_TYPE_FOR_LAST3_FRAME 1792 { 1793 COMPRESSION_TYPE_FOR_LAST3_FRAME_MEDIACOMPRESSIONENABLED = 0, //!< No additional details 1794 COMPRESSION_TYPE_FOR_LAST3_FRAME_RENDERCOMPRESSIONENABLED = 1, //!< No additional details 1795 }; 1796 1797 //! \brief COMPRESSION_TYPE_FOR_GOLDEN_FRAME 1798 //! \details 1799 //! This bit is for AV1 Golden Frame (Reference Picture 4). Valid only when 1800 //! Memory Compression for Golden Frame is enabled. 1801 enum COMPRESSION_TYPE_FOR_GOLDEN_FRAME 1802 { 1803 COMPRESSION_TYPE_FOR_GOLDEN_FRAME_MEDIACOMPRESSIONENABLED = 0, //!< No additional details 1804 COMPRESSION_TYPE_FOR_GOLDEN_FRAME_RENDERCOMPRESSIONENABLED = 1, //!< No additional details 1805 }; 1806 1807 //! \brief COMPRESSION_TYPE_FOR_BWDREF_FRAME 1808 //! \details 1809 //! This bit is for AV1 Bwdref Frame (Reference Picture 5). Valid only when 1810 //! Memory Compression for Bwdref Frame is enabled. 1811 enum COMPRESSION_TYPE_FOR_BWDREF_FRAME 1812 { 1813 COMPRESSION_TYPE_FOR_BWDREF_FRAME_MEDIACOMPRESSIONENABLED = 0, //!< No additional details 1814 COMPRESSION_TYPE_FOR_BWDREF_FRAME_RENDERCOMPRESSIONENABLED = 1, //!< No additional details 1815 }; 1816 1817 //! \brief COMPRESSION_TYPE_FOR_ALTREF2_FRAME 1818 //! \details 1819 //! This bit is for AV1 Altref2 Frame (Reference Picture 6). Valid only when 1820 //! Memory Compression for Altref2 Frame is enabled. 1821 enum COMPRESSION_TYPE_FOR_ALTREF2_FRAME 1822 { 1823 COMPRESSION_TYPE_FOR_ALTREF2_FRAME_MEDIACOMPRESSIONENABLED = 0, //!< No additional details 1824 COMPRESSION_TYPE_FOR_ALTREF2_FRAME_RENDERCOMPRESSIONENABLED = 1, //!< No additional details 1825 }; 1826 1827 //! \brief COMPRESSION_TYPE_FOR_ALTREF_FRAME 1828 //! \details 1829 //! This bit is for AV1 Altref Frame (Reference Picture 7). Valid only when 1830 //! Memory Compression for Altref Frame is enabled. 1831 enum COMPRESSION_TYPE_FOR_ALTREF_FRAME 1832 { 1833 COMPRESSION_TYPE_FOR_ALTREF_FRAME_MEDIACOMPRESSIONENABLED = 0, //!< No additional details 1834 COMPRESSION_TYPE_FOR_ALTREF_FRAME_RENDERCOMPRESSIONENABLED = 1, //!< No additional details 1835 }; 1836 1837 //! \name Initializations 1838 1839 //! \brief Explicit member initialization function 1840 AVP_SURFACE_STATE_CMD(); 1841 1842 static const size_t dwSize = 5; 1843 static const size_t byteSize = 20; 1844 }; 1845 1846 //! 1847 //! \brief AVP_SEGMENT_STATE 1848 //! \details 1849 //! When segmentation is enabled, this Segment State command is issued 1850 //! onceper segment. There can be maximum 8 segments specified to decode a 1851 //! given frame, so this Segment State Command can be issued maximum 8 1852 //! times. It is assumed that there is no gap in segment IDs. So, when the 1853 //! AVP PIC States specified that the number of active When segmentation 1854 //! is disabled, driver still sends out this command once for segment id = 1855 //! 0. HW needs to check the segmentation enable flag from AVP_PIC_STATE 1856 //! Command as well to distinguish from the case when segmentation is 1857 //! enabled for segment id = 0. Each segment can have its own specification 1858 //! of enabling any one of the 8 features defined in AV1 and their 1859 //! corresponding feature data. When a feature is not enabled, its feature 1860 //! data is defaulted to 0. When segmentation is not enabled, all the 1861 //! features are disabled and their corresponding feature data are set to 0. 1862 //! style="margin:0in 0in 8pt"> Segment State Command also provides other 1863 //! segement related parameters. style="margin:0in 0in 8pt"> It is assumed 1864 //! that HW is keeping a copy of the complete AV1 QM Matrix Tablefor all 1865 //! color components inside its internal memory, and Driver only needs to 1866 //! send the qm_level as index into this Table. 1867 //! 1868 struct AVP_SEGMENT_STATE_CMD 1869 { 1870 union 1871 { 1872 struct 1873 { 1874 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1875 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1876 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1877 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1878 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1879 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1880 }; 1881 uint32_t Value; 1882 } DW0; 1883 union 1884 { 1885 struct 1886 { 1887 uint32_t SegmentId : __CODEGEN_BITFIELD(0, 2); //!< Segment ID 1888 uint32_t Reserved35 : __CODEGEN_BITFIELD(3, 31); //!< Reserved 1889 }; 1890 uint32_t Value; 1891 } DW1; 1892 union 1893 { 1894 struct 1895 { 1896 uint32_t SegmentFeatureMask : __CODEGEN_BITFIELD(0, 7); //!< Segment Feature Mask 1897 uint32_t SegmentDeltaQindex : __CODEGEN_BITFIELD(8, 16); //!< Segment Delta Qindex 1898 uint32_t SegmentBlockSkipFlag : __CODEGEN_BITFIELD(17, 17); //!< Segment Block Skip Flag 1899 uint32_t SegmentBlockGlobalmvFlag : __CODEGEN_BITFIELD(18, 18); //!< Segment Block GlobalMV Flag 1900 uint32_t SegmentLosslessFlag : __CODEGEN_BITFIELD(19, 19); //!< Segment Lossless Flag 1901 uint32_t SegmentLumaYQmLevel : __CODEGEN_BITFIELD(20, 23); //!< Segment Luma Y QM Level 1902 uint32_t SegmentChromaUQmLevel : __CODEGEN_BITFIELD(24, 27); //!< Segment Chroma U QM Level 1903 uint32_t SegmentChromaVQmLevel : __CODEGEN_BITFIELD(28, 31); //!< Segment Chroma V QM Level 1904 }; 1905 uint32_t Value; 1906 } DW2; 1907 union 1908 { 1909 struct 1910 { 1911 uint32_t SegmentDeltaLoopFilterLevelLumaVertical : __CODEGEN_BITFIELD(0, 6); //!< Segment Delta Loop Filter Level Luma Vertical 1912 uint32_t SegmentDeltaLoopFilterLevelLumaHorizontal : __CODEGEN_BITFIELD(7, 13); //!< Segment Delta Loop Filter Level Luma Horizontal 1913 uint32_t SegmentDeltaLoopFilterLevelChromaU : __CODEGEN_BITFIELD(14, 20); //!< Segment Delta Loop Filter Level Chroma U 1914 uint32_t SegmentDeltaLoopFilterLevelChromaV : __CODEGEN_BITFIELD(21, 27); //!< Segment Delta Loop Filter Level Chroma V 1915 uint32_t SegmentReferenceFrame : __CODEGEN_BITFIELD(28, 30); //!< Segment Reference Frame 1916 uint32_t Reserved127 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 1917 }; 1918 uint32_t Value; 1919 } DW3; 1920 1921 //! \name Local enumerations 1922 1923 enum MEDIA_INSTRUCTION_COMMAND 1924 { 1925 MEDIA_INSTRUCTION_COMMAND_AVPSEGMENTSTATE = 50, //!< No additional details 1926 }; 1927 1928 //! \brief MEDIA_INSTRUCTION_OPCODE 1929 //! \details 1930 //! Codec/Engine Name = AVP = 3h 1931 enum MEDIA_INSTRUCTION_OPCODE 1932 { 1933 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1934 }; 1935 1936 enum PIPELINE_TYPE 1937 { 1938 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1939 }; 1940 1941 enum COMMAND_TYPE 1942 { 1943 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1944 }; 1945 1946 //! \name Initializations 1947 1948 //! \brief Explicit member initialization function 1949 AVP_SEGMENT_STATE_CMD(); 1950 1951 static const size_t dwSize = 4; 1952 static const size_t byteSize = 16; 1953 }; 1954 1955 //! 1956 //! \brief AVP_PIPE_BUF_ADDR_STATE 1957 //! \details 1958 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 1959 //! all AVP Commands. Each AVP command has assigned a media instruction 1960 //! command as defined in DWord 0, BitField 22:16. 1961 //! 1962 //! This state command provides the physical memory base addresses for all 1963 //! row store buffers, column store buffers (for tile column and in 1964 //! scalability mode), reconstructed output and reference frame buffers, and 1965 //! auxiliary data buffers (MV, segment map, etc.) that are required by the 1966 //! AV1 decoding and encoding process.This is a frame level state command 1967 //! and is shared by both encoding and decoding processes.AVP is a tile 1968 //! based pipeline and is a stateless pipeline, hence all sequence level, 1969 //! frame level, and segment level state commands must be resent to process 1970 //! each tile.Memory compression may be applicable to some of these buffers 1971 //! for BW saving.Note : there is no buffer to store the 16 QM table sets, 1972 //! they are implemented directly inside the HW pipeline. 1973 //! 1974 struct AVP_PIPE_BUF_ADDR_STATE_CMD 1975 { 1976 union 1977 { 1978 struct 1979 { 1980 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1981 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1982 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1983 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1984 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1985 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1986 }; 1987 uint32_t Value; 1988 } DW0; 1989 SPLITBASEADDRESS64BYTEALIGNED_CMD ReferenceFrameBufferBaseAddressRefaddr07[8]; //!< DW1..16, Reference Frame Buffer Base Address (RefAddr[0-7]) 1990 MEMORYADDRESSATTRIBUTES_CMD ReferenceFrameBufferBaseAddressAttributes; //!< DW17, Reference Frame Buffer Base Address Attributes 1991 SPLITBASEADDRESS4KBYTEALIGNED_CMD DecodedOutputFrameBufferAddress; //!< DW18..19, Decoded Output Frame Buffer Address 1992 MEMORYADDRESSATTRIBUTES_CMD DecodedOutputFrameBufferAddressAttributes; //!< DW20, Decoded Output Frame Buffer Address Attributes 1993 SPLITBASEADDRESS4KBYTEALIGNED_CMD FilmGrainInjectedOutputFrameBufferAddress; //!< DW21..22, Film Grain Injected Output Frame Buffer Address 1994 MEMORYADDRESSATTRIBUTES_CMD FilmGrainInjectedOutputFrameBufferAddressAttributes; //!< DW23, Film Grain Injected Output Frame Buffer Address Attributes 1995 SPLITBASEADDRESS4KBYTEALIGNED_CMD IntrabcDecodedOutputFrameBufferAddress; //!< DW24..25, IntraBC Decoded Output Frame Buffer Address 1996 MEMORYADDRESSATTRIBUTES_CMD IntrabcDecodedOutputFrameBufferAddressAttributes; //!< DW26, IntraBC Decoded Output Frame Buffer Address Attributes 1997 SPLITBASEADDRESS64BYTEALIGNED_CMD CdfTablesInitializationBufferAddress; //!< DW27..28, CDF Tables Initialization Buffer Address 1998 MEMORYADDRESSATTRIBUTES_CMD CdfTablesInitializationBufferAddressAttributes; //!< DW29, CDF Tables Initialization Buffer Address Attributes 1999 SPLITBASEADDRESS64BYTEALIGNED_CMD CdfTablesBackwardAdaptationBufferAddress; //!< DW30..31, CDF Tables Backward Adaptation Buffer Address 2000 MEMORYADDRESSATTRIBUTES_CMD CdfTablesBackwardAdaptationBufferAddressAttributes; //!< DW32, CDF Tables Backward Adaptation Buffer Address Attributes 2001 SPLITBASEADDRESS64BYTEALIGNED_CMD Av1SegmentIdReadBufferAddress; //!< DW33..34, AV1 Segment ID Read Buffer Address 2002 MEMORYADDRESSATTRIBUTES_CMD Av1SegmentIdReadBufferAddressAttributes; //!< DW35, AV1 Segment ID Read Buffer Address Attributes 2003 SPLITBASEADDRESS64BYTEALIGNED_CMD Av1SegmentIdWriteBufferAddress; //!< DW36..37, AV1 Segment ID Write Buffer Address 2004 MEMORYADDRESSATTRIBUTES_CMD Av1SegmentIdWriteBufferAddressAttributes; //!< DW38, AV1 Segment ID Write Buffer Address Attributes 2005 SPLITBASEADDRESS64BYTEALIGNED_CMD CollocatedMotionVectorTemporalBufferBaseAddressTmvaddr07[8]; //!< DW39..54, Collocated Motion Vector Temporal Buffer Base Address (TmvAddr[0-7]) 2006 MEMORYADDRESSATTRIBUTES_CMD CollocatedMotionVectorTemporalBufferBaseAddressAttributes; //!< DW55, Collocated Motion Vector Temporal Buffer Base Address Attributes 2007 SPLITBASEADDRESS64BYTEALIGNED_CMD CurrentFrameMotionVectorWriteBufferAddress; //!< DW56..57, Current Frame Motion Vector Write Buffer Address 2008 MEMORYADDRESSATTRIBUTES_CMD CurrentFrameMotionVectorWriteBufferAddressAttributes; //!< DW58, Current Frame Motion Vector Write Buffer Address Attributes 2009 SPLITBASEADDRESS64BYTEALIGNED_CMD FilmGrainSampleTemplateAddress; //!< DW59..60, Film Grain Sample Template Address 2010 MEMORYADDRESSATTRIBUTES_CMD FilmGrainSampleTemplateAddressAttributes; //!< DW61, Film Grain Sample Template Address Attributes 2011 SPLITBASEADDRESS64BYTEALIGNED_CMD BitstreamDecoderEncoderLineRowstoreReadWriteBufferAddress; //!< DW62..63, Bitstream Decoder/Encoder Line Rowstore Read/Write Buffer Address 2012 MEMORYADDRESSATTRIBUTES_CMD BitstreamDecoderEncoderLineRowstoreReadWriteBufferAddressAttributes; //!< DW64, Bitstream Decoder/Encoder Line Rowstore Read/Write Buffer Address Attributes 2013 SPLITBASEADDRESS64BYTEALIGNED_CMD BitstreamDecoderEncoderTileLineRowstoreReadWriteBufferAddress; //!< DW65..66, Bitstream Decoder/Encoder Tile Line Rowstore Read/Write Buffer Address 2014 MEMORYADDRESSATTRIBUTES_CMD BitstreamDecoderEncoderTileLineRowstoreReadWriteBufferAddressAttributes; //!< DW67, Bitstream Decoder/Encoder Tile Line Rowstore Read/Write Buffer Address Attributes 2015 SPLITBASEADDRESS64BYTEALIGNED_CMD IntraPredictionLineRowstoreReadWriteBufferAddress; //!< DW68..69, Intra Prediction Line Rowstore Read/Write Buffer Address 2016 MEMORYADDRESSATTRIBUTES_CMD IntraPredictionLineRowstoreReadWriteBufferAddressAttributes; //!< DW70, Intra Prediction Line Rowstore Read/Write Buffer Address Attributes 2017 SPLITBASEADDRESS64BYTEALIGNED_CMD IntraPredictionTileLineRowstoreReadWriteBufferAddress; //!< DW71..72, Intra Prediction Tile Line Rowstore Read/Write Buffer Address 2018 MEMORYADDRESSATTRIBUTES_CMD IntraPredictionTileLineRowstoreReadWriteBufferAddressAttributes; //!< DW73, Intra Prediction Tile Line Rowstore Read/Write Buffer Address Attributes 2019 SPLITBASEADDRESS64BYTEALIGNED_CMD SpatialMotionVectorLineReadWriteBufferAddress; //!< DW74..75, Spatial Motion Vector Line Read/Write Buffer Address 2020 MEMORYADDRESSATTRIBUTES_CMD SpatialMotionVectorLineReadWriteBufferAddressAttributes; //!< DW76, Spatial Motion Vector Line Read/Write Buffer Address Attributes 2021 SPLITBASEADDRESS64BYTEALIGNED_CMD SpatialMotionVectorCodingTileLineReadWriteBufferAddress; //!< DW77..78, Spatial Motion Vector Coding Tile Line Read/Write Buffer Address 2022 MEMORYADDRESSATTRIBUTES_CMD SpatialMotionVectorTileLineReadWriteBufferAddressAttributes; //!< DW79, Spatial Motion Vector Tile Line Read/Write Buffer Address Attributes 2023 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationMetaTileColumnReadWriteBufferAddress; //!< DW80..81, Loop Restoration Meta Tile Column Read/Write Buffer Address 2024 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationMetaTileColumnReadWriteBufferAddressAttributes; //!< DW82, Loop Restoration Meta Tile Column Read/Write Buffer Address Attributes 2025 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileReadWriteLineYBufferAddress; //!< DW83..84, Loop Restoration Filter Tile Read/Write Line Y Buffer Address 2026 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileReadWriteLineYBufferAddressAttributes; //!< DW85, Loop Restoration Filter Tile Read/Write Line Y Buffer Address Attributes 2027 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileReadWriteLineUBufferAddress; //!< DW86..87, Loop Restoration Filter Tile Read/Write Line U Buffer Address 2028 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileReadWriteLineUBufferAddressAttributes; //!< DW88, Loop Restoration Filter Tile Read/Write Line U Buffer Address Attributes 2029 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileReadWriteLineVBufferAddress; //!< DW89..90, Loop Restoration Filter Tile Read/Write Line V Buffer Address 2030 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileReadWriteLineVBufferAddressAttributes; //!< DW91, BitField: Loop Restoration Filter Tile Read/Write Line V Buffer Address Attributes 2031 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterLineReadWriteYBufferAddress; //!< DW92..93, Deblocker Filter Line Read/Write Y Buffer Address 2032 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterLineReadWriteYBufferAddressAttributes; //!< DW94, Deblocker Filter Line Read/Write Y Buffer Address Attributes 2033 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterLineReadWriteUBufferAddress; //!< DW95..96, Deblocker Filter Line Read/Write U Buffer Address 2034 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterLineReadWriteUBufferAddressAttributes; //!< DW97, Deblocker Filter Line Read/Write U Buffer Address Attributes 2035 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterLineReadWriteVBufferAddress; //!< DW98..99, Deblocker Filter Line Read/Write V Buffer Address 2036 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterLineReadWriteVBufferAddressAttributes; //!< DW100, Deblocker Filter Line Read/Write V Buffer Address Attributes 2037 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileLineReadWriteYBufferAddress; //!< DW101..102, Deblocker Filter Tile Line Read/Write Y Buffer Address 2038 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileLineReadWriteYBufferAddressAttributes; //!< DW103, Deblocker Filter Tile Line Read/Write Y Buffer Address Attributes 2039 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileLineReadWriteVBufferAddress; //!< DW104..105, Deblocker Filter Tile Line Read/Write V Buffer Address 2040 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileLineReadWriteVBufferAddressAttributes; //!< DW106, Deblocker Filter Tile Line Read/Write V Buffer Address Attributes 2041 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileLineReadWriteUBufferAddress; //!< DW107..108, Deblocker Filter Tile Line Read/Write U Buffer Address 2042 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileLineReadWriteUBufferAddressAttributes; //!< DW109, Deblocker Filter Tile Line Read/Write U Buffer Address Attributes 2043 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileColumnReadWriteYBufferAddress; //!< DW110..111, Deblocker Filter Tile Column Read/Write Y Buffer Address 2044 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileColumnReadWriteYBufferAddressAttributes; //!< DW112, Deblocker Filter Tile Column Read/Write Y Buffer Address Attributes 2045 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileColumnReadWriteUBufferAddress; //!< DW113..114, Deblocker Filter Tile Column Read/Write U Buffer Address 2046 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileColumnReadWriteUBufferAddressAttributes; //!< DW115, Deblocker Filter Tile Column Read/Write U Buffer Address Attributes 2047 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileColumnReadWriteVBufferAddress; //!< DW116..117, Deblocker Filter Tile Column Read/Write V Buffer Address 2048 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileColumnReadWriteVBufferAddressAttributes; //!< DW118, Deblocker Filter Tile Column Read/Write V Buffer Address Attributes 2049 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterLineReadWriteBufferAddress; //!< DW119..120, CDEF Filter Line Read/Write Buffer Address 2050 MEMORYADDRESSATTRIBUTES_CMD CdefFilterLineReadWriteBufferAddressAttributes; //!< DW121, CDEF Filter Line Read/Write Buffer Address Attributes 2051 uint32_t Reserved3904[6]; //!< Reserved 2052 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterTileLineReadWriteBufferAddress; //!< DW128..129, CDEF Filter Tile Line Read/Write Buffer Address 2053 MEMORYADDRESSATTRIBUTES_CMD CdefFilterTileLineReadWriteBufferAddressAttributes; //!< DW130, CDEF Filter Tile Line Read/Write Buffer Address Attributes 2054 uint32_t Reserved4192[6]; //!< Reserved 2055 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterTileColumnReadWriteBufferAddress; //!< DW137..138, CDEF Filter Tile Column Read/Write Buffer Address 2056 MEMORYADDRESSATTRIBUTES_CMD CdefFilterTileColumnReadWriteBufferAddressAttributes; //!< DW139, CDEF Filter Tile Column Read/Write Buffer Address Attributes 2057 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterMetaTileLineReadWriteBufferAddress; //!< DW140..141, CDEF Filter Meta Tile Line Read/Write Buffer Address 2058 MEMORYADDRESSATTRIBUTES_CMD CdefFilterMetaTileLineReadWriteBufferAddressAttributes; //!< DW142, CDEF Filter Meta Tile Line Read/Write Buffer Address Attributes 2059 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterMetaTileColumnReadWriteBufferAddress; //!< DW143..144, CDEF Filter Meta Tile Column Read/Write Buffer Address 2060 MEMORYADDRESSATTRIBUTES_CMD CdefFilterMetaTileColumnReadWriteBufferAddressAttributes; //!< DW145, CDEF Filter Meta Tile Column Read/Write Buffer Address Attributes 2061 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterTopLeftCornerReadWriteBufferAddress; //!< DW146..147, CDEF Filter Top-Left Corner Read/Write Buffer Address 2062 MEMORYADDRESSATTRIBUTES_CMD CdefFilterTopLeftCornerReadWriteBufferAddressAttributes; //!< DW148, CDEF Filter Top-Left Corner Read/Write Buffer Address Attributes 2063 SPLITBASEADDRESS64BYTEALIGNED_CMD SuperResTileColumnReadWriteYBufferAddress; //!< DW149..150, Super-Res Tile Column Read/Write Y Buffer Address 2064 MEMORYADDRESSATTRIBUTES_CMD SuperResTileColumnReadWriteYBufferAddressAttributes; //!< DW151, Super-Res Tile Column Read/Write Y Buffer Address Attributes 2065 SPLITBASEADDRESS64BYTEALIGNED_CMD SuperResTileColumnReadWriteUBufferAddress; //!< DW152..153, Super-Res Tile Column Read/Write U Buffer Address 2066 MEMORYADDRESSATTRIBUTES_CMD SuperResTileColumnReadWriteUBufferAddressAttributes; //!< DW154, Super-Res Tile Column Read/Write U Buffer Address Attributes 2067 SPLITBASEADDRESS64BYTEALIGNED_CMD SuperResTileColumnReadWriteVBufferAddress; //!< DW155..156, Super-Res Tile Column Read/Write V Buffer Address 2068 MEMORYADDRESSATTRIBUTES_CMD SuperResTileColumnReadWriteVBufferAddressAttributes; //!< DW157, Super-Res Tile Column Read/Write V Buffer Address Attributes 2069 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileColumnReadWriteYBufferAddress; //!< DW158..159, Loop Restoration Filter Tile Column Read/Write Y Buffer Address 2070 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileColumnReadWriteYBufferAddressAttributes; //!< DW160, Loop Restoration Filter Tile Column Read/Write Y Buffer Address Attributes 2071 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileColumnReadWriteUBufferAddress; //!< DW161..162, Loop Restoration Filter Tile Column Read/Write U Buffer Address 2072 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileColumnReadWriteUBufferAddressAttributes; //!< DW163, Loop Restoration Filter Tile Column Read/Write U Buffer Address Attributes 2073 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileColumnReadWriteVBufferAddress; //!< DW164..165, Loop Restoration Filter Tile Column Read/Write V Buffer Address 2074 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileColumnReadWriteVBufferAddressAttributes; //!< DW166, Loop Restoration Filter Tile Column Read/Write V Buffer Address Attributes 2075 uint32_t Reserved5344[3]; //!< Reserved 2076 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileColumnAlignmentReadWriteBufferAddress; //!< DW170..171, Loop Restoration Filter Tile Column Alignment Read/Write Buffer Address 2077 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileColumnAlignmentReadWriteBufferAddressAttributes;//!< DW172, Loop Restoration Filter Tile Column Alignment Read/Write Buffer Address Attributes 2078 SPLITBASEADDRESS64BYTEALIGNED_CMD FilmGrainTileColumnDataReadWriteBufferAddress; //!< DW173..174, Film Grain Tile Column Data Read/Write Buffer Address 2079 MEMORYADDRESSATTRIBUTES_CMD FilmGrainTileColumnDataReadWriteBufferAddressAttributes; //!< DW175, Film Grain Tile Column Data Read/Write Buffer Address Attributes 2080 SPLITBASEADDRESS64BYTEALIGNED_CMD DecodedFrameStatusErrorBufferBaseAddress; //!< DW176..177, Decoded Frame Status/Error Buffer Base Address 2081 MEMORYADDRESSATTRIBUTES_CMD DecodedFrameStatusErrorBufferBaseAddressAttributes; //!< DW178, Decoded Frame Status/Error Buffer Base Address Attributes 2082 SPLITBASEADDRESS64BYTEALIGNED_CMD DecodedBlockDataStreamoutBufferAddress; //!< DW179..180, Decoded Block Data Streamout Buffer Address 2083 MEMORYADDRESSATTRIBUTES_CMD DecodedBlockDataStreamoutBufferAddressAttributes; //!< DW181, Decoded Block Data Streamout Buffer Address Attributes 2084 uint32_t Reserved5824[3]; //!< Reserved 2085 uint32_t Reserved5920[3]; //!< Reserved 2086 SPLITBASEADDRESS64BYTEALIGNED_CMD OriginalUncompressedPictureSourceBufferAddress; //!< DW188..189, Original Uncompressed Picture Source Buffer Address 2087 MEMORYADDRESSATTRIBUTES_CMD OriginalUncompressedPictureSourceBufferAddressAttributes; //!< DW190, Original Uncompressed Picture Source Buffer Address Attributes 2088 SPLITBASEADDRESS64BYTEALIGNED_CMD DownscaledUncompressedPictureSourceBufferAddress; //!< DW191..192, Downscaled Uncompressed Picture Source Buffer Address 2089 MEMORYADDRESSATTRIBUTES_CMD DownscaledUncompressedPictureSourceBufferAddressAttributes; //!< DW193, Downscaled Uncompressed Picture Source Buffer Address Attributes 2090 SPLITBASEADDRESS64BYTEALIGNED_CMD TileSizeStreamoutBufferAddress; //!< DW194..195, Tile Size Streamout Buffer Address 2091 MEMORYADDRESSATTRIBUTES_CMD TileSizeStreamoutBufferAddressAttributes; //!< DW196, Tile Size Streamout Buffer Address Attributes 2092 SPLITBASEADDRESS64BYTEALIGNED_CMD TileStatisticsStreamoutBufferAddress; //!< DW197..198, Tile Statistics Streamout Buffer Address 2093 MEMORYADDRESSATTRIBUTES_CMD TileStatisticsStreamoutBufferAddressAttributes; //!< DW199, Tile Statistics Streamout Buffer Address Attributes 2094 SPLITBASEADDRESS64BYTEALIGNED_CMD CUStreamoutBufferAddress; //!< DW200..201, CU Streamout Buffer Address 2095 MEMORYADDRESSATTRIBUTES_CMD CUStreamoutBufferAddressAttributes; //!< DW202, CU Streamout Buffer Address Attributes 2096 SPLITBASEADDRESS64BYTEALIGNED_CMD SSELineReadWriteBufferAddress; //!< DW203..204, SSE Line Read/Write Buffer Address 2097 MEMORYADDRESSATTRIBUTES_CMD SSELineReadWriteBufferAddressAttributes; //!< DW205, SSE Line Read/Write Buffer Address Attributes 2098 SPLITBASEADDRESS64BYTEALIGNED_CMD SSETileLineReadWriteBufferAddress; //!< DW206..207, SSE Tile Line Read/Write Buffer Address 2099 MEMORYADDRESSATTRIBUTES_CMD SSETileLineReadWriteBufferAddressAttributes; //!< DW208, SSE Tile Line Read/Write Buffer Address Attributes 2100 SPLITBASEADDRESS64BYTEALIGNED_CMD PostCDEFpixelsBufferAddress; //!< DW209..210, PostCDEF pixels Buffer Address 2101 MEMORYADDRESSATTRIBUTES_CMD PostCDEFpixelsBufferAddressAttributes; //!< DW211, PostCDEF pixels Buffer Address Attributes 2102 2103 //! \name Local enumerations 2104 2105 enum MEDIA_INSTRUCTION_COMMAND 2106 { 2107 MEDIA_INSTRUCTION_COMMAND_AVPPIPEBUFADDRSTATE = 2, //!< No additional details 2108 }; 2109 2110 //! \brief MEDIA_INSTRUCTION_OPCODE 2111 //! \details 2112 //! Codec/Engine Name = AVP = 3h 2113 enum MEDIA_INSTRUCTION_OPCODE 2114 { 2115 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2116 }; 2117 2118 enum PIPELINE_TYPE 2119 { 2120 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2121 }; 2122 2123 enum COMMAND_TYPE 2124 { 2125 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2126 }; 2127 2128 //! \name Initializations 2129 2130 //! \brief Explicit member initialization function 2131 AVP_PIPE_BUF_ADDR_STATE_CMD(); 2132 2133 static const size_t dwSize = 212; 2134 static const size_t byteSize = 848; 2135 }; 2136 2137 //! 2138 //! \brief AVP_INLOOP_FILTER_STATE 2139 //! \details 2140 //! The AVP_INLOOP_FILTER_STATE command provides all the frame level syntax 2141 //! elements and derived parameters that are needed for the processing of 2142 //! all the post in-loop filters present in the AV1 codec, except the Luma 2143 //! and Chroma x0_qn which are tile based derived parameters. This includes 2144 //! the Deblocker, the CDEF (Constrained Directional Enhancement Filter), 2145 //! the HSRF (Horizontal-only Super-Resolution Filter), and the LRF (Loop 2146 //! Restoration Filter). These syntax elements can be changed in the 2147 //! bitstream from frame to frame. 2148 //! All Post In-Loop Filters are inherently frame-based filtering, but 2149 //! when implemented in a HW pipeline, the filtering process is performed in 2150 //! tile based and in a block by block fashion. In the addition to these 2151 //! frame and tile level states, there are additional syntax elements and 2152 //! derived parameters that are generated at SuperBlock level, and are not 2153 //! described here. 2154 //! Each of these 4 Post In-Loop Filters can be controlled independently 2155 //! and each can be enabled or disabled independently. Except the HSRF, all 2156 //! the other 3 filters have separate controls for each color plane as well. 2157 //! To disable a Post In-Loop Filter, its control parameter(s) are set to 0 2158 //! - the default state. 2159 //! This command should be issued once per tile, even if no post in-loop 2160 //! filter is enabled for decoding the current frame. When in frame lossless 2161 //! mode or when IntraBC is enabled, all the Post In-Loop Filters are 2162 //! disabled for all color planes, this command will provide the default 2163 //! values for all parameters. All syntax elements are then assumed a value 2164 //! of 0, except otherwise specified in each field of this State Command. 2165 //! When it is in monochrome video, no filter parameter for the two chroma 2166 //! planes is present in the bitstream. 2167 //! 2168 struct AVP_INLOOP_FILTER_STATE_CMD 2169 { 2170 union 2171 { 2172 struct 2173 { 2174 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 2175 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2176 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2177 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2178 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2179 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 2180 }; 2181 uint32_t Value; 2182 } DW0; 2183 union 2184 { 2185 struct 2186 { 2187 uint32_t LumaYDeblockerFilterLevelVertical : __CODEGEN_BITFIELD(0, 5); //!< Luma Y Deblocker Filter Level Vertical 2188 uint32_t LumaYDeblockerFilterLevelHorizontal : __CODEGEN_BITFIELD(6, 11); //!< Luma Y Deblocker Filter Level Horizontal 2189 uint32_t ChromaUDeblockerFilterLevel : __CODEGEN_BITFIELD(12, 17); //!< Chroma U Deblocker Filter Level 2190 uint32_t ChromaVDeblockerFilterLevel : __CODEGEN_BITFIELD(18, 23); //!< Chroma V Deblocker Filter Level 2191 uint32_t DeblockerFilterSharpnessLevel : __CODEGEN_BITFIELD(24, 26); //!< Deblocker Filter Sharpness Level 2192 uint32_t DeblockerFilterModeRefDeltaEnableFlag : __CODEGEN_BITFIELD(27, 27); //!< Deblocker Filter Mode Ref Delta Enable Flag 2193 uint32_t DeblockerDeltaLfResolution : __CODEGEN_BITFIELD(28, 29); //!< Deblocker Delta LF Resolution 2194 uint32_t DeblockerFilterDeltaLfMultiFlag : __CODEGEN_BITFIELD(30, 30); //!< Deblocker Filter Delta LF Multi Flag 2195 uint32_t DeblockerFilterDeltaLfPresentFlag : __CODEGEN_BITFIELD(31, 31); //!< Deblocker Filter Delta LF Present Flag 2196 }; 2197 uint32_t Value; 2198 } DW1; 2199 union 2200 { 2201 struct 2202 { 2203 uint32_t DeblockerFilterRefDeltas0 : __CODEGEN_BITFIELD(0, 6); //!< Deblocker Filter Ref Deltas[0] 2204 uint32_t Reserved71 : __CODEGEN_BITFIELD(7, 7); //!< Reserved 2205 uint32_t DeblockerFilterRefDeltas1 : __CODEGEN_BITFIELD(8, 14); //!< Deblocker Filter Ref Deltas[1] 2206 uint32_t Reserved79 : __CODEGEN_BITFIELD(15, 15); //!< Reserved 2207 uint32_t DeblockerFilterRefDeltas2 : __CODEGEN_BITFIELD(16, 22); //!< Deblocker Filter Ref Deltas[2] 2208 uint32_t Reserved87 : __CODEGEN_BITFIELD(23, 23); //!< Reserved 2209 uint32_t DeblockerFilterRefDeltas3 : __CODEGEN_BITFIELD(24, 30); //!< Deblocker Filter Ref Deltas[3] 2210 uint32_t Reserved95 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 2211 }; 2212 uint32_t Value; 2213 } DW2; 2214 union 2215 { 2216 struct 2217 { 2218 uint32_t DeblockerFilterRefDeltas4 : __CODEGEN_BITFIELD(0, 6); //!< Deblocker Filter Ref Deltas[4] 2219 uint32_t Reserved103 : __CODEGEN_BITFIELD(7, 7); //!< Reserved 2220 uint32_t DeblockerFilterRefDeltas5 : __CODEGEN_BITFIELD(8, 14); //!< Deblocker Filter Ref Deltas[5] 2221 uint32_t Reserved111 : __CODEGEN_BITFIELD(15, 15); //!< Reserved 2222 uint32_t DeblockerFilterRefDeltas6 : __CODEGEN_BITFIELD(16, 22); //!< Deblocker Filter Ref Deltas[6] 2223 uint32_t Reserved119 : __CODEGEN_BITFIELD(23, 23); //!< Reserved 2224 uint32_t DeblockerFilterRefDeltas7 : __CODEGEN_BITFIELD(24, 30); //!< Deblocker Filter Ref Deltas[7] 2225 uint32_t Reserved127 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 2226 }; 2227 uint32_t Value; 2228 } DW3; 2229 union 2230 { 2231 struct 2232 { 2233 uint32_t DeblockerFilterModeDeltas0 : __CODEGEN_BITFIELD(0, 6); //!< Deblocker Filter Mode Deltas[0] 2234 uint32_t Reserved135 : __CODEGEN_BITFIELD(7, 7); //!< Reserved 2235 uint32_t DeblockerFilterModeDeltas1 : __CODEGEN_BITFIELD(8, 14); //!< Deblocker Filter Mode Deltas[1] 2236 uint32_t Reserved143 : __CODEGEN_BITFIELD(15, 31); //!< Reserved 2237 }; 2238 uint32_t Value; 2239 } DW4; 2240 union 2241 { 2242 struct 2243 { 2244 uint32_t CdefYStrength0 : __CODEGEN_BITFIELD(0, 5); //!< CDEF Y Strength[0] 2245 uint32_t CdefYStrength1 : __CODEGEN_BITFIELD(6, 11); //!< CDEF Y Strength[1] 2246 uint32_t CdefYStrength2 : __CODEGEN_BITFIELD(12, 17); //!< CDEF Y Strength[2] 2247 uint32_t CdefYStrength3 : __CODEGEN_BITFIELD(18, 23); //!< CDEF Y Strength[3] 2248 uint32_t Reserved184 : __CODEGEN_BITFIELD(24, 27); //!< Reserved 2249 uint32_t CdefBits : __CODEGEN_BITFIELD(28, 29); //!< CDEF Bits 2250 uint32_t CdefFilterDampingFactorMinus3 : __CODEGEN_BITFIELD(30, 31); //!< CDEF Filter Damping Factor Minus3 2251 }; 2252 uint32_t Value; 2253 } DW5; 2254 union 2255 { 2256 struct 2257 { 2258 uint32_t CdefYStrength4 : __CODEGEN_BITFIELD(0, 5); //!< CDEF Y Strength[4] 2259 uint32_t CdefYStrength5 : __CODEGEN_BITFIELD(6, 11); //!< CDEF Y Strength[5] 2260 uint32_t CdefYStrength6 : __CODEGEN_BITFIELD(12, 17); //!< CDEF Y Strength[6] 2261 uint32_t CdefYStrength7 : __CODEGEN_BITFIELD(18, 23); //!< CDEF Y Strength[7] 2262 uint32_t Reserved216 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2263 }; 2264 uint32_t Value; 2265 } DW6; 2266 union 2267 { 2268 struct 2269 { 2270 uint32_t CdefUvStrength0 : __CODEGEN_BITFIELD(0, 5); //!< CDEF UV Strength[0] 2271 uint32_t CdefUvStrength1 : __CODEGEN_BITFIELD(6, 11); //!< CDEF UV Strength[1] 2272 uint32_t CdefUvStrength2 : __CODEGEN_BITFIELD(12, 17); //!< CDEF UV Strength[2] 2273 uint32_t CdefUvStrength3 : __CODEGEN_BITFIELD(18, 23); //!< CDEF UV Strength[3] 2274 uint32_t Reserved248 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2275 }; 2276 uint32_t Value; 2277 } DW7; 2278 union 2279 { 2280 struct 2281 { 2282 uint32_t CdefUvStrength4 : __CODEGEN_BITFIELD(0, 5); //!< CDEF UV Strength[4] 2283 uint32_t CdefUvStrength5 : __CODEGEN_BITFIELD(6, 11); //!< CDEF UV Strength[5] 2284 uint32_t CdefUvStrength6 : __CODEGEN_BITFIELD(12, 17); //!< CDEF UV Strength[6] 2285 uint32_t CdefUvStrength7 : __CODEGEN_BITFIELD(18, 23); //!< CDEF UV Strength[7] 2286 uint32_t Reserved280 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2287 }; 2288 uint32_t Value; 2289 } DW8; 2290 union 2291 { 2292 struct 2293 { 2294 uint32_t SuperResUpscaledFrameWidthMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Super-Res Upscaled Frame Width Minus1 2295 uint32_t SuperResDenom : __CODEGEN_BITFIELD(16, 20); //!< Super-Res Denom 2296 uint32_t Reserved309 : __CODEGEN_BITFIELD(21, 31); //!< Reserved 2297 }; 2298 uint32_t Value; 2299 } DW9; 2300 union 2301 { 2302 struct 2303 { 2304 uint32_t FrameLoopRestorationFilterTypeForLumaY : __CODEGEN_BITFIELD(0, 1); //!< Frame Loop Restoration Filter Type for Luma Y 2305 uint32_t FrameLoopRestorationFilterTypeForChromaU : __CODEGEN_BITFIELD(2, 3); //!< Frame Loop Restoration Filter Type for Chroma U 2306 uint32_t FrameLoopRestorationFilterTypeForChromaV : __CODEGEN_BITFIELD(4, 5); //!< Frame Loop Restoration Filter Type for Chroma V 2307 uint32_t Reserved326 : __CODEGEN_BITFIELD(6, 7); //!< Reserved 2308 uint32_t LoopRestorationUnitSizeForLumaY : __CODEGEN_BITFIELD(8, 9); //!< Loop Restoration Unit Size for Luma Y 2309 uint32_t UseSameLoopRestorationUnitSizeForChromasUvFlag : __CODEGEN_BITFIELD(10, 10); //!< Use Same Loop Restoration Unit Size for Chromas UV Flag 2310 uint32_t Reserved331 : __CODEGEN_BITFIELD(11, 31); //!< Reserved 2311 }; 2312 uint32_t Value; 2313 } DW10; 2314 union 2315 { 2316 struct 2317 { 2318 uint32_t LumaPlaneXStepQn : __CODEGEN_BITFIELD(0, 15); //!< Luma Plane x_step_qn 2319 uint32_t Reserved368 : __CODEGEN_BITFIELD(16, 31); //!< Reserved (for higher precision of x_step_qn) 2320 }; 2321 uint32_t Value; 2322 } DW11; 2323 union 2324 { 2325 struct 2326 { 2327 uint32_t LumaPlaneX0Qn; //!< Luma Plane x0_qn 2328 }; 2329 uint32_t Value; 2330 } DW12; 2331 union 2332 { 2333 struct 2334 { 2335 uint32_t ChromaPlaneXStepQn : __CODEGEN_BITFIELD(0, 15); //!< Chroma Plane x_step_qn 2336 uint32_t Reserved432 : __CODEGEN_BITFIELD(16, 31); //!< Reserved 2337 }; 2338 uint32_t Value; 2339 } DW13; 2340 union 2341 { 2342 struct 2343 { 2344 uint32_t ChromaPlaneX0Qn; //!< Chroma Plane x0_qn 2345 }; 2346 uint32_t Value; 2347 } DW14; 2348 2349 //! \name Local enumerations 2350 2351 enum MEDIA_INSTRUCTION_COMMAND 2352 { 2353 MEDIA_INSTRUCTION_COMMAND_AVPINLOOPFILTERSTATE = 51, //!< No additional details 2354 }; 2355 2356 //! \brief MEDIA_INSTRUCTION_OPCODE 2357 //! \details 2358 //! Codec/Engine Name = AV1 = 3h 2359 enum MEDIA_INSTRUCTION_OPCODE 2360 { 2361 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2362 }; 2363 2364 enum PIPELINE_TYPE 2365 { 2366 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2367 }; 2368 2369 enum COMMAND_TYPE 2370 { 2371 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2372 }; 2373 2374 //! \name Initializations 2375 2376 //! \brief Explicit member initialization function 2377 AVP_INLOOP_FILTER_STATE_CMD(); 2378 2379 static const size_t dwSize = 15; 2380 static const size_t byteSize = 60; 2381 }; 2382 2383 //! 2384 //! \brief AVP_INTER_PRED_STATE 2385 //! \details 2386 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 2387 //! all AVP Commands. Each AVP command has assigned a media instruction 2388 //! command as defined in DWord 0, BitField 22:16. 2389 //! AVP supports a 8-reference frames display buffer. But at any given 2390 //! frame being decoded, only up to 7reference frames out of the 8 can be 2391 //! active. There are also further constraints on which of these 7frames can 2392 //! be used for forward and backward reference in the compound mode. 2393 //! To simplify the decoder command sequence programming, this command is 2394 //! issued once for each inter-coded tile as well as for each intra-coded 2395 //! tile (such as in a KEY_FRAME, a DELAY_KEY_FRAME, an INTRA_ONLY_FRAME). 2396 //! 2397 struct AVP_INTER_PRED_STATE_CMD 2398 { 2399 union 2400 { 2401 struct 2402 { 2403 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 2404 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2405 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2406 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2407 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2408 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 2409 }; 2410 uint32_t Value; 2411 } DW0; 2412 union 2413 { 2414 struct 2415 { 2416 uint32_t SavedOrderHintsForAllReferences00 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[0][0] 2417 uint32_t SavedOrderHintsForAllReferences01 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[0][1] 2418 uint32_t SavedOrderHintsForAllReferences02 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[0][2] 2419 uint32_t SavedOrderHintsForAllReferences03 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[0][3] 2420 }; 2421 uint32_t Value; 2422 } DW1; 2423 union 2424 { 2425 struct 2426 { 2427 uint32_t SavedOrderHintsForAllReferences04 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[0][4] 2428 uint32_t SavedOrderHintsForAllReferences05 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[0][5] 2429 uint32_t SavedOrderHintsForAllReferences06 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[0][6] 2430 uint32_t ActiveReferenceBitmaskForMotionFieldProjection : __CODEGEN_BITFIELD(24, 31); //!< Active Reference Bitmask for Motion Field Projection 2431 }; 2432 uint32_t Value; 2433 } DW2; 2434 union 2435 { 2436 struct 2437 { 2438 uint32_t SavedOrderHintsForAllReferences10 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[1][0] 2439 uint32_t SavedOrderHintsForAllReferences11 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[1][1] 2440 uint32_t SavedOrderHintsForAllReferences12 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[1][2] 2441 uint32_t SavedOrderHintsForAllReferences13 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[1][3] 2442 }; 2443 uint32_t Value; 2444 } DW3; 2445 union 2446 { 2447 struct 2448 { 2449 uint32_t SavedOrderHintsForAllReferences14 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[1][4] 2450 uint32_t SavedOrderHintsForAllReferences15 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[1][5] 2451 uint32_t SavedOrderHintsForAllReferences16 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[1][6] 2452 uint32_t Reserved152 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2453 }; 2454 uint32_t Value; 2455 } DW4; 2456 union 2457 { 2458 struct 2459 { 2460 uint32_t SavedOrderHintsForAllReferences20 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[2][0] 2461 uint32_t SavedOrderHintsForAllReferences21 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[2][1] 2462 uint32_t SavedOrderHintsForAllReferences22 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[2][2] 2463 uint32_t SavedOrderHintsForAllReferences23 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[2][3] 2464 }; 2465 uint32_t Value; 2466 } DW5; 2467 union 2468 { 2469 struct 2470 { 2471 uint32_t SavedOrderHintsForAllReferences24 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[2][4] 2472 uint32_t SavedOrderHintsForAllReferences25 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[2][5] 2473 uint32_t SavedOrderHintsForAllReferences26 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[2][6] 2474 uint32_t Reserved216 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2475 }; 2476 uint32_t Value; 2477 } DW6; 2478 union 2479 { 2480 struct 2481 { 2482 uint32_t SavedOrderHintsForAllReferences30 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[3][0] 2483 uint32_t SavedOrderHintsForAllReferences31 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[3][1] 2484 uint32_t SavedOrderHintsForAllReferences32 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[3][2] 2485 uint32_t SavedOrderHintsForAllReferences33 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[3][3] 2486 }; 2487 uint32_t Value; 2488 } DW7; 2489 union 2490 { 2491 struct 2492 { 2493 uint32_t SavedOrderHintsForAllReferences34 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[3][4] 2494 uint32_t SavedOrderHintsForAllReferences35 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[3][5] 2495 uint32_t SavedOrderHintsForAllReferences36 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[3][6] 2496 uint32_t Reserved280 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2497 }; 2498 uint32_t Value; 2499 } DW8; 2500 union 2501 { 2502 struct 2503 { 2504 uint32_t SavedOrderHintsForAllReferences40 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[4][0] 2505 uint32_t SavedOrderHintsForAllReferences41 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[4][1] 2506 uint32_t SavedOrderHintsForAllReferences42 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[4][2] 2507 uint32_t SavedOrderHintsForAllReferences43 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[4][3] 2508 }; 2509 uint32_t Value; 2510 } DW9; 2511 union 2512 { 2513 struct 2514 { 2515 uint32_t SavedOrderHintsForAllReferences44 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[4][4] 2516 uint32_t SavedOrderHintsForAllReferences45 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[4][5] 2517 uint32_t SavedOrderHintsForAllReferences46 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[4][6] 2518 uint32_t Reserved344 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2519 }; 2520 uint32_t Value; 2521 } DW10; 2522 union 2523 { 2524 struct 2525 { 2526 uint32_t SavedOrderHintsForAllReferences50 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[5][0] 2527 uint32_t SavedOrderHintsForAllReferences51 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[5][1] 2528 uint32_t SavedOrderHintsForAllReferences52 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[5][2] 2529 uint32_t SavedOrderHintsForAllReferences53 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[5][3] 2530 }; 2531 uint32_t Value; 2532 } DW11; 2533 union 2534 { 2535 struct 2536 { 2537 uint32_t SavedOrderHintsForAllReferences54 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[5][4] 2538 uint32_t SavedOrderHintsForAllReferences55 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[5][5] 2539 uint32_t SavedOrderHintsForAllReferences56 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[5][6] 2540 uint32_t Reserved408 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2541 }; 2542 uint32_t Value; 2543 } DW12; 2544 union 2545 { 2546 struct 2547 { 2548 uint32_t SavedOrderHintsForAllReferences60 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[6][0] 2549 uint32_t SavedOrderHintsForAllReferences61 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[6][1] 2550 uint32_t SavedOrderHintsForAllReferences62 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[6][2] 2551 uint32_t SavedOrderHintsForAllReferences63 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[6][3] 2552 }; 2553 uint32_t Value; 2554 } DW13; 2555 union 2556 { 2557 struct 2558 { 2559 uint32_t SavedOrderHintsForAllReferences64 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[6][4] 2560 uint32_t SavedOrderHintsForAllReferences65 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[6][5] 2561 uint32_t SavedOrderHintsForAllReferences66 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[6][6] 2562 uint32_t Reserved472 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2563 }; 2564 uint32_t Value; 2565 } DW14; 2566 2567 //! \name Local enumerations 2568 2569 enum MEDIA_INSTRUCTION_COMMAND 2570 { 2571 MEDIA_INSTRUCTION_COMMAND_AVPINTERPREDSTATE = 18, //!< No additional details 2572 }; 2573 2574 //! \brief MEDIA_INSTRUCTION_OPCODE 2575 //! \details 2576 //! Codec/Engine Name = AVP = 3h 2577 enum MEDIA_INSTRUCTION_OPCODE 2578 { 2579 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2580 }; 2581 2582 enum PIPELINE_TYPE 2583 { 2584 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2585 }; 2586 2587 enum COMMAND_TYPE 2588 { 2589 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2590 }; 2591 2592 //! \name Initializations 2593 2594 //! \brief Explicit member initialization function 2595 AVP_INTER_PRED_STATE_CMD(); 2596 2597 static const size_t dwSize = 15; 2598 static const size_t byteSize = 60; 2599 }; 2600 2601 //! 2602 //! \brief AVP_PAK_INSERT_OBJECT 2603 //! \details 2604 //! It is an encoder only command, operating at bitstream level, before and 2605 //! after SliceData compressed bitstream. It is setup by the header and tail 2606 //! present flags in the Slice State command. If these flags are set and no 2607 //! subsequent PAK_INSERT_OBJECT commands are issued, the pipeline will 2608 //! hang. 2609 //! 2610 //! The AVP_ PAK_ INSERT _OBJECT command supports both inline and indirect 2611 //! data payload, but only one can be active at any time. It is issued to 2612 //! insert a chunk of bits (payload) into the current compressed bitstream 2613 //! output buffer (specified in the HCP_PAK-BSE Object Base Address field of 2614 //! the HCP_IND_OBJ_BASE_ADDR_STATE command) starting at its current write 2615 //! pointer bit position. Hardware will keep track of this write pointer's 2616 //! byte position and the associated next bit insertion position index. 2617 //! 2618 //! It is a variable length command when the payload (data to be inserted) 2619 //! is presented as inline data within the command itself. The inline 2620 //! payload is a multiple of 32-bit (1 DW), as the data bus to the 2621 //! compressed bitstream output buffer is 32-bit wide. 2622 //! 2623 //! The payload data is required to be byte aligned on the left (first 2624 //! transmitted bit order) and may or may not be byte aligned on the right 2625 //! (last transmitted bits). The command will specify the bit offset of the 2626 //! last valid DW. Note that : Stitch Command is used if the beginning 2627 //! position of data is in bit position. When PAK Insert Command is used the 2628 //! beginning position must be in byte position. 2629 //! 2630 //! Multiple insertion commands can be issued back to back in a series. It 2631 //! is host software's responsibility to make sure their corresponding data 2632 //! will properly stitch together to form a valid bitstream. 2633 //! 2634 //! Internally, HCP hardware will keep track of the very last two bytes' 2635 //! (the very last byte can be a partial byte) values of the previous 2636 //! insertion. It is required that the next Insertion Object Command or the 2637 //! next PAK Object Command to perform the start code emulation sequence 2638 //! check and prevention 0x03 byte insertion with this end condition of the 2639 //! previous insertion. 2640 //! 2641 //! The payload data may have already been processed for start code 2642 //! emulation byte insertion, except the possibility of the last 2 bytes 2643 //! plus the very last partial byte (if any). Hence, when hardware 2644 //! performing the concatenation of multiple consecutive insertion commands, 2645 //! or concatenation of an insertion command and a PAK object command, it 2646 //! must check and perform the necessary start code emulation byte insert at 2647 //! the junction. 2648 //! 2649 //! Data to be inserted can be a valid NAL units or a partial NAL unit. It 2650 //! can be any encoded syntax elements bit data before the encoded Slice 2651 //! Data (PAK Object Command) of the current Slice - SPS NAL, PPS NAL, SEI 2652 //! NAL and Other Non-Slice NAL, Leading_Zero_8_bits (as many bytes as there 2653 //! is), Start Code , Slice Header. Any encoded syntax elements bit data 2654 //! after the encoded Slice Data (PAK Object Command) of the current Slice 2655 //! and prior to the next encoded Slice Data of the next Slice or prior to 2656 //! the end of the bitstream, whichever comes first Cabac_Zero_Word or 2657 //! Trailing_Zero_8bits (as many bytes as there is). 2658 //! 2659 //! Certain NAL unit has a minimum byte size requirement. As such the 2660 //! hardware will optionally (enabled by SLICE STATE Command) determines the 2661 //! number of CABAC_ZERO_WORD to be inserted to the end of the current NAL, 2662 //! based on the minimum byte size of a NAL and the actual bin count of the 2663 //! encoded Slice. Since prior to the CABAC_ZERO_WORD insertion, the RBSP or 2664 //! EBSP is already byte-aligned, so each CABAC_ZERO_WORD insertion is 2665 //! actually a 3-byte sequence 0x00 00 03. 2666 //! 2667 //! Context switch interrupt is not supported by this command. 2668 //! 2669 struct AVP_PAK_INSERT_OBJECT_CMD 2670 { 2671 union 2672 { 2673 struct 2674 { 2675 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< Dword Length 2676 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2677 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2678 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2679 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2680 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 2681 }; 2682 uint32_t Value; 2683 } DW0; 2684 union 2685 { 2686 struct 2687 { 2688 uint32_t Reserved0 : __CODEGEN_BITFIELD(0, 0); //!< Reserved 2689 uint32_t EndofsliceflagLastdstdatainsertcommandflag : __CODEGEN_BITFIELD(1, 1); //!< EndOfSliceFlag - LastDstDataInsertCommandFlag 2690 uint32_t LastheaderflagLastsrcheaderdatainsertcommandflag : __CODEGEN_BITFIELD(2, 2); //!< LastHeaderFlag - LastSrcHeaderDataInsertCommandFlag 2691 uint32_t Reserved3 : __CODEGEN_BITFIELD(3, 7); //!< EMULATIONFLAG_EMULATIONBYTEBITSINSERTENABLE 2692 uint32_t DatabitsinlastdwSrcdataendingbitinclusion50 : __CODEGEN_BITFIELD(8, 13); //!< DataBitsInLastDW - SrCDataEndingBitInclusion[5:0] 2693 uint32_t Reserved14 : __CODEGEN_BITFIELD(14, 15); //!< Slice Header Indicator 2694 uint32_t DatabyteoffsetSrcdatastartingbyteoffset10 : __CODEGEN_BITFIELD(16, 17); //!< DataByteOffset - SrcDataStartingByteOffset[1:0] 2695 uint32_t Reserved50 : __CODEGEN_BITFIELD(18, 30); //!< Reserved 2696 uint32_t IndirectPayloadEnable : __CODEGEN_BITFIELD(31, 31); //!< INDIRECT_PAYLOAD_ENABLE 2697 }; 2698 uint32_t Value; 2699 } DW1; 2700 2701 //! \name Local enumerations 2702 2703 enum MEDIA_INSTRUCTION_COMMAND 2704 { 2705 MEDIA_INSTRUCTION_COMMAND_AVPPAKINSERTOBJECT = 34, //!< No additional details 2706 }; 2707 2708 //! \brief MEDIA_INSTRUCTION_OPCODE 2709 //! \details 2710 //! Codec/Engine Name = HCP = 3h 2711 enum MEDIA_INSTRUCTION_OPCODE 2712 { 2713 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2714 }; 2715 2716 enum PIPELINE_TYPE 2717 { 2718 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2719 }; 2720 2721 enum COMMAND_TYPE 2722 { 2723 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2724 }; 2725 2726 //! \brief INDIRECT_PAYLOAD_ENABLE 2727 //! \details 2728 //! <p>Only one of these two payload modes can be active at any time.</p> 2729 //! <p>When Slice Size Conformance is enable the Payload(header) must be 2730 //! inline only so this bit set to MBZ.</p> 2731 enum INDIRECT_PAYLOAD_ENABLE 2732 { 2733 INDIRECT_PAYLOAD_ENABLE_INLINEPAYLOADISUSED = 0, //!< No additional details 2734 INDIRECT_PAYLOAD_ENABLE_INDIRECTPAYLOADISUSED = 1, //!< No additional details 2735 }; 2736 2737 //! \name Initializations 2738 2739 //! \brief Explicit member initialization function 2740 AVP_PAK_INSERT_OBJECT_CMD(); 2741 2742 static const size_t dwSize = 2; 2743 static const size_t byteSize = 8; 2744 }; 2745 2746 //! 2747 //! \brief AVP_FILM_GRAIN_STATE 2748 //! \details 2749 //! This is a AV1 Decoder only command. 2750 //! Film Grain Synthesis on the decoder side is an out of loop processing. 2751 //! 2752 struct AVP_FILM_GRAIN_STATE_CMD 2753 { 2754 union 2755 { 2756 struct 2757 { 2758 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 2759 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2760 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2761 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2762 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2763 uint32_t Type : __CODEGEN_BITFIELD(29, 31); //!< TYPE 2764 }; 2765 uint32_t Value; 2766 } DW0; 2767 union 2768 { 2769 struct 2770 { 2771 uint32_t GrainRandomSeed : __CODEGEN_BITFIELD(0, 15); //!< Grain Random Seed 2772 uint32_t McIdentityFlag : __CODEGEN_BITFIELD(16, 16); //!< MC Identity Flag 2773 uint32_t ClipToRestrictedRangeFlag : __CODEGEN_BITFIELD(17, 17); //!< Clip To Restricted Range Flag 2774 uint32_t Reserved50 : __CODEGEN_BITFIELD(18, 19); //!< Reserved MBZ 2775 uint32_t NumberOfLumaPoints : __CODEGEN_BITFIELD(20, 23); //!< Number of Luma Points 2776 uint32_t NumberOfChromaCbPoints : __CODEGEN_BITFIELD(24, 27); //!< Number of Chroma Cb Points 2777 uint32_t NumberOfChromaCrPoints : __CODEGEN_BITFIELD(28, 31); //!< Number of Chroma Cr Points 2778 }; 2779 uint32_t Value; 2780 } DW1; 2781 union 2782 { 2783 struct 2784 { 2785 uint32_t GrainScalingMinus8 : __CODEGEN_BITFIELD(0, 1); //!< Grain Scaling Minus8 2786 uint32_t ArCoeffLag : __CODEGEN_BITFIELD(2, 3); //!< AR Coeff Lag 2787 uint32_t ArCoeffShiftMinus6 : __CODEGEN_BITFIELD(4, 5); //!< AR Coeff Shift Minus6 2788 uint32_t GrainScaleShift : __CODEGEN_BITFIELD(6, 7); //!< Grain Scale Shift 2789 uint32_t GrainNoiseOverlapFlag : __CODEGEN_BITFIELD(8, 8); //!< Grain Noise Overlap Flag 2790 uint32_t Reserved73 : __CODEGEN_BITFIELD(9, 30); //!< Reserved MBZ 2791 uint32_t ChromaScalingFromLumaFlag : __CODEGEN_BITFIELD(31, 31); //!< Chroma Scaling From Luma Flag 2792 }; 2793 uint32_t Value; 2794 } DW2; 2795 uint32_t PointLumaValueI0To13[4]; //!< Point Luma Value[i=0 to 13] 2796 uint32_t PointLumaScalingI0To13[4]; //!< Point Luma Scaling[i=0 to 13] 2797 uint32_t PointCbValueI0To9[3]; //!< Point CB Value[i=0 to 9] 2798 uint32_t PointCbScalingI0To9[3]; //!< Point CB Scaling[i=0 to 9] 2799 uint32_t PointCrValueI0To9[3]; //!< Point CR Value[i=0 to 9] 2800 uint32_t PointCrScalingI0To9[3]; //!< Point CR Scaling[i=0 to 9] 2801 uint32_t ArCoeffLumaPlus128I023[6]; //!< AR Coeff Luma Plus128[i=0.. 23] 2802 uint32_t ArCoeffChromaCbPlus128I024[7]; //!< AR Coeff Chroma CB Plus128[i=0.. 24] 2803 uint32_t ArCoeffChromaCrPlus128I024[7]; //!< AR Coeff Chroma CR Plus128[i=0.. 24] 2804 union 2805 { 2806 struct 2807 { 2808 uint32_t CbMult : __CODEGEN_BITFIELD(0, 7); //!< CB Mult 2809 uint32_t CbLumaMult : __CODEGEN_BITFIELD(8, 15); //!< CB Luma Mult 2810 uint32_t CbOffset : __CODEGEN_BITFIELD(16, 24); //!< CB Offset 2811 uint32_t Reserved1401 : __CODEGEN_BITFIELD(25, 31); //!< Reserved MBZ 2812 }; 2813 uint32_t Value; 2814 } DW43; 2815 union 2816 { 2817 struct 2818 { 2819 uint32_t CrMult : __CODEGEN_BITFIELD(0, 7); //!< CR Mult 2820 uint32_t CrLumaMult : __CODEGEN_BITFIELD(8, 15); //!< CR Luma Mult 2821 uint32_t CrOffset : __CODEGEN_BITFIELD(16, 24); //!< CR Offset 2822 uint32_t Reserved1433 : __CODEGEN_BITFIELD(25, 31); //!< Reserved MBZ 2823 }; 2824 uint32_t Value; 2825 } DW44; 2826 2827 //! \name Local enumerations 2828 2829 enum MEDIA_INSTRUCTION_COMMAND 2830 { 2831 MEDIA_INSTRUCTION_COMMAND_AVPFILMGRAINSTATE = 52, //!< No additional details 2832 }; 2833 2834 //! \brief MEDIA_INSTRUCTION_OPCODE 2835 //! \details 2836 //! Codec/Engine Name = AV1 = 3h 2837 enum MEDIA_INSTRUCTION_OPCODE 2838 { 2839 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2840 }; 2841 2842 enum PIPELINE_TYPE 2843 { 2844 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2845 }; 2846 2847 enum TYPE 2848 { 2849 TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2850 }; 2851 2852 //! \name Initializations 2853 2854 //! \brief Explicit member initialization function 2855 AVP_FILM_GRAIN_STATE_CMD(); 2856 2857 static const size_t dwSize = 45; 2858 static const size_t byteSize = 180; 2859 }; 2860 2861 //! 2862 //! \brief AVP_PAK_OBJECT 2863 //! \details 2864 //! 2865 //! 2866 struct AVP_PAK_OBJECT_CMD 2867 { 2868 union 2869 { 2870 struct 2871 { 2872 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 2873 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2874 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2875 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2876 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2877 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 2878 }; 2879 uint32_t Value; 2880 } DW0; 2881 union 2882 { 2883 struct 2884 { 2885 uint32_t CurrentSbXAddr : __CODEGEN_BITFIELD(0, 15); //!< Current SB X Addr 2886 uint32_t CurrentSbYAddr : __CODEGEN_BITFIELD(16, 31); //!< Current SB Y Addr 2887 }; 2888 uint32_t Value; 2889 } DW1; 2890 union 2891 { 2892 struct 2893 { 2894 uint32_t SseClassid32X320 : __CODEGEN_BITFIELD(0, 3); //!< SSE ClassID 32x32_0 2895 uint32_t SseClassid32X321 : __CODEGEN_BITFIELD(4, 7); //!< SSE ClassID 32x32_1 2896 uint32_t SseClassid32X322 : __CODEGEN_BITFIELD(8, 11); //!< SSE ClassID 32x32_2 2897 uint32_t SseClassid32X323 : __CODEGEN_BITFIELD(12, 15); //!< SSE ClassID 32x32_3 2898 uint32_t SbforcezerocoeffTimeBudgetOverflowOccurred : __CODEGEN_BITFIELD(16, 16); //!< SBForceZeroCoeff/Time Budget Overflow Occurred 2899 uint32_t Reserved81 : __CODEGEN_BITFIELD(17, 23); //!< Reserved 2900 uint32_t CuCountMinus1 : __CODEGEN_BITFIELD(24, 29); //!< CU count minus1 2901 uint32_t Reserved94 : __CODEGEN_BITFIELD(30, 30); //!< Reserved 2902 uint32_t Lastsboftile : __CODEGEN_BITFIELD(31, 31); //!< LastSBofTile 2903 }; 2904 uint32_t Value; 2905 } DW2; 2906 union 2907 { 2908 struct 2909 { 2910 uint32_t SuperblockLevelDeltaQp : __CODEGEN_BITFIELD(0, 10); //!< SuperBlock Level Delta QP 2911 uint32_t Reserved107 : __CODEGEN_BITFIELD(11, 31); //!< Reserved 2912 }; 2913 uint32_t Value; 2914 } DW3; 2915 union 2916 { 2917 struct 2918 { 2919 uint32_t SuperblockLevelLumaYDeblockerDeltaFilterLevelVertical : __CODEGEN_BITFIELD(0, 6); //!< SuperBlock Level Luma Y Deblocker Delta Filter Level Vertical 2920 uint32_t Reserved135 : __CODEGEN_BITFIELD(7, 7); //!< Reserved 2921 uint32_t SuperblockLevelLumaYDeblockerDeltaFilterLevelHorizontal : __CODEGEN_BITFIELD(8, 14); //!< SuperBlock Level Luma Y Deblocker Delta Filter Level Horizontal 2922 uint32_t Reserved143 : __CODEGEN_BITFIELD(15, 15); //!< Reserved 2923 uint32_t SuperblockLevelChromaUDeblockerDeltaFilterLevel : __CODEGEN_BITFIELD(16, 22); //!< SuperBlock Level Chroma U Deblocker Delta Filter Level 2924 uint32_t Reserved151 : __CODEGEN_BITFIELD(23, 23); //!< Reserved 2925 uint32_t SuperblockLevelChromaVDeblockerDeltaFilterLevel : __CODEGEN_BITFIELD(24, 30); //!< SuperBlock Level Chroma V Deblocker Delta Filter Level 2926 uint32_t Reserved159 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 2927 }; 2928 uint32_t Value; 2929 } DW4; 2930 2931 //! \name Local enumerations 2932 2933 enum MEDIA_INSTRUCTION_COMMAND 2934 { 2935 MEDIA_INSTRUCTION_COMMAND_AVPPAKOBJECT = 33, //!< No additional details 2936 }; 2937 2938 //! \brief MEDIA_INSTRUCTION_OPCODE 2939 //! \details 2940 //! Codec/Engine Name = AV1 = 3h 2941 enum MEDIA_INSTRUCTION_OPCODE 2942 { 2943 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2944 }; 2945 2946 enum PIPELINE_TYPE 2947 { 2948 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2949 }; 2950 2951 enum COMMAND_TYPE 2952 { 2953 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2954 }; 2955 2956 //! \name Initializations 2957 2958 //! \brief Explicit member initialization function 2959 AVP_PAK_OBJECT_CMD(); 2960 2961 static const size_t dwSize = 5; 2962 static const size_t byteSize = 20; 2963 }; 2964 2965 //! 2966 //! \brief AVP_VD_CONTROL_STATE 2967 //! \details 2968 //! For AVP, it is selected with the Media Instruction Opcode "3h". 2969 //! 2970 //! This command is used to modify the control of HCP pipe. It can be 2971 //! inserted anywhere within a frame. It can be inserted multiple times 2972 //! within a frame as well. 2973 //! 2974 //! This command is also used for AVP pipe. 2975 //! 2976 struct AVP_VD_CONTROL_STATE_CMD 2977 { 2978 union 2979 { 2980 struct 2981 { 2982 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 2983 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2984 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2985 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2986 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2987 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 2988 }; 2989 uint32_t Value; 2990 } DW0; 2991 VD_CONTROL_STATE_BODY_CMD VdControlStateBody; //!< DW1..2, VD Control State Body 2992 2993 //! \name Local enumerations 2994 2995 enum MEDIA_INSTRUCTION_COMMAND 2996 { 2997 MEDIA_INSTRUCTION_COMMAND_VDCONTROLSTATE = 10, //!< No additional details 2998 }; 2999 3000 //! \brief MEDIA_INSTRUCTION_OPCODE 3001 //! \details 3002 //! Codec/EngineName = AVP = 3h 3003 enum MEDIA_INSTRUCTION_OPCODE 3004 { 3005 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAMEFORAVP = 3, //!< No additional details 3006 }; 3007 3008 enum PIPELINE_TYPE 3009 { 3010 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 3011 }; 3012 3013 enum COMMAND_TYPE 3014 { 3015 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 3016 }; 3017 3018 //! \name Initializations 3019 3020 //! \brief Explicit member initialization function 3021 AVP_VD_CONTROL_STATE_CMD(); 3022 3023 static const size_t dwSize = 3; 3024 static const size_t byteSize = 12; 3025 }; 3026 3027 MEDIA_CLASS_DEFINE_END(mhw__vdbox__avp__xe_lpm_plus_base__v0__Cmd) 3028 }; 3029 } // namespace v0 3030 } // namespace xe_lpm_plus_base 3031 } // namespace avp 3032 } // namespace vdbox 3033 } // namespace mhw 3034 3035 #pragma pack() 3036 3037 #endif // __MHW_VDBOX_AVP_HWCMD_XE_LPM_PLUS_H__ 3038