1 /*===================== begin_copyright_notice ================================== 2 # Copyright (c) 2020-2024, Intel Corporation 3 # 4 # Permission is hereby granted, free of charge, to any person obtaining a 5 # copy of this software and associated documentation files (the "Software"), 6 # to deal in the Software without restriction, including without limitation 7 # the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 # and/or sell copies of the Software, and to permit persons to whom the 9 # Software is furnished to do so, subject to the following conditions: 10 # 11 # The above copyright notice and this permission notice shall be included 12 # in all copies or substantial portions of the Software. 13 # 14 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 # OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 # OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 # OTHER DEALINGS IN THE SOFTWARE. 21 22 ======================= end_copyright_notice ==================================*/ 23 //! 24 //! \file mhw_vdbox_avp_hwcmd_xe2_hpm.h 25 //! \brief Auto-generated constructors for MHW and states. 26 //! \details This file may not be included outside of Xe2_HPM as other components 27 //! should use MHW interface to interact with MHW commands and states. 28 //! 29 30 // DO NOT EDIT 31 32 #ifndef __MHW_VDBOX_AVP_HWCMD_XE2_HPM_H__ 33 #define __MHW_VDBOX_AVP_HWCMD_XE2_HPM_H__ 34 35 #pragma once 36 #pragma pack(1) 37 38 #include "mhw_hwcmd.h" 39 #include <cstdint> 40 #include <cstddef> 41 #include "media_class_trace.h" 42 43 #ifdef IGFX_AVP_INTERFACE_EXT_SUPPORT 44 #include "mhw_vdbox_avp_hwcmd_ext.h" 45 #endif 46 47 namespace mhw 48 { 49 namespace vdbox 50 { 51 namespace avp 52 { 53 namespace xe_lpm_plus_base 54 { 55 namespace v1 56 { 57 class Cmd 58 { 59 public: 60 virtual ~Cmd() = default; 61 GetOpLength(uint32_t uiLength)62 static uint32_t GetOpLength(uint32_t uiLength) { return __CODEGEN_OP_LENGTH(uiLength); } 63 64 //! 65 //! \brief MEMORYADDRESSATTRIBUTES 66 //! \details 67 //! This field controls the priority of arbitration used in the GAC/GAM 68 //! pipeline for this surface. It defines the attributes for VDBOX addresses 69 //! on BDW+. 70 //! 71 struct MEMORYADDRESSATTRIBUTES_CMD 72 { 73 union 74 { 75 struct 76 { 77 uint32_t Reserved0 : __CODEGEN_BITFIELD(0, 0); //!< Reserved 78 uint32_t BaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD(1, 6); //!< Base Address - Index to Memory Object Control State (MOCS) Tables 79 uint32_t BaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD(7, 8); //!< Base Address - Arbitration Priority Control 80 uint32_t BaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD(9, 9); //!< Base Address - Memory Compression Enable 81 uint32_t CompressionType : __CODEGEN_BITFIELD(10, 10); //!< COMPRESSION_TYPE 82 uint32_t Reserved11 : __CODEGEN_BITFIELD(11, 11); //!< Reserved 83 uint32_t BaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12); //!< BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 84 uint32_t TileMode : __CODEGEN_BITFIELD(13, 14); //!< TILEMODE 85 uint32_t MediaLevel2CachingEnable : __CODEGEN_BITFIELD(15, 15); //!< MEDIA_LEVEL_2_CACHING_ENABLE 86 uint32_t Reserved16 : __CODEGEN_BITFIELD(16, 31); //!< Reserved 87 }; 88 uint32_t Value; 89 } DW0; 90 91 //! \name Local enumerations 92 93 //! \brief COMPRESSION_TYPE 94 //! \details 95 //! Indicates if buffer is render/media compressed. 96 enum COMPRESSION_TYPE 97 { 98 COMPRESSION_TYPE_MEDIACOMPRESSIONENABLE = 0, //!< No additional details 99 COMPRESSION_TYPE_RENDERCOMPRESSIONENABLE = 1, //!< Only support rendered compression with unified memory 100 }; 101 102 //! \brief BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 103 //! \details 104 //! This field controls if the Row Store is going to store inside Media 105 //! Cache (rowstore cache) or to LLC. 106 enum BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 107 { 108 BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED0 = 0, //!< Buffer going to LLC. 109 BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_UNNAMED1 = 1, //!< Buffer going to Internal Media Storage. 110 }; 111 112 enum TILEMODE 113 { 114 TILEMODE_LINEAR = 0, //!< No additional details 115 TILEMODE_TILES_64K = 1, //!< No additional details 116 TILEMODE_TILEX = 2, //!< No additional details 117 TILEMODE_TILEF = 3, //!< No additional details 118 }; 119 120 enum MEDIA_LEVEL_2_CACHING_ENABLE 121 { 122 MEDIA_LEVEL_2_CACHING_ENABLE_DISABLEMEDIACACHE = 0, //!< No additional details 123 MEDIA_LEVEL_2_CACHING_ENABLE_ENABLEMEDIACACHE = 1, //!< No additional details 124 }; 125 126 //! \name Initializations 127 128 //! \brief Explicit member initialization function 129 MEMORYADDRESSATTRIBUTES_CMD(); 130 131 static const size_t dwSize = 1; 132 static const size_t byteSize = 4; 133 }; 134 135 //! 136 //! \brief SPLITBASEADDRESS4KBYTEALIGNED 137 //! \details 138 //! Specifies a 64-bit (48-bit canonical) 4K-byte aligned memory base 139 //! address. GraphicsAddress is a 64-bit value [63:0], but only a portion of 140 //! it is used by hardware. The upper reserved bits are ignored and MBZ. 141 //! 142 //! Bits 63:48 must be zero. 143 //! 144 struct SPLITBASEADDRESS4KBYTEALIGNED_CMD 145 { 146 union 147 { 148 struct 149 { 150 uint64_t Reserved64 : __CODEGEN_BITFIELD(0, 11); //!< Reserved 151 uint64_t BaseAddress : __CODEGEN_BITFIELD(12, 56); //!< Base Address 152 uint64_t Reserved121 : __CODEGEN_BITFIELD(57, 63); //!< Reserved 153 }; 154 uint32_t Value[2]; 155 } DW0_1; 156 157 //! \name Local enumerations 158 159 //! \name Initializations 160 161 //! \brief Explicit member initialization function 162 SPLITBASEADDRESS4KBYTEALIGNED_CMD(); 163 164 static const size_t dwSize = 2; 165 static const size_t byteSize = 8; 166 }; 167 168 //! 169 //! \brief SPLITBASEADDRESS64BYTEALIGNED 170 //! \details 171 //! Specifies a 64-bit (48-bit canonical) 64-byte aligned memory base 172 //! address. 173 //! 174 //! Bits 63:48 must be zero. 175 //! 176 struct SPLITBASEADDRESS64BYTEALIGNED_CMD 177 { 178 union 179 { 180 struct 181 { 182 uint64_t Reserved64 : __CODEGEN_BITFIELD(0, 5); //!< Reserved 183 uint64_t BaseAddress : __CODEGEN_BITFIELD(6, 56); //!< Base Address 184 uint64_t Reserved121 : __CODEGEN_BITFIELD(57, 63); //!< Reserved 185 }; 186 uint32_t Value[2]; 187 } DW0_1; 188 189 //! \name Local enumerations 190 191 //! \name Initializations 192 193 //! \brief Explicit member initialization function 194 SPLITBASEADDRESS64BYTEALIGNED_CMD(); 195 196 static const size_t dwSize = 2; 197 static const size_t byteSize = 8; 198 }; 199 200 //! 201 //! \brief VD_CONTROL_STATE_BODY 202 //! \details 203 //! 204 //! 205 struct VD_CONTROL_STATE_BODY_CMD 206 { 207 union 208 { 209 struct 210 { 211 uint32_t PipelineInitialization : __CODEGEN_BITFIELD(0, 0); //!< Pipeline Initialization 212 uint32_t VDboxPipelineArchitectureClockgateDisable : __CODEGEN_BITFIELD(1, 1); 213 uint32_t Reserved2 : __CODEGEN_BITFIELD(2, 27); //!< Reserved 214 uint32_t MfxDopClockgateControlWithEnableAsDefault : __CODEGEN_BITFIELD(28, 28); //!< MFX_DOP_CLOCKGATE_CONTROL_WITH_ENABLE_AS_DEFAULT 215 uint32_t HcpDopClockgateControlWithEnableAsDefault : __CODEGEN_BITFIELD(29, 29); //!< HCP_DOP_CLOCKGATE_CONTROL_WITH_ENABLE_AS_DEFAULT 216 uint32_t Reserved30 : __CODEGEN_BITFIELD(30, 31); //!< Reserved 217 }; 218 uint32_t Value; 219 } DW0; 220 union 221 { 222 struct 223 { 224 uint32_t ScalableModePipeLock : __CODEGEN_BITFIELD(0, 0); //!< Scalable Mode Pipe Lock 225 uint32_t ScalableModePipeUnlock : __CODEGEN_BITFIELD(1, 1); //!< Scalable Mode Pipe Unlock 226 uint32_t MemoryImplicitFlush : __CODEGEN_BITFIELD(2, 2); //!< Memory Implicit Flush 227 uint32_t Reserved35 : __CODEGEN_BITFIELD(3, 31); //!< Reserved 228 }; 229 uint32_t Value; 230 } DW1; 231 232 //! \name Local enumerations 233 234 //! \name Initializations 235 236 //! \brief Explicit member initialization function 237 VD_CONTROL_STATE_BODY_CMD(); 238 239 static const size_t dwSize = 2; 240 static const size_t byteSize = 8; 241 }; 242 243 //! 244 //! \brief AVP_BSD_OBJECT 245 //! \details 246 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 247 //! all AVP Commands. Each AVP command has assigned a media instruction 248 //! command as defined in DWord 0, BitField 22:16. 249 //! 250 //! style="margin:0in 0in 7.5pt"> The AVP_BSD_OBJECT command sends to 251 //! HW a tile at a time from an AV1 bitstream, starting with the first coded 252 //! byte of the tile, not including the prefixed tile byte size. The bit 253 //! stream of a tile, tile group, and of a frame may end with trailing bits 254 //! and extra padding zero bytes. The prefixed tile byte size includes all 255 //! the trailing bits and padding zero bytes at the end of a tile. 256 //! style="margin:0in 0in 7.5pt">Each tile's coded/compressed bitstream is 257 //! started and ended at a byte boundary. style="margin:0in 0in 7.5pt">HW 258 //! is not required to parse the trailing bits and padding zero bytes. HW 259 //! can stop processing right after it has completed the decoding of the 260 //! last block in the tile. Potentially, error checkng can be implemented to 261 //! detect the trailing bits and padding zeros, but is not implemented in 262 //! this generation of AVP Pipeline. style="margin:0in 0in 7.5pt"> 263 //! here can be multiple tiles in an AV1 frame and thus this command can be 264 //! issued multiple times per frame. A coded frame minumum has at least 1 265 //! tile definition, i.e a tile can cover the entire frame, unless the frame 266 //! size exceeds the max allowed tile size limits in pixels, then the frame 267 //! must contain more than 1 tile. There is no compressed 268 //! header in AV1, hence AVP_BSD_OBJECT command is only used to process the 269 //! bitstream of each individual tile of a frame. 270 //! style="margin:0in 0in 7.5pt; text-align:start; 271 //! -webkit-text-stroke-width:0px"> The AVP_BSD_OBJECT command 272 //! must be the last command issued in the sequence of batch commands before 273 //! the AVP Pipeline starts decoding. Prior to issuing this command, it is 274 //! assumed that all configuration parameters needed by the AVP Pipeline 275 //! have been loaded in a specific order,including workload configuration 276 //! registers and configuration tables. When this command is issued, the AVP 277 //! Pipeline is waiting for bitstream data to be presented to its bitstream 278 //! input shift register. 279 //! 280 struct AVP_BSD_OBJECT_CMD 281 { 282 union 283 { 284 struct 285 { 286 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 287 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 288 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 289 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 290 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 291 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 292 }; 293 uint32_t Value; 294 } DW0; 295 union 296 { 297 struct 298 { 299 uint32_t TileIndirectBsdDataLength; //!< Tile Indirect BSD Data Length 300 }; 301 uint32_t Value; 302 } DW1; 303 union 304 { 305 struct 306 { 307 uint32_t TileIndirectDataStartAddress; //!< Tile Indirect Data Start Address 308 }; 309 uint32_t Value; 310 } DW2; 311 312 //! \name Local enumerations 313 314 enum MEDIA_INSTRUCTION_COMMAND 315 { 316 MEDIA_INSTRUCTION_COMMAND_AVPBSDOBJECTSTATE = 32, //!< No additional details 317 }; 318 319 //! \brief MEDIA_INSTRUCTION_OPCODE 320 //! \details 321 //! Codec/Engine Name = AV1 = 3h 322 enum MEDIA_INSTRUCTION_OPCODE 323 { 324 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 325 }; 326 327 enum PIPELINE_TYPE 328 { 329 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 330 }; 331 332 enum COMMAND_TYPE 333 { 334 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 335 }; 336 337 //! \name Initializations 338 339 //! \brief Explicit member initialization function 340 AVP_BSD_OBJECT_CMD(); 341 342 static const size_t dwSize = 3; 343 static const size_t byteSize = 12; 344 }; 345 346 //! 347 //! \brief AVP_PIC_STATE 348 //! \details 349 //! All AVP_PIC_STATE should stay the same for the whole frame even if 350 //! AVP_PIC_STATE is re-programmed for every tiles. The bitfields of 351 //! AVP_PIC_STATE are defined either from 1) syntax elements of the 352 //! uncompressed sequence header (received from sequence_header_obu) and of 353 //! the uncompressed frame header (received from frame_header_obu), 2) or, 354 //! parameters derived from 1). Note : Bitstreams may contain several 355 //! copies of the frame header (there can only be one frame_header_obu, but 356 //! multiple redundant_frame_header_obu)interspersed with tile_group_obu to 357 //! allow for greater error resilience. However, the copies must contain 358 //! identical contents to the original frame_header_obu. Note : there 359 //! should be only one sequence_header_obu per video sequence. Note : AVP 360 //! pipeline is invoked to decode a frame from the bitstream, only if that 361 //! frame has show_existing_frame flag (syntax element in the frame header) 362 //! set to 0. For the case thatshow_existing_frame flag is set to 1, 363 //! application and driver process the frame instead, no block level 364 //! decoding is needed. Note : Unlike VP9, AV1 does not have a compressed 365 //! header. All the syntax elements defined in the AV1 sequence and frame 366 //! level headers are not arithmetic coded, hence application and driver can 367 //! directly read them off from the bitstream. If encryption is ON, then 368 //! only application can parse the sequence and frame headers. Note : the 369 //! values of the sequence header/level syntax elements and their derived 370 //! parameters are to last throughout all frames in the video sequence, 371 //! until the next Sequence Header OBU is received that may change them. But 372 //! some sequence header/level syntax elements or their derived parameters 373 //! may further qualified by frame header/level syntax elements and their 374 //! derived parameters, then these type of syntax elements and their derived 375 //! parameters can be changed frame to frame. Note : the values of the 376 //! frame header/level syntax elements and their derived parameters can be 377 //! changed from frame to frame. Note : there are some syntax elements and 378 //! their derived parameters can be changed only at KEY FRAME. Hence, the 379 //! values of these type of syntax elements and their derived parameters can 380 //! last for the entire GOP, i.e. until the next KEY FRAME that may change 381 //! them. Note : there is no separate profile for Still Picture. Still 382 //! Picture is coded and decoded as a KEY FRAME, with all coding tools 383 //! supported (tiling, all post in-loop filters, film grain injection, 384 //! monochrome, intraBC, palette prediction mode, etc.). There is no 385 //! restriction in coding Still Picture as a KEY FRAME. 386 //! 387 struct AVP_PIC_STATE_CMD 388 { 389 union 390 { 391 struct 392 { 393 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 394 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 395 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 396 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 397 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 398 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 399 }; 400 uint32_t Value; 401 } DW0; 402 union 403 { 404 struct 405 { 406 uint32_t FrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Frame Width In Pixel Minus 1 407 uint32_t FrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Frame Height In Pixel Minus 1 408 }; 409 uint32_t Value; 410 } DW1; 411 union 412 { 413 struct 414 { 415 uint32_t SequenceChromaSubsamplingFormat : __CODEGEN_BITFIELD(0, 1); //!< SEQUENCE_CHROMA_SUBSAMPLING_FORMAT 416 uint32_t Reserved66 : __CODEGEN_BITFIELD(2, 2); //!< Reserved (for expansion of Chroma SubSampling Format) 417 uint32_t SequencePixelBitDepthIdc : __CODEGEN_BITFIELD(3, 4); //!< Sequence Pixel Bit-Depth Idc 418 uint32_t Reserved69 : __CODEGEN_BITFIELD(5, 6); //!< Reserved (for expansion of Sequence Pixel Bit-Depth Idc) 419 uint32_t SequenceSuperblockSizeUsed : __CODEGEN_BITFIELD(7, 8); //!< Sequence Superblock Size Used 420 uint32_t SequenceEnableOrderHintFlag : __CODEGEN_BITFIELD(9, 9); //!< Sequence Enable Order Hint Flag 421 uint32_t SequenceOrderHintBitsMinus1 : __CODEGEN_BITFIELD(10, 12); //!< Sequence Order Hint Bits Minus1 422 uint32_t Reserved77 : __CODEGEN_BITFIELD(13, 15); //!< Reserved (for the expansion of Sequence Order Hint Bits Minus1) 423 uint32_t SequenceEnableFilterIntraFlag : __CODEGEN_BITFIELD(16, 16); //!< Sequence Enable Filter_Intra Flag 424 uint32_t SequenceEnableIntraEdgeFilterFlag : __CODEGEN_BITFIELD(17, 17); //!< Sequence Enable Intra Edge Filter Flag 425 uint32_t SequenceEnableDualFilterFlag : __CODEGEN_BITFIELD(18, 18); //!< Sequence Enable Dual_Filter Flag 426 uint32_t SequenceEnableInterIntraCompoundFlag : __CODEGEN_BITFIELD(19, 19); //!< Sequence Enable Inter-Intra Compound Flag 427 uint32_t SequenceEnableMaskedCompoundFlag : __CODEGEN_BITFIELD(20, 20); //!< Sequence Enable Masked Compound Flag 428 uint32_t SequenceEnableJointCompoundFlag : __CODEGEN_BITFIELD(21, 21); //!< Sequence Enable Joint Compound Flag 429 uint32_t TailPresentFlag : __CODEGEN_BITFIELD(22, 22); //!< Tail Present Flag 430 uint32_t HeaderPresentFlag : __CODEGEN_BITFIELD(23, 23); //!< Header Present Flag 431 uint32_t EnableBistreamStitchingInHardware : __CODEGEN_BITFIELD(24, 24); //!< Enable Bistream Stitching in hardware 432 uint32_t Reserved89 : __CODEGEN_BITFIELD(25, 31); //!< Reserved 433 }; 434 uint32_t Value; 435 } DW2; 436 union 437 { 438 struct 439 { 440 uint32_t AllowScreenContentToolsFlag : __CODEGEN_BITFIELD(0, 0); //!< Allow Screen Content Tools Flag 441 uint32_t ForceIntegerMvFlag : __CODEGEN_BITFIELD(1, 1); //!< Force Integer MV Flag 442 uint32_t AllowWarpedMotionFlag : __CODEGEN_BITFIELD(2, 2); //!< Allow Warped Motion Flag 443 uint32_t Reserved99 : __CODEGEN_BITFIELD(3, 3); //!< Reserved 444 uint32_t UseCdefFilterFlag : __CODEGEN_BITFIELD(4, 4); //!< Use CDEF Filter Flag 445 uint32_t UseSuperResFlag : __CODEGEN_BITFIELD(5, 5); //!< Use Super-Res Flag 446 uint32_t FrameLevelLoopRestorationFilterEnableFlag : __CODEGEN_BITFIELD(6, 6); //!< Frame Level Loop Restoration Filter Enable Flag 447 uint32_t ApplyFilmGrainFlag : __CODEGEN_BITFIELD(7, 7); //!< Apply Film Grain Flag 448 uint32_t LargeScaleTileEnableFlag : __CODEGEN_BITFIELD(8, 8); //!< Large Scale Tile Enable Flag 449 uint32_t Reserved105 : __CODEGEN_BITFIELD(9, 13); //!< Reserved 450 uint32_t PostCdefFilteredReconPixelsWriteoutEn : __CODEGEN_BITFIELD(14, 14); //!< Post CDEF Filtered Recon Pixels Writeout En 451 uint32_t PostWienerFilteredReconPixelsWriteouten : __CODEGEN_BITFIELD(15, 15); //!< Post Wiener Filtered Recon Pixels WriteoutEn 452 uint32_t FrameType : __CODEGEN_BITFIELD(16, 17); //!< Frame Type 453 uint32_t Reserved114 : __CODEGEN_BITFIELD(18, 18); //!< Reserved (for the expansion of Frame Type) 454 uint32_t IntraonlyFlag : __CODEGEN_BITFIELD(19, 19); //!< IntraOnly Flag 455 uint32_t Reserved116 : __CODEGEN_BITFIELD(20, 21); //!< Reserved 456 uint32_t ErrorResilientModeFlag : __CODEGEN_BITFIELD(22, 22); //!< ERROR_RESILIENT_MODE_FLAG 457 uint32_t AllowIntrabcFlag : __CODEGEN_BITFIELD(23, 23); //!< Allow IntraBC Flag 458 uint32_t Reserved120 : __CODEGEN_BITFIELD(24, 27); //!< Reserved 459 uint32_t PrimaryReferenceFrameIdx : __CODEGEN_BITFIELD(28, 30); //!< Primary Reference Frame Idx 460 uint32_t Reserved127 : __CODEGEN_BITFIELD(31, 31); //!< Reserved (for future expansion of Primary Reference Frame Idx) 461 }; 462 uint32_t Value; 463 } DW3; 464 union 465 { 466 struct 467 { 468 uint32_t SegmentationEnableFlag : __CODEGEN_BITFIELD(0, 0); //!< SEGMENTATION_ENABLE_FLAG 469 uint32_t SegmentationUpdateMapFlag : __CODEGEN_BITFIELD(1, 1); //!< Segmentation Update Map Flag 470 uint32_t SegmentationTemporalUpdateFlag : __CODEGEN_BITFIELD(2, 2); //!< SEGMENTATION_TEMPORAL_UPDATE_FLAG 471 uint32_t PreSkipSegmentIdFlag : __CODEGEN_BITFIELD(3, 3); //!< Pre-Skip Segment ID Flag 472 uint32_t LastActiveSegmentId : __CODEGEN_BITFIELD(4, 6); //!< Last Active Segment ID 473 uint32_t DeltaQPresentFlag : __CODEGEN_BITFIELD(7, 7); //!< Delta Q Present Flag 474 uint32_t DeltaQRes : __CODEGEN_BITFIELD(8, 9); //!< Delta Q RES 475 uint32_t FrameCodedLosslessMode : __CODEGEN_BITFIELD(10, 10); //!< FRAME_CODED_LOSSLESS_MODE 476 uint32_t SegmentMapIsZeroFlag : __CODEGEN_BITFIELD(11, 11); //!< Segment Map Is Zero Flag 477 uint32_t SegmentIdBufferStreamInEnableFlag : __CODEGEN_BITFIELD(12, 12); //!< Segment ID Buffer Stream-In Enable Flag 478 uint32_t SegmentIdBufferStreamOutEnableFlag : __CODEGEN_BITFIELD(13, 13); //!< Segment ID Buffer Stream-Out Enable Flag 479 uint32_t Reserved142 : __CODEGEN_BITFIELD(14, 15); //!< Reserved 480 uint32_t BaseQindex : __CODEGEN_BITFIELD(16, 23); //!< Base Qindex 481 uint32_t YDcDeltaQ : __CODEGEN_BITFIELD(24, 30); //!< Y_dc_delta_q 482 uint32_t Reserved159 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 483 }; 484 uint32_t Value; 485 } DW4; 486 union 487 { 488 struct 489 { 490 uint32_t UDcDeltaQ : __CODEGEN_BITFIELD(0, 6); //!< U_dc_delta_q 491 uint32_t Reserved167 : __CODEGEN_BITFIELD(7, 7); //!< Reserved 492 uint32_t UAcDeltaQ : __CODEGEN_BITFIELD(8, 14); //!< U_ac_delta_q 493 uint32_t Reserved175 : __CODEGEN_BITFIELD(15, 15); //!< Reserved 494 uint32_t VDcDeltaQ : __CODEGEN_BITFIELD(16, 22); //!< V_dc_delta_q 495 uint32_t Reserved183 : __CODEGEN_BITFIELD(23, 23); //!< Reserved 496 uint32_t VAcDeltaQ : __CODEGEN_BITFIELD(24, 30); //!< V_ac_delta_q 497 uint32_t Reserved191 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 498 }; 499 uint32_t Value; 500 } DW5; 501 union 502 { 503 struct 504 { 505 uint32_t AllowHighPrecisionMv : __CODEGEN_BITFIELD(0, 0); //!< Allow High Precision MV 506 uint32_t FrameLevelReferenceModeSelect : __CODEGEN_BITFIELD(1, 1); //!< Frame Level Reference Mode Select 507 uint32_t McompFilterType : __CODEGEN_BITFIELD(2, 4); //!< MCOMP_FILTER_TYPE 508 uint32_t Reserved197 : __CODEGEN_BITFIELD(5, 5); //!< Reserved (for future expansion of Mcomp Filter Type) 509 uint32_t MotionModeSwitchableFlag : __CODEGEN_BITFIELD(6, 6); //!< Motion Mode Switchable Flag 510 uint32_t UseReferenceFrameMvSetFlag : __CODEGEN_BITFIELD(7, 7); //!< Use Reference Frame MV Set Flag 511 uint32_t ReferenceFrameSignBiasI0To7 : __CODEGEN_BITFIELD(8, 15); //!< Reference Frame Sign Bias [i=0 to 7] 512 uint32_t CurrentFrameOrderHint : __CODEGEN_BITFIELD(16, 23); //!< Current Frame Order Hint 513 uint32_t Reserved216 : __CODEGEN_BITFIELD(24, 31); //!< Reserved (for future expansion of Frame Order Hint) 514 }; 515 uint32_t Value; 516 } DW6; 517 union 518 { 519 struct 520 { 521 uint32_t ReducedTxSetUsed : __CODEGEN_BITFIELD(0, 0); //!< Reduced Tx Set Used 522 uint32_t FrameTransformMode : __CODEGEN_BITFIELD(1, 2); //!< Frame Transform Mode 523 uint32_t Reserved227 : __CODEGEN_BITFIELD(3, 3); //!< Reserved 524 uint32_t SkipModePresentFlag : __CODEGEN_BITFIELD(4, 4); //!< Skip Mode Present Flag 525 uint32_t SkipModeFrame0 : __CODEGEN_BITFIELD(5, 7); //!< Skip Mode Frame [0] 526 uint32_t Reserved232 : __CODEGEN_BITFIELD(8, 8); //!< Reserved (for future expansion of Skip Mode Frame[0]) 527 uint32_t SkipModeFrame1 : __CODEGEN_BITFIELD(9, 11); //!< Skip Mode Frame [1] 528 uint32_t Reserved236 : __CODEGEN_BITFIELD(12, 23); //!< Reserved (for future expansion of Skip Mode Frame[1]) 529 uint32_t ReferenceFrameSideI0To7 : __CODEGEN_BITFIELD(24, 31); //!< Reference Frame Side [i=0 to 7] 530 }; 531 uint32_t Value; 532 } DW7; 533 union 534 { 535 struct 536 { 537 uint32_t Reserved256 : __CODEGEN_BITFIELD(0, 2); //!< Reserved (for future expansion of Global Motion Type[0]) 538 uint32_t GlobalMotionType1 : __CODEGEN_BITFIELD(3, 4); //!< Global Motion Type[1] 539 uint32_t Reserved261 : __CODEGEN_BITFIELD(5, 5); //!< Reserved (for future expansion of Global Motion Type[1] 540 uint32_t GlobalMotionType2 : __CODEGEN_BITFIELD(6, 7); //!< Global Motion Type[2] 541 uint32_t Reserved264 : __CODEGEN_BITFIELD(8, 8); //!< Reserved (for future expansion of Global Motion Type[2] 542 uint32_t GlobalMotionType3 : __CODEGEN_BITFIELD(9, 10); //!< Global Motion Type[3] 543 uint32_t Reserved267 : __CODEGEN_BITFIELD(11, 11); //!< Reserved (for future expansion of Global Motion Type[3] 544 uint32_t GlobalMotionType4 : __CODEGEN_BITFIELD(12, 13); //!< Global Motion Type[4] 545 uint32_t Reserved270 : __CODEGEN_BITFIELD(14, 14); //!< Reserved (for future expansion of Global Motion Type[4] 546 uint32_t GlobalMotionType5 : __CODEGEN_BITFIELD(15, 16); //!< Global Motion Type[5] 547 uint32_t Reserved273 : __CODEGEN_BITFIELD(17, 17); //!< Reserved (for future expansion of Global Motion Type[5] 548 uint32_t GlobalMotionType6 : __CODEGEN_BITFIELD(18, 19); //!< Global Motion Type[6] 549 uint32_t Reserved276 : __CODEGEN_BITFIELD(20, 20); //!< Reserved (for future expansion of Global Motion Type[6] 550 uint32_t GlobalMotionType7 : __CODEGEN_BITFIELD(21, 22); //!< Global Motion Type[7] 551 uint32_t Reserved279 : __CODEGEN_BITFIELD(23, 23); //!< Reserved (for future expansion of Global Motion Type[7] 552 uint32_t FrameLevelGlobalMotionInvalidFlags : __CODEGEN_BITFIELD(24, 31); //!< Frame Level Global Motion Invalid Flags 553 }; 554 uint32_t Value; 555 } DW8; 556 uint32_t WarpParametersArrayReference1To7Projectioncoeff0To5[21]; //!< Warp Parameters Array [Reference=1 to 7][ProjectionCoeff=0 to 5] 557 union 558 { 559 struct 560 { 561 uint32_t ReferenceFrameIdx0 : __CODEGEN_BITFIELD(0, 2); //!< Reference Frame Idx[0] 562 uint32_t Reserved963 : __CODEGEN_BITFIELD(3, 3); //!< Reserved (for future expansion of reference frame idx0) 563 uint32_t ReferenceFrameIdx1 : __CODEGEN_BITFIELD(4, 6); //!< Reference Frame Idx[1] 564 uint32_t Reserved967 : __CODEGEN_BITFIELD(7, 7); //!< Reserved (for future expansion of reference frame idx1) 565 uint32_t ReferenceFrameIdx2 : __CODEGEN_BITFIELD(8, 10); //!< Reference Frame Idx[2] 566 uint32_t Reserved971 : __CODEGEN_BITFIELD(11, 11); //!< Reserved (for future expansion of reference frame idx2) 567 uint32_t ReferenceFrameIdx3 : __CODEGEN_BITFIELD(12, 14); //!< Reference Frame Idx[3] 568 uint32_t Reserved975 : __CODEGEN_BITFIELD(15, 15); //!< Reserved (for future expansion of reference frame idx3) 569 uint32_t ReferenceFrameIdx4 : __CODEGEN_BITFIELD(16, 18); //!< Reference Frame Idx[4] 570 uint32_t Reserved979 : __CODEGEN_BITFIELD(19, 19); //!< Reserved (for future expansion of reference frame idx4) 571 uint32_t ReferenceFrameIdx5 : __CODEGEN_BITFIELD(20, 22); //!< Reference Frame Idx[5] 572 uint32_t Reserved983 : __CODEGEN_BITFIELD(23, 23); //!< Reserved (for future expansion of reference frame idx5) 573 uint32_t ReferenceFrameIdx6 : __CODEGEN_BITFIELD(24, 26); //!< Reference Frame Idx[6] 574 uint32_t Reserved987 : __CODEGEN_BITFIELD(27, 27); //!< Reserved (for future expansion of reference frame idx6) 575 uint32_t ReferenceFrameIdx7 : __CODEGEN_BITFIELD(28, 30); //!< Reference Frame Idx[7] 576 uint32_t Reserved991 : __CODEGEN_BITFIELD(31, 31); //!< Reserved (for future expansion of reference frame idx7) 577 }; 578 uint32_t Value; 579 } DW30; 580 union 581 { 582 struct 583 { 584 uint32_t IntraFrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Intra Frame Width In Pixel Minus 1 585 uint32_t IntraFrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Intra Frame Height In Pixel Minus 1 586 }; 587 uint32_t Value; 588 } DW31; 589 union 590 { 591 struct 592 { 593 uint32_t LastFrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Last Frame Width In Pixel Minus 1 594 uint32_t LastFrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Last Frame Height In Pixel Minus 1 595 }; 596 uint32_t Value; 597 } DW32; 598 union 599 { 600 struct 601 { 602 uint32_t Last2FrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Last2 Frame Width In Pixel Minus 1 603 uint32_t Last2FrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Last2 Frame Height In Pixel Minus 1 604 }; 605 uint32_t Value; 606 } DW33; 607 union 608 { 609 struct 610 { 611 uint32_t Last3FrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Last3 Frame Width In Pixel Minus 1 612 uint32_t Last3FrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Last3 Frame Height In Pixel Minus 1 613 }; 614 uint32_t Value; 615 } DW34; 616 union 617 { 618 struct 619 { 620 uint32_t GoldenFrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Golden Frame Width In Pixel Minus 1 621 uint32_t GoldenFrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< Golden Frame Height In Pixel Minus 1 622 }; 623 uint32_t Value; 624 } DW35; 625 union 626 { 627 struct 628 { 629 uint32_t BwdrefFrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< BWDREF Frame Width In Pixel Minus 1 630 uint32_t BwdrefFrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< BWDREF Frame Height In Pixel Minus 1 631 }; 632 uint32_t Value; 633 } DW36; 634 union 635 { 636 struct 637 { 638 uint32_t Altref2FrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< ALTREF2 Frame Width In Pixel Minus 1 639 uint32_t Altref2FrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< ALTREF2 Frame Height In Pixel Minus 1 640 }; 641 uint32_t Value; 642 } DW37; 643 union 644 { 645 struct 646 { 647 uint32_t AltrefFrameWidthInPixelMinus1 : __CODEGEN_BITFIELD(0, 15); //!< ALTREF Frame Width In Pixel Minus 1 648 uint32_t AltrefFrameHeightInPixelMinus1 : __CODEGEN_BITFIELD(16, 31); //!< ALTREF Frame Height In Pixel Minus 1 649 }; 650 uint32_t Value; 651 } DW38; 652 union 653 { 654 struct 655 { 656 uint32_t VerticalScaleFactorForIntra : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for INTRA 657 uint32_t HorizontalScaleFactorForIntra : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for INTRA 658 }; 659 uint32_t Value; 660 } DW39; 661 union 662 { 663 struct 664 { 665 uint32_t VerticalScaleFactorForLast : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for LAST 666 uint32_t HorizontalScaleFactorForLast : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for LAST 667 }; 668 uint32_t Value; 669 } DW40; 670 union 671 { 672 struct 673 { 674 uint32_t VerticalScaleFactorForLast2 : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for LAST2 675 uint32_t HorizontalScaleFactorForLast2 : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for LAST2 676 }; 677 uint32_t Value; 678 } DW41; 679 union 680 { 681 struct 682 { 683 uint32_t VerticalScaleFactorForLast3 : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for LAST3 684 uint32_t HorizontalScaleFactorForLast3 : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for LAST3 685 }; 686 uint32_t Value; 687 } DW42; 688 union 689 { 690 struct 691 { 692 uint32_t VerticalScaleFactorForGolden : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for GOLDEN 693 uint32_t HorizontalScaleFactorForGolden : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for GOLDEN 694 }; 695 uint32_t Value; 696 } DW43; 697 union 698 { 699 struct 700 { 701 uint32_t VerticalScaleFactorForBwdrefFrame : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for BWDREF_FRAME 702 uint32_t HorizontalScaleFactorForBwdrefFrame : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for BWDREF_FRAME 703 }; 704 uint32_t Value; 705 } DW44; 706 union 707 { 708 struct 709 { 710 uint32_t VerticalScaleFactorForAltref2 : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for ALTREF2 711 uint32_t HorizontalScaleFactorForAltref2 : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for ALTREF2 712 }; 713 uint32_t Value; 714 } DW45; 715 union 716 { 717 struct 718 { 719 uint32_t VerticalScaleFactorForAltref : __CODEGEN_BITFIELD(0, 15); //!< Vertical Scale Factor for ALTREF 720 uint32_t HorizontalScaleFactorForAltref : __CODEGEN_BITFIELD(16, 31); //!< Horizontal Scale Factor for ALTREF 721 }; 722 uint32_t Value; 723 } DW46; 724 union 725 { 726 struct 727 { 728 uint32_t ReferenceFrameOrderHint0ForIntraFrame : __CODEGEN_BITFIELD(0, 7); //!< Reference Frame Order Hint [0] for Intra Frame 729 uint32_t ReferenceFrameOrderHint1ForLastFrame : __CODEGEN_BITFIELD(8, 15); //!< Reference Frame Order Hint [1] for Last Frame 730 uint32_t ReferenceFrameOrderHint2ForLast2Frame : __CODEGEN_BITFIELD(16, 23); //!< Reference Frame Order Hint [2] for Last2 Frame 731 uint32_t ReferenceFrameOrderHint3ForLast3Frame : __CODEGEN_BITFIELD(24, 31); //!< Reference Frame Order Hint [3] for Last3 Frame 732 }; 733 uint32_t Value; 734 } DW47; 735 union 736 { 737 struct 738 { 739 uint32_t ReferenceFrameOrderHint4ForGoldenFrame : __CODEGEN_BITFIELD(0, 7); //!< Reference Frame Order Hint [4] for Golden Frame 740 uint32_t ReferenceFrameOrderHint5ForBwdrefFrame : __CODEGEN_BITFIELD(8, 15); //!< Reference Frame Order Hint [5] for BWDREF Frame 741 uint32_t ReferenceFrameOrderHint6ForAltref2Frame : __CODEGEN_BITFIELD(16, 23); //!< Reference Frame Order Hint [6] for ALTREF2 Frame 742 uint32_t ReferenceFrameOrderHint7ForAltrefFrame : __CODEGEN_BITFIELD(24, 31); //!< Reference Frame Order Hint [7] for ALTREF Frame 743 }; 744 uint32_t Value; 745 } DW48; 746 union 747 { 748 struct 749 { 750 uint32_t Reserved1568; //!< Reserved 751 }; 752 uint32_t Value; 753 } DW49; 754 union 755 { 756 struct 757 { 758 uint32_t Reserved1600; //!< Reserved 759 }; 760 uint32_t Value; 761 } DW50; 762 union 763 { 764 struct 765 { 766 uint32_t Reserved1632 : __CODEGEN_BITFIELD(0, 15); //!< Reserved 767 uint32_t Nonfirstpassflag : __CODEGEN_BITFIELD(16, 16); //!< NONFIRSTPASSFLAG 768 uint32_t VdencPakOnlyPass : __CODEGEN_BITFIELD(17, 17); //!< VDENC PAK_ONLY PASS 769 uint32_t Reserved1650 : __CODEGEN_BITFIELD(18, 24); //!< Reserved 770 uint32_t FrameszoverstatusenFramebitratemaxreportmask : __CODEGEN_BITFIELD(25, 25); //!< FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK 771 uint32_t FrameszunderstatusenFramebitrateminreportmask : __CODEGEN_BITFIELD(26, 26); //!< FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK 772 uint32_t AVP_PIC_STATE_DW51_BIT27 : __CODEGEN_BITFIELD(27, 27); 773 uint32_t Reserved1660 : __CODEGEN_BITFIELD(28, 31); //!< Reserved 774 }; 775 uint32_t Value; 776 } DW51; 777 union 778 { 779 struct 780 { 781 uint32_t Framebitratemax : __CODEGEN_BITFIELD(0, 13); //!< FrameBitRateMax 782 uint32_t Reserved1678 : __CODEGEN_BITFIELD(14, 30); //!< Reserved 783 uint32_t Framebitratemaxunit : __CODEGEN_BITFIELD(31, 31); //!< FRAMEBITRATEMAXUNIT 784 }; 785 uint32_t Value; 786 } DW52; 787 union 788 { 789 struct 790 { 791 uint32_t Framebitratemin : __CODEGEN_BITFIELD(0, 13); //!< FrameBitRateMin 792 uint32_t Reserved1710 : __CODEGEN_BITFIELD(14, 30); //!< Reserved 793 uint32_t Framebitrateminunit : __CODEGEN_BITFIELD(31, 31); //!< FRAMEBITRATEMINUNIT 794 }; 795 uint32_t Value; 796 } DW53; 797 union 798 { 799 struct 800 { 801 uint64_t Framedeltaqindexmax; //!< FrameDeltaQindexMax 802 }; 803 uint32_t Value[2]; 804 } DW54_55; 805 union 806 { 807 struct 808 { 809 uint32_t Framedeltaqindexmin; //!< FrameDeltaQindexMin 810 }; 811 uint32_t Value; 812 } DW56; 813 union 814 { 815 struct 816 { 817 uint64_t Framedeltalfmax; //!< FrameDeltaLFMax 818 }; 819 uint32_t Value[2]; 820 } DW57_58; 821 union 822 { 823 struct 824 { 825 uint32_t Framedeltalfmin; //!< FrameDeltaLFMin 826 }; 827 uint32_t Value; 828 } DW59; 829 union 830 { 831 struct 832 { 833 uint64_t Framedeltaqindexlfmaxrange; //!< FrameDeltaQindexLFMaxRange 834 }; 835 uint32_t Value[2]; 836 } DW60_61; 837 union 838 { 839 struct 840 { 841 uint32_t Framedeltaqindexlfminrange; //!< FrameDeltaQindexLFMinRange 842 }; 843 uint32_t Value; 844 } DW62; 845 union 846 { 847 struct 848 { 849 uint32_t Minframsize : __CODEGEN_BITFIELD(0, 15); //!< MinFramSize 850 uint32_t Reserved2032 : __CODEGEN_BITFIELD(16, 29); //!< Reserved 851 uint32_t Minframesizeunits : __CODEGEN_BITFIELD(30, 31); //!< MINFRAMESIZEUNITS 852 }; 853 uint32_t Value; 854 } DW63; 855 union 856 { 857 struct 858 { 859 uint32_t VDAQMenable : __CODEGEN_BITFIELD(0, 0); //!< VDAQM enable 860 uint32_t Reserved2064 : __CODEGEN_BITFIELD(1, 31); //!< Reserved 861 }; 862 uint32_t Value; 863 } DW64; 864 union 865 { 866 struct 867 { 868 uint32_t Class0SseThreshold0 : __CODEGEN_BITFIELD(0, 15); //!< Class0_SSE_Threshold0 869 uint32_t Class0SseThreshold1 : __CODEGEN_BITFIELD(16, 31); //!< Class0_SSE_Threshold1 870 }; 871 uint32_t Value; 872 } DW65; 873 uint32_t SseThresholdsForClass18[8]; //!< SSE thresholds for Class1-8 874 union 875 { 876 struct 877 { 878 uint32_t Rdmult; //!< rdmult 879 }; 880 uint32_t Value; 881 } DW74; 882 union 883 { 884 struct 885 { 886 uint32_t SbMaxBitsizeallowed : __CODEGEN_BITFIELD(0, 17); //!< SB Max BitSizeAllowed 887 uint32_t Reserved2418 : __CODEGEN_BITFIELD(18, 19); //!< Reserved 888 uint32_t SbmaxbitstatusenSbmaxsizereportmask : __CODEGEN_BITFIELD(20, 20); //!< SBMaxBitStatusEn - SBMaxSizeReportMask 889 uint32_t Reserved2421 : __CODEGEN_BITFIELD(21, 31); //!< Reserved 890 }; 891 uint32_t Value; 892 } DW75; 893 894 //! \name Local enumerations 895 896 enum MEDIA_INSTRUCTION_COMMAND 897 { 898 MEDIA_INSTRUCTION_COMMAND_AVPPICSTATE = 48, //!< No additional details 899 }; 900 901 //! \brief MEDIA_INSTRUCTION_OPCODE 902 //! \details 903 //! Codec/Engine Name = AVP = 3h 904 enum MEDIA_INSTRUCTION_OPCODE 905 { 906 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 907 }; 908 909 enum PIPELINE_TYPE 910 { 911 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 912 }; 913 914 enum COMMAND_TYPE 915 { 916 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 917 }; 918 919 //! \brief SEQUENCE_CHROMA_SUBSAMPLING_FORMAT 920 //! \details 921 //! It specifies the chroma subsampling format for all frames in the 922 //! video sequence being decoded. [1:0] = 00 ; stands for 923 //! Monochrome 4:0:0, no Chroma planes at all, but [subsampling_x and 924 //! subsampling_y] is defaulted to [1, 1], as only Profile 0 can support 925 //! monochrome video coding. [1:0] = 01 ; stands for 4:2:0, 926 //! with[subsampling_x and subsampling_y] defining as[1, 1]. It is supported 927 //! in all profiles (seq_profile=0, 1, 2 - syntax element in the sequence 928 //! header) [1:0] = 10 ; stands for 4:2:2, 929 //! with[subsampling_x and subsampling_y] defining as[1, 0]. It is supported 930 //! only in seq_profile=2. [1:0] = 11 ; stands for 4:4:4 931 //! with[subsampling_x and subsampling_y] defining as[0, 0]. It is supported 932 //! in both seq_profile=1 and 2. It is a sequence-level 933 //! parameter derived from the sequence header syntax elements: seq_profile, 934 //! subsampling_x, subsampling_y, monochome, high_bitdepth and twelve_bit. 935 //! Default is 1, i.e. 4:2:0.. Note : AV1 supports 3 936 //! profiles: seq_profile Bit_depth Chroma Subsampling 937 //! 0 (Main Profile) 8 / 10 YUV 4:2:0 and 4:0:0 1 938 //! (High Profile) 8 / 10 YUV 4:4:4 (4:0:0 is not allowed) 2 939 //! (Pro Profile) 8 / 10 /12 YUV 4:2:2 AND 12 YUV 940 //! 4:2:0/4:4:4/4:0:0 Note : for AV1 decoder: 941 //! type="disc" style="margin-top:0in; margin-bottom:0in"><li 942 //! style="margin:0in 0in 0.0001pt; font-size:11pt; font-family:Calibri, 943 //! sans-serif">A profile 0 compliant decoder must be able to decode all 944 //! bitstreams labeled profile 0 945 //! style="margin:0in 0in 0.0001pt; 946 //! font-size:11pt; font-family:Calibri, sans-serif">A profile 1 compliant 947 //! decoder must be able to decode all bitstreams labeled profile 0 or 948 //! 1 949 //! style="margin:0in 0in 0.0001pt; font-size:11pt; 950 //! font-family:Calibri, sans-serif">A profile 2 compliant decoder must be 951 //! able to decode all bitstreams labeled profile 0, 1, or 2 952 953 enum SEQUENCE_CHROMA_SUBSAMPLING_FORMAT 954 { 955 SEQUENCE_CHROMA_SUBSAMPLING_FORMAT_420 = 1, //!< Chroma Sampling 4:2:0 956 }; 957 958 //! \brief ERROR_RESILIENT_MODE_FLAG 959 //! \details 960 //! It specifies whether all syntax decoding of the current frame is 961 //! independent of the previous frames, or not. Set to 0 to 962 //! disable error resilient mode Set to 1 to enable error 963 //! resilient mode (for independent syntax decoding) It is 964 //! the frame-level syntax element, error_resilient_mode. Default is 0. 965 //! It is read from the bitstream for all frame types (KEY Frame, 966 //! INTRA-ONLY Frame and INTER Frame), except when frame_type is set to 967 //! SWITCH_FRAME, in which it is forced to 1 instead of reading from the 968 //! bitstream. When error resilient mode is set to 1 969 //! (active), Refresh Frame Context is set to0. When error resilient is set 970 //! to 0,Refresh Frame Context is read from the bit stream. <p 971 //! /> Valid only in Decoder Mode /> <p 972 //! /> 973 enum ERROR_RESILIENT_MODE_FLAG 974 { 975 ERROR_RESILIENT_MODE_FLAG_DISABLE = 0, //!< No additional details 976 ERROR_RESILIENT_MODE_FLAG_ENABLE = 1, //!< No additional details 977 }; 978 979 //! \brief SEGMENTATION_ENABLE_FLAG 980 //! \details 981 //! Indicate if segementation is enabled or not 982 enum SEGMENTATION_ENABLE_FLAG 983 { 984 SEGMENTATION_ENABLE_FLAG_ALLBLOCKSAREIMPLIEDTOBELONGTOSEGMENT0 = 0, //!< No additional details 985 SEGMENTATION_ENABLE_FLAG_SEGIDDETERMINATIONDEPENDSONSEGMENTATIONUPDATEMAPSETTING = 1, //!< No additional details 986 }; 987 988 //! \brief SEGMENTATION_TEMPORAL_UPDATE_FLAG 989 //! \details 990 //! Indicates whether segID is decoding from bitstream or predicted from 991 //! previous frame. 992 enum SEGMENTATION_TEMPORAL_UPDATE_FLAG 993 { 994 SEGMENTATION_TEMPORAL_UPDATE_FLAG_DECODESEGIDFROMBITSTREAM = 0, //!< No additional details 995 SEGMENTATION_TEMPORAL_UPDATE_FLAG_GETSEGIDEITHERFROMBITSTREAMORFROMPREVIOUSFRAME = 1, //!< No additional details 996 }; 997 998 //! \brief FRAME_CODED_LOSSLESS_MODE 999 //! \details 1000 //! This bitSet to indicate lossless coding mode at frame level. 1001 //! Frame Coded Lossless Mode is set to 1, if all active segment's 1002 //! segment lossless flag are set to 1. The equation for 1003 //! deriving coded lossless mode is presented in the AVP_SEGMENT_STATE 1004 //! Command. AllLossless = CodedLossless && ( 1005 //! FrameWidth == UpscaledWidth ). The second condition in this equation is 1006 //! equivalent tohaving Super-res NOT enabled. Only 1007 //! CodedLossless flag is sent to HW. AllLossless flag is not. 1008 //! CodedLossless directly control the enabling/disabling of deblocker, 1009 //! CDEF in-loop filters. But AllLossless is used to control 1010 //! the enabling/disabling of Loop Restoration filter. Hence, when super-res 1011 //! is ON, Loop Restoration filter can still be ON/OFF, regardless of 1012 //! CodedLossless. 1013 enum FRAME_CODED_LOSSLESS_MODE 1014 { 1015 FRAME_CODED_LOSSLESS_MODE_NORMALMODE = 0, //!< No additional details 1016 FRAME_CODED_LOSSLESS_MODE_CODEDLOSSLESSMODE = 1, //!< No additional details 1017 }; 1018 1019 //! \brief MCOMP_FILTER_TYPE 1020 //! \details 1021 //! It specifies which Motion Compensation Filter type is to be used for 1022 //! the current frame. It is a frame-level derived 1023 //! parameters. It is derived from the frame level syntax elements 1024 //! (is_filter_switchable flag and the 2-bits interpolation_filter). 1025 //! Default is 0 (i.e. use the eight-tap basic filter). 1026 enum MCOMP_FILTER_TYPE 1027 { 1028 MCOMP_FILTER_TYPE_EIGHT_TAP = 0, //!< No additional details 1029 MCOMP_FILTER_TYPE_EIGHT_TAP_SMOOTH = 1, //!< No additional details 1030 MCOMP_FILTER_TYPE_EIGHT_TAP_SHARP = 2, //!< No additional details 1031 MCOMP_FILTER_TYPE_BILINEAR = 3, //!< No additional details 1032 MCOMP_FILTER_TYPE_SWITCHABLE = 4, //!< No additional details 1033 }; 1034 1035 //! \brief NONFIRSTPASSFLAG 1036 //! \details 1037 //! This signals the current pass is not the first pass. It will imply 1038 //! designate HW behavior. 1039 enum NONFIRSTPASSFLAG 1040 { 1041 NONFIRSTPASSFLAG_DISABLE = 0, //!< If it is initial-Pass, this bit is set to 0. 1042 NONFIRSTPASSFLAG_ENABLE = 1, //!< For subsequent passes, this bit is set to 1. 1043 }; 1044 1045 //! \brief FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK 1046 //! \details 1047 //! This is a mask bit controlling if the condition of frame level bit count 1048 //! exceeds FrameBitRateMax. 1049 enum FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK 1050 { 1051 FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK_DISABLE = 0, //!< Do not update bit 1 of HCP_VP9_IMAGE_STATUS control register. 1052 FRAMESZOVERSTATUSEN_FRAMEBITRATEMAXREPORTMASK_ENABLE = 1, //!< Set bit 1 of HCP_VP9_IMAGE_STATUS control register if the total frame level bit counter is greater than or equal to Frame Bit Rate Maximum limit. 1053 }; 1054 1055 //! \brief FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK 1056 //! \details 1057 //! This is a mask bit controlling if the condition of frame level bit count 1058 //! is less than FrameBitRateMin. 1059 enum FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK 1060 { 1061 FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK_DISABLE = 0, //!< Do not update bit 2 (Frame Bit Count Violate -- under run) of HCP_VP9_IMAGE_STATUS control register. 1062 FRAMESZUNDERSTATUSEN_FRAMEBITRATEMINREPORTMASK_ENABLE = 1, //!< Set bit 2 (Frame Bit Count Violate -- under run) of HCP_VP9_IMAGE_STATUS control register if the total frame level bit counter is less than or equal to Frame Bit Rate Minimum limit. 1063 }; 1064 1065 //! \brief FRAMEBITRATEMAXUNIT 1066 //! \details 1067 //! This field is the Frame Bitrate Maximum Limit Units. 1068 enum FRAMEBITRATEMAXUNIT 1069 { 1070 FRAMEBITRATEMAXUNIT_BYTE = 0, //!< 32byte unit 1071 FRAMEBITRATEMAXUNIT_KILOBYTE = 1, //!< 4Kbyte unit 1072 }; 1073 1074 //! \brief FRAMEBITRATEMINUNIT 1075 //! \details 1076 //! This field is the Frame Bitrate Maximum Limit Units. 1077 enum FRAMEBITRATEMINUNIT 1078 { 1079 FRAMEBITRATEMINUNIT_BYTE = 0, //!< 32byte unit 1080 FRAMEBITRATEMINUNIT_KILOBYTE = 1, //!< 4Kbyte unit 1081 }; 1082 1083 //! \brief MINFRAMESIZEUNITS 1084 //! \details 1085 //! This field is the Minimum Frame Size Units 1086 enum MINFRAMESIZEUNITS 1087 { 1088 MINFRAMESIZEUNITS_4KB = 0, //!< Minimum Frame Size is in 4Kbytes. 1089 MINFRAMESIZEUNITS_16KB = 1, //!< Minimum Frame Size is in 4Kbytes. 1090 MINFRAMESIZEUNITS_COMAPTIBILITYMODE = 2, //!< No additional details 1091 MINFRAMESIZEUNITS_6BYTES = 3, //!< No additional details 1092 }; 1093 1094 //! \name Initializations 1095 1096 //! \brief Explicit member initialization function 1097 AVP_PIC_STATE_CMD(); 1098 1099 static const size_t dwSize = 76; 1100 static const size_t byteSize = 304; 1101 }; 1102 1103 //! 1104 //! \brief AVP_PIPE_MODE_SELECT 1105 //! \details 1106 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 1107 //! all AVP Commands. Each AVP command has assigned a media instruction 1108 //! command as defined in DWord 0, BitField 22:16. 1109 //! 1110 //! The workload for the AVP pipeline is tile based. Once the bit stream DMA 1111 //! is configured with the AVP_BSD_OBJECT command for a tile in a frame, and 1112 //! the tile's bitstream is presented to the AVP, the tile decoding will 1113 //! begin. AVP pipeline is stateless, i.e. there is no states saved between 1114 //! the decoding of each tile. Hence all sequence, frame and segment state 1115 //! commands have to be resent before the tile coding command and the BSD 1116 //! object command. The AVP_PIPE_MODE_SELECT command is responsible for 1117 //! general pipeline level configuration that would normally be set once for 1118 //! a single stream encode or decode and would not be modified on a frame 1119 //! workload basis. This is a frame level state command and is shared by 1120 //! both encoding and decoding processes. 1121 //! 1122 struct AVP_PIPE_MODE_SELECT_CMD 1123 { 1124 union 1125 { 1126 struct 1127 { 1128 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1129 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1130 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1131 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1132 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1133 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1134 }; 1135 uint32_t Value; 1136 } DW0; 1137 union 1138 { 1139 struct 1140 { 1141 uint32_t CodecSelect : __CODEGEN_BITFIELD(0, 0); //!< CODEC_SELECT 1142 uint32_t Reserved33 : __CODEGEN_BITFIELD(1, 2); //!< Reserved 1143 uint32_t PicStatusErrorReportEnable : __CODEGEN_BITFIELD(3, 3); //!< PIC_STATUSERROR_REPORT_ENABLE 1144 uint32_t FrameReconstructionDisable : __CODEGEN_BITFIELD(4, 4); //!< Frame reconstruction disable 1145 uint32_t CodecStandardSelect : __CODEGEN_BITFIELD(5, 7); //!< CODEC_STANDARD_SELECT 1146 uint32_t Reserved40 : __CODEGEN_BITFIELD(8, 9); //!< Reserved 1147 uint32_t VdencMode : __CODEGEN_BITFIELD(10, 10); //!< VDENC Mode 1148 uint32_t Reserved43 : __CODEGEN_BITFIELD(11, 11); //!< Reserved 1149 uint32_t TileStatisticsStreamoutEnable : __CODEGEN_BITFIELD(12, 12); //!< Tile Statistics Streamout Enable 1150 uint32_t MultiEngineMode : __CODEGEN_BITFIELD(13, 14); //!< MULTI_ENGINE_MODE 1151 uint32_t PipeWorkingMode : __CODEGEN_BITFIELD(15, 16); //!< PIPE_WORKING_MODE 1152 uint32_t TileBasedEngine : __CODEGEN_BITFIELD(17, 17); //!< Tile Based Engine 1153 uint32_t Reserved50 : __CODEGEN_BITFIELD(18, 22); //!< Reserved 1154 uint32_t MotionCompMemTrackerCounterEnable : __CODEGEN_BITFIELD(23, 23); //!< Motion Comp Memory Tracker Counter Enable 1155 uint32_t Reserved56 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 1156 }; 1157 uint32_t Value; 1158 } DW1; 1159 union 1160 { 1161 struct 1162 { 1163 uint32_t Reserved64 : __CODEGEN_BITFIELD(0, 31); //!< Reserved 1164 }; 1165 uint32_t Value; 1166 } DW2; 1167 union 1168 { 1169 struct 1170 { 1171 uint32_t PicStatusErrorReportId; //!< Pic Status/Error Report ID 1172 }; 1173 uint32_t Value; 1174 } DW3; 1175 union 1176 { 1177 struct 1178 { 1179 uint32_t Reserved128 : __CODEGEN_BITFIELD(0, 3); //!< Reserved 1180 uint32_t AlcChickenbitRestrictSingleTileGroupInAFrame : __CODEGEN_BITFIELD(4, 4); //!< ALC chickenbit(Restrict single tile group in a frame) 1181 uint32_t Reserved133 : __CODEGEN_BITFIELD(5, 31); //!< Reserved 1182 }; 1183 uint32_t Value; 1184 } DW4; 1185 union 1186 { 1187 struct 1188 { 1189 uint32_t PhaseIndicator : __CODEGEN_BITFIELD(0, 1); //!< PHASE_INDICATOR 1190 uint32_t Reserved162 : __CODEGEN_BITFIELD(2, 31); //!< Reserved 1191 }; 1192 uint32_t Value; 1193 } DW5; 1194 union 1195 { 1196 struct 1197 { 1198 uint32_t Reserved192 : __CODEGEN_BITFIELD(0, 1); //!< Reserved 1199 uint32_t DownscaledSourcePixelPrefetchLength : __CODEGEN_BITFIELD(2, 4); //!< Downscaled Source Pixel Prefetch Length 1200 uint32_t DownscaledSourcePixelPrefetchEnable : __CODEGEN_BITFIELD(5, 5); //!< Downscaled Source Pixel Prefetch Enable 1201 uint32_t Reserved198 : __CODEGEN_BITFIELD(6, 6); //!< Reserved (for SSE Enable in future project) 1202 uint32_t OriginalSourcePixelPrefetchLength : __CODEGEN_BITFIELD(7, 9); //!< Original Source Pixel Prefetch Length 1203 uint32_t OriginalSourcePixelPrefetchEnable : __CODEGEN_BITFIELD(10, 10); //!< Original Source Pixel Prefetch Enable 1204 uint32_t Reserved203 : __CODEGEN_BITFIELD(11, 31); //!< Reserved 1205 }; 1206 uint32_t Value; 1207 } DW6; 1208 1209 //! \name Local enumerations 1210 1211 enum MEDIA_INSTRUCTION_COMMAND 1212 { 1213 MEDIA_INSTRUCTION_COMMAND_AVPPIPEMODESELECT = 0, //!< No additional details 1214 }; 1215 1216 //! \brief MEDIA_INSTRUCTION_OPCODE 1217 //! \details 1218 //! Codec/Engine Name = AVP = 3h 1219 enum MEDIA_INSTRUCTION_OPCODE 1220 { 1221 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1222 }; 1223 1224 enum PIPELINE_TYPE 1225 { 1226 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1227 }; 1228 1229 enum COMMAND_TYPE 1230 { 1231 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1232 }; 1233 1234 enum CODEC_SELECT 1235 { 1236 CODEC_SELECT_DECODE = 0, //!< No additional details 1237 CODEC_SELECT_ENCODE = 1, //!< No additional details 1238 }; 1239 1240 enum PIC_STATUSERROR_REPORT_ENABLE 1241 { 1242 PIC_STATUSERROR_REPORT_ENABLE_DISABLE = 0, //!< Disable status/error reporting 1243 PIC_STATUSERROR_REPORT_ENABLE_ENABLE = 1, //!< Status/Error reporting is written out once per picture. The Pic Status/Error Report ID in DWord3 along with the status/error status bits are packed into one cache line and written to the Status/Error Buffer address in the AVP_PIPE_BUF_ADDR_STATE command. Must be zero for encoder mode. 1244 }; 1245 1246 enum CODEC_STANDARD_SELECT 1247 { 1248 CODEC_STANDARD_SELECT_AV1 = 2, //!< No additional details 1249 }; 1250 1251 //! \brief MULTI_ENGINE_MODE 1252 //! \details 1253 //! This indicates the current pipe is in single pipe mode or if in 1254 //! scalable mode is in left/right/middle pipe in multi-engine mode. 1255 enum MULTI_ENGINE_MODE 1256 { 1257 MULTI_ENGINE_MODE_SINGLEENGINEMODEORMSACFEONLYDECODEMODE = 0, //!< This is for single engine mode (legacy) OR MSAC FE only decode mode 1258 MULTI_ENGINE_MODE_PIPEISTHELEFTENGINEINAMULTI_ENGINEMODE = 1, //!< Current pipe is the most left engine while running in scalable multi-engine mode 1259 MULTI_ENGINE_MODE_PIPEISTHERIGHTENGINEINAMULTI_ENGINEMODE = 2, //!< Current pipe is the most right engine while running in scalable multi-engine mode 1260 MULTI_ENGINE_MODE_PIPEISONEOFTHEMIDDLEENGINEINAMULTI_ENGINEMODE = 3, //!< Current pipe is in one of the middle engine while running in scalable multi-engine mode 1261 }; 1262 1263 //! \brief PIPE_WORKING_MODE 1264 //! \details 1265 //! This programs the working mode for AVP pipe. 1266 enum PIPE_WORKING_MODE 1267 { 1268 PIPE_WORKING_MODE_LEGACYDECODERENCODERMODE_SINGLEPIPE = 0, //!< This is for single pipe mode non-scalable mode. It is used by both decoder and encoder. 1269 PIPE_WORKING_MODE_ENCODERMODE_SCALABLEMULTI_PIPE = 2, //!< This is for multiple-pipe scalable mode for encoder model only. In encoder, it is for PAK. 1270 PIPE_WORKING_MODE_DECODERSCALABLEMODEWITHMSACINREALTILES_SCALABLEMULTI_PIPE = 3, //!< This is for multiple-pipe scalable mode decoder mode in real tiles. MSAC and reconstruction will run together. Each pipes will run in real tiles vertically. 1271 }; 1272 1273 //! \brief PHASE_INDICATOR 1274 //! \details 1275 //! This is used to indicate whether this is first, middle or last phase 1276 //! of programming during Real-Tile Decoder Mode. This is used by hardware 1277 //! to know if the current programming is first or last phases. 1278 //! This field is ignored (programmed to 0) for other modes other than 1279 //! AV1 Real-Tile Decoder Mode. 1280 enum PHASE_INDICATOR 1281 { 1282 PHASE_INDICATOR_FIRSTPHASE = 0, //!< No additional details 1283 PHASE_INDICATOR_MIDDLEPHASE = 1, //!< No additional details 1284 PHASE_INDICATOR_LASTPHASE = 2, //!< No additional details 1285 }; 1286 1287 //! \name Initializations 1288 1289 //! \brief Explicit member initialization function 1290 AVP_PIPE_MODE_SELECT_CMD(); 1291 1292 static const size_t dwSize = 7; 1293 static const size_t byteSize = 28; 1294 }; 1295 1296 //! 1297 //! \brief AVP_IND_OBJ_BASE_ADDR_STATE 1298 //! \details 1299 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 1300 //! all AVP Commands. Each AVP command has assigned a media instruction 1301 //! command as defined in DWord 0, BitField 22:16. 1302 //! 1303 //! The AVP_IND_OBJ_BASE_ADDR_STATE command is used to define the indirect 1304 //! object base address of the AV1 compressed bitstream in graphics memory. 1305 //! This is a frame level command issued in both encoding and decoding 1306 //! processes. Although a frame is coded as separate tiles, all tiles' 1307 //! compressed bitstream are still required to line up sequentially as one 1308 //! AV1 bitstream. Hence, there is only one Indirect Object Base Address for 1309 //! the entire AV1 codedframe. If the frame contains more than 1 tiles, the 1310 //! BSD Object Command will be issued multiple times, once for each tile and 1311 //! with its own tile bitstream starting memory address. 1312 //! 1313 struct AVP_IND_OBJ_BASE_ADDR_STATE_CMD 1314 { 1315 union 1316 { 1317 struct 1318 { 1319 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1320 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1321 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1322 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1323 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1324 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1325 }; 1326 uint32_t Value; 1327 } DW0; 1328 SPLITBASEADDRESS4KBYTEALIGNED_CMD AvpIndirectBitstreamObjectBaseAddress; //!< DW1..2, AVP Indirect Bitstream Object Base Address 1329 MEMORYADDRESSATTRIBUTES_CMD AvpIndirectBitstreamObjectMemoryAddressAttributes; //!< DW3, AVP Indirect Bitstream Object Memory Address Attributes 1330 SPLITBASEADDRESS4KBYTEALIGNED_CMD AvpIndirectBitstreamObjectAccessUpperBound; //!< DW4..5, AVP Indirect Bitstream Object Access Upper Bound 1331 SPLITBASEADDRESS4KBYTEALIGNED_CMD AvpIndirectCuObjectBaseAddress; //!< DW6..7, AVP Indirect CU Object Base Address 1332 MEMORYADDRESSATTRIBUTES_CMD AvpIndirectCuObjectMemoryAddressAttributes; //!< DW8, AVP Indirect CU Object Object Memory Address Attributes 1333 1334 //! \name Local enumerations 1335 1336 enum MEDIA_INSTRUCTION_COMMAND 1337 { 1338 MEDIA_INSTRUCTION_COMMAND_AVPINDOBJBASEADDRSTATE = 3, //!< No additional details 1339 }; 1340 1341 //! \brief MEDIA_INSTRUCTION_OPCODE 1342 //! \details 1343 //! Codec/Engine Name = AVP = 3h 1344 enum MEDIA_INSTRUCTION_OPCODE 1345 { 1346 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1347 }; 1348 1349 enum PIPELINE_TYPE 1350 { 1351 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1352 }; 1353 1354 enum COMMAND_TYPE 1355 { 1356 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1357 }; 1358 1359 //! \name Initializations 1360 1361 //! \brief Explicit member initialization function 1362 AVP_IND_OBJ_BASE_ADDR_STATE_CMD(); 1363 1364 static const size_t dwSize = 9; 1365 static const size_t byteSize = 36; 1366 }; 1367 1368 //! 1369 //! \brief AVP_TILE_CODING 1370 //! \details 1371 //! This command is used only for AV1codec. It is issued for every tile of a 1372 //! frame. If a frame is composed of only 1 tile, it is still being issued. 1373 //! Tiling and Tile Group organization in AV1 cannot be disabled, a frame 1374 //! minimum must have 1 tile. Currently, each batch buffer can contain only 1375 //! 1 tile to be processed, it cannot contain more than 1 tile or the entire 1376 //! tile group of tiles. When the tile width exceeds 4096 pixels or the 1377 //! tile area exceeds 4096x2304 pixels, tiling must be performed and number 1378 //! of tiles in such frame must be >1. There is no mandatory tiling driven 1379 //! by tile height. The frame height in pixels will limit the allowed tile 1380 //! height in extreme situation. Hence, the AVP_TILE_CODING can be issued 1381 //! multiple times for decoding a frame. Since AVP HW pipeline is 1382 //! stateless, all sequence, frame and segment level states (coding 1383 //! parameters in all Frame Level State Commands) must be resent before 1384 //! sending each TILE_CODING_STATE command. Although tile size is specified 1385 //! in SuperBlock unit, the minimum tile size is actually set to be 8x8 1386 //! pixels (which is the same as the minimum frame size in pixels). It can 1387 //! also happen to the rightmost tile column and bottommost tile row of a 1388 //! frame which is not divisible by the SuperBlock size - this leads to the 1389 //! presence of partial tile and partial SuperBlock handling. AV1 supports 1390 //! both 1) a uniform-spacing tiling scheme (as in VP9, which is always in 1391 //! the form of 2^N x 2^M number of tiles, for the entire frame), and 2) a 1392 //! non-uniform-spacing tiling scheme. Bitstream syntax elements will 1393 //! specify the width and height of each tile size in the frame. AVP HW 1394 //! pipeline is a tile-based codec engine, it does not need to distinguish 1395 //! between these two tiling schemes. Driver will take care of the 1396 //! difference and details of these tiling schemes. At the end, Driver will 1397 //! send out one tile at a time with all the related tile information to the 1398 //! HW through this TILE_CODING State Command. In AV1, a frame is 1399 //! partitioned by tile row and tile column. That is, a tile boundary must 1400 //! go across the full frame width or the full frame height only. There is 1401 //! no tiling within a tile. For AV1, the max number of tiles per frame is 1402 //! set to 256 in the LEVEL definition for regular video decoding. The 1403 //! ext-tile (Virtual Reality mode, currently not supported) has a different 1404 //! tiling configuration, constraints and definition. 1405 //! 1406 struct AVP_TILE_CODING_CMD 1407 { 1408 union 1409 { 1410 struct 1411 { 1412 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1413 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1414 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1415 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1416 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1417 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1418 }; 1419 uint32_t Value; 1420 } DW0; 1421 union 1422 { 1423 struct 1424 { 1425 uint32_t FrameTileId : __CODEGEN_BITFIELD(0, 11); //!< Frame Tile ID 1426 uint32_t TgTileNum : __CODEGEN_BITFIELD(12, 23); //!< TG Tile Num 1427 uint32_t TileGroupId : __CODEGEN_BITFIELD(24, 31); //!< Tile Group ID 1428 }; 1429 uint32_t Value; 1430 } DW1; 1431 union 1432 { 1433 struct 1434 { 1435 uint32_t TileColumnPositionInSbUnit : __CODEGEN_BITFIELD(0, 9); //!< Tile Column Position in SB Unit 1436 uint32_t Reserved74 : __CODEGEN_BITFIELD(10, 15); //!< Reserved 1437 uint32_t TileRowPositionInSbUnit : __CODEGEN_BITFIELD(16, 25); //!< Tile Row Position in SB Unit 1438 uint32_t Reserved90 : __CODEGEN_BITFIELD(26, 31); //!< Reserved 1439 }; 1440 uint32_t Value; 1441 } DW2; 1442 union 1443 { 1444 struct 1445 { 1446 uint32_t TileWidthInSuperblockUnitMinus1 : __CODEGEN_BITFIELD(0, 5); //!< Tile Width in SuperBlock Unit Minus1 1447 uint32_t Reserved102 : __CODEGEN_BITFIELD(6, 15); //!< Reserved 1448 uint32_t TileHeightInSuperblockUnitMinus1 : __CODEGEN_BITFIELD(16, 25); //!< Tile Height in SuperBlock Unit Minus1 1449 uint32_t Reserved122 : __CODEGEN_BITFIELD(26, 31); //!< Reserved 1450 }; 1451 uint32_t Value; 1452 } DW3; 1453 union 1454 { 1455 struct 1456 { 1457 uint32_t FirstPhaseOnScalabilityMode : __CODEGEN_BITFIELD(0, 0); //!< First Phase on Scalability Mode 1458 uint32_t LastPhaseOnScalabilityMode : __CODEGEN_BITFIELD(1, 1); //!< Last Phase on Scalability Mode 1459 uint32_t AvpCrcEnable : __CODEGEN_BITFIELD(2, 2); 1460 uint32_t Reserved131 : __CODEGEN_BITFIELD(3, 22); //!< Reserved 1461 uint32_t FirstTileInAFrame : __CODEGEN_BITFIELD(23, 23); //!< First Tile in a Frame 1462 uint32_t Reserved152 : __CODEGEN_BITFIELD(24, 24); //!< Reserved 1463 uint32_t IslasttileofcolumnFlag : __CODEGEN_BITFIELD(25, 25); //!< IsLastTileOfColumn Flag 1464 uint32_t IslasttileofrowFlag : __CODEGEN_BITFIELD(26, 26); //!< IsLastTileOfRow Flag 1465 uint32_t IsstarttileoftilegroupFlag : __CODEGEN_BITFIELD(27, 27); //!< IsStartTileOfTileGroup Flag 1466 uint32_t IsendtileoftilegroupFlag : __CODEGEN_BITFIELD(28, 28); //!< IsEndTileOfTileGroup Flag 1467 uint32_t IslasttileofframeFlag : __CODEGEN_BITFIELD(29, 29); //!< IsLastTileOfFrame Flag 1468 uint32_t DisableCdfUpdateFlag : __CODEGEN_BITFIELD(30, 30); //!< Disable CDF Update Flag 1469 uint32_t DisableFrameContextUpdateFlag : __CODEGEN_BITFIELD(31, 31); //!< Disable Frame Context Update Flag 1470 }; 1471 uint32_t Value; 1472 } DW4; 1473 union 1474 { 1475 struct 1476 { 1477 uint32_t NumberOfActiveBePipes : __CODEGEN_BITFIELD(0, 7); //!< Number of Active BE Pipes 1478 uint32_t Reserved168 : __CODEGEN_BITFIELD(8, 11); //!< Reserved MBZ 1479 uint32_t NumOfTileColumnsMinus1InAFrame : __CODEGEN_BITFIELD(12, 21); //!< Num of Tile Columns Minus1 in a Frame 1480 uint32_t NumOfTileRowsMinus1InAFrame : __CODEGEN_BITFIELD(22, 31); //!< Num of Tile Rows Minus1 in a Frame 1481 }; 1482 uint32_t Value; 1483 } DW5; 1484 union 1485 { 1486 struct 1487 { 1488 uint32_t OutputDecodedTileColumnPositionInSbUnit : __CODEGEN_BITFIELD(0, 9); //!< Output Decoded Tile Column Position in SB Unit 1489 uint32_t Reserved202 : __CODEGEN_BITFIELD(10, 15); //!< Reserved 1490 uint32_t OutputDecodedTileRowPositionInSbUnit : __CODEGEN_BITFIELD(16, 25); //!< Output Decoded Tile Row Position in SB Unit 1491 uint32_t Reserved218 : __CODEGEN_BITFIELD(26, 31); //!< Reserved 1492 }; 1493 uint32_t Value; 1494 } DW6; 1495 1496 //! \name Local enumerations 1497 1498 enum MEDIA_INSTRUCTION_COMMAND 1499 { 1500 MEDIA_INSTRUCTION_COMMAND_AVPTILECODING = 21, //!< No additional details 1501 }; 1502 1503 enum MEDIA_INSTRUCTION_OPCODE 1504 { 1505 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1506 }; 1507 1508 enum PIPELINE_TYPE 1509 { 1510 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1511 }; 1512 1513 enum COMMAND_TYPE 1514 { 1515 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1516 }; 1517 1518 //! \name Initializations 1519 1520 //! \brief Explicit member initialization function 1521 AVP_TILE_CODING_CMD(); 1522 1523 static const size_t dwSize = 7; 1524 static const size_t byteSize = 28; 1525 }; 1526 1527 1528 //! 1529 //! \brief AVP_SURFACE_STATE 1530 //! \details 1531 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 1532 //! all AVP Commands. Each AVP command has assigned a media instruction 1533 //! command as defined in DWord 0, BitField 22:16. 1534 //! 1535 //! The AVP_SURFACE_STATE command is responsible for defining the frame 1536 //! buffer pitch and the offset of the chroma component.This is a picture 1537 //! level state command and is shared by both encoding and decoding 1538 //! processes.For Decoder, this command is issued once per surface type. 1539 //! There is one reconstructed surface, 8 reference pictures surfaces and 1540 //! one optional IntraBC Decoded Surface (only if IBC is ON).For Encoder, 1541 //! this command is issued once per surface type. There are4 surface types 1542 //! :source down scaled, source original, reference and reconstructed 1543 //! picture. All reference frames are defined with the same surface 1544 //! command.Tile-Yf and Tile-Ys are not supported in Gen12, but HW interface 1545 //! still need to keep these bits as reserved bits.Note : When NV12 and Tile 1546 //! Y are being used, full pitch and interleaved UV is always in use. U and 1547 //! V Xoffset must be set to 0; U and V Yoffset must be 8-pixel aligned. For 1548 //! 10-bit pixel, P010 surface definition is being used. 1549 //! 1550 struct AVP_SURFACE_STATE_CMD 1551 { 1552 union 1553 { 1554 struct 1555 { 1556 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1557 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1558 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1559 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1560 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1561 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1562 }; 1563 uint32_t Value; 1564 } DW0; 1565 union 1566 { 1567 struct 1568 { 1569 uint32_t SurfacePitchMinus1 : __CODEGEN_BITFIELD(0, 16); //!< Surface Pitch Minus1 1570 uint32_t Reserved49 : __CODEGEN_BITFIELD(17, 27); //!< Reserved 1571 uint32_t SurfaceId : __CODEGEN_BITFIELD(28, 31); //!< SURFACE_ID 1572 }; 1573 uint32_t Value; 1574 } DW1; 1575 union 1576 { 1577 struct 1578 { 1579 uint32_t YOffsetForUCbInPixel : __CODEGEN_BITFIELD(0, 14); //!< Y Offset for U(Cb) in pixel 1580 uint32_t Reserved79 : __CODEGEN_BITFIELD(15, 24); //!< Reserved 1581 uint32_t VariantFormatLsbPackedEnable : __CODEGEN_BITFIELD(25, 25); //!< VARIANT_FORMAT_LSB_PACKED_ENABLE 1582 uint32_t Reserved90 : __CODEGEN_BITFIELD(26, 26); //!< Reserved 1583 uint32_t SurfaceFormat : __CODEGEN_BITFIELD(27, 31); //!< SURFACE_FORMAT 1584 }; 1585 uint32_t Value; 1586 } DW2; 1587 union 1588 { 1589 struct 1590 { 1591 uint32_t DefaultAlphaValue : __CODEGEN_BITFIELD(0, 15); //!< Default Alpha Value 1592 uint32_t YOffsetForVCr : __CODEGEN_BITFIELD(16, 31); //!< Y Offset for V(Cr) 1593 }; 1594 uint32_t Value; 1595 } DW3; 1596 union 1597 { 1598 struct 1599 { 1600 uint32_t Av1IntraFrame : __CODEGEN_BITFIELD(0, 0); //!< AV1 Intra Frame 1601 uint32_t Av1LastFrameCompressionAccumulationBufferEnable : __CODEGEN_BITFIELD(1, 1); //!< AV1 Last Frame Compression Accumulation Buffer Enable 1602 uint32_t Av1Last2FrameCompressionAccumulationBufferEnable : __CODEGEN_BITFIELD(2, 2); //!< AV1 Last2 Frame Compression Accumulation Buffer Enable 1603 uint32_t Av1Last3FrameCompressionAccumulationBufferEnable : __CODEGEN_BITFIELD(3, 3); //!< AV1 Last3 Frame Compression Accumulation Buffer Enable 1604 uint32_t Av1GoldenFrameCompressionAccumulationBufferEnable : __CODEGEN_BITFIELD(4, 4); //!< AV1 Golden Frame Compression Accumulation Buffer Enable 1605 uint32_t Av1BwdrefFrameCompressionAccumulationBufferEnable : __CODEGEN_BITFIELD(5, 5); //!< AV1 Bwd ref Frame Compression Accumulation Buffer Enable 1606 uint32_t Av1Altref2FrameCompressionAccumulationBufferEnable : __CODEGEN_BITFIELD(6, 6); //!< AV1 Alter2 Frame Compression Accumulation Buffer Enable 1607 uint32_t Av1AltrefFrameCompressionAccumulationBufferEnable : __CODEGEN_BITFIELD(7, 7); //!< AV1 Alter Frame Compression Accumulation Buffer Enable 1608 uint32_t Reserved136 : __CODEGEN_BITFIELD(8, 15); //!< Reserved 1609 uint32_t CompressionFormat : __CODEGEN_BITFIELD(16, 20); //!< Compression Format 1610 uint32_t Reserved149 : __CODEGEN_BITFIELD(21, 31); //!< Reserved 1611 }; 1612 uint32_t Value; 1613 } DW4; 1614 1615 //! \name Local enumerations 1616 1617 enum MEDIA_INSTRUCTION_COMMAND 1618 { 1619 MEDIA_INSTRUCTION_COMMAND_SURFACESTATE = 1, //!< No additional details 1620 }; 1621 1622 //! \brief MEDIA_INSTRUCTION_OPCODE 1623 //! \details 1624 //! Codec/Engine Name = AVP = 3h 1625 enum MEDIA_INSTRUCTION_OPCODE 1626 { 1627 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1628 }; 1629 1630 enum PIPELINE_TYPE 1631 { 1632 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1633 }; 1634 1635 enum COMMAND_TYPE 1636 { 1637 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1638 }; 1639 1640 enum SURFACE_ID 1641 { 1642 SURFACE_ID_RECONSTRUCTEDPICTURE = 0, //!< This is for the reconstructed picture surface state 1643 SURFACE_ID_SOURCEDOWNSCALEDINPUTPICTURE_ENCODERONLY = 1, //!< Downscaled source pixels used for encoding (creating bitstream)Valid for encoder only 1644 SURFACE_ID_AV1ORIGINALUPSCALEDSOURCEPIXELS_ENCODERONLY = 3, //!< This is for AV1 original/upscaled source pixels surface used for Wiener filterValid for encoder only 1645 SURFACE_ID_AV1INTRAFRAME = 6, //!< This is for AV1 Intra Frame (Reference Picture 0). Each AV1 Reference Pictures can have different size so a separate ID is needed.For 8bit: NV12 formatFor 10bit: P010V format WITHLSBs fully maintained.This is the reconstructed frame output at the output end of the Loop Restoration Filter, and will be used as a reference frame placed inside the DPB for future frame to reference for inter-prediction. 1646 SURFACE_ID_AV1LASTFRAME = 7, //!< This is for AV1Last Frame (Reference Picture 1). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1647 SURFACE_ID_AV1LAST2FRAME = 8, //!< This is for AV1 Last2 Frame (Reference Picture 2). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1648 SURFACE_ID_AV1LAST3FRAME = 9, //!< This is for AV1 Last3 Frame (Reference Picture 3). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1649 SURFACE_ID_AV1GOLDENFRAME = 10, //!< This is for AV1 Golden Frame (Reference Picture 4). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1650 SURFACE_ID_AV1BWDREFFRAME = 11, //!< This is for AV1 Bwdref Frame (Reference Picture 5). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1651 SURFACE_ID_AV1ALTREF2FRAME = 12, //!< This is for AV1 Altref2 Frame (Reference Picture 6). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1652 SURFACE_ID_AV1ALTREFFRAME = 13, //!< This is for AV1 Altref Frame (Reference Picture 7). Each AV1 Reference Pictures can have different size so a separate ID is needed. 1653 SURFACE_ID_INTRABCDECODEDFRAME = 14, //!< This is for AV1 IntraBC Decoded Frame. It will be used both Read/Write at the same time. This surface requires multiple of 8 pixels on both width and height. 1654 SURFACE_ID_AV1CDEFPIXELSSTREAMOUT_ENCODERONLY = 15, //!< Surface forwriting out Post CDEF pixels as,For 8bit: NV12 formatFor 10bit: P010V format WITHOUT LSBs 1655 }; 1656 1657 //! \brief VARIANT_FORMAT_LSB_PACKED_ENABLE 1658 //! \details 1659 //! This bit indicates if the LSB portion of the variant format is packed 1660 //! together or byte-aligned with 0 to lower portion part of the byte. 1661 //! This is only valid forP010Variant/P016Variant 1662 //! andY210Variant/Y216Variant (444 Variant is not supported currently). 1663 //! This bit must be programmed to 0 for all other format. 1664 enum VARIANT_FORMAT_LSB_PACKED_ENABLE 1665 { 1666 VARIANT_FORMAT_LSB_PACKED_ENABLE_LSBUNPACKED = 0, //!< Indicates LSB portion of the Variant format is byte-aligned per pixel by adding "0" to the lower part of the byte 1667 VARIANT_FORMAT_LSB_PACKED_ENABLE_LSBPACKED = 1, //!< Indicates LSB portion of the Variant format is packed together (multiple LSB pixels are packed together to form a byte). The number of LSB pixels can be packed together depends on the bitdepth of the pixels. 1668 }; 1669 1670 //! \brief SURFACE_FORMAT 1671 //! \details 1672 //! Specifies the format of the surface. 1673 enum SURFACE_FORMAT 1674 { 1675 SURFACE_FORMAT_P010VARIANT = 3, //!< P010Variant is a modified P010 format, >8 bit planar 420 with MSB together and LSB at an offset in x direction where the x-offset should be 32-bit aligned. 1676 SURFACE_FORMAT_PLANAR4208 = 4, //!< No additional details 1677 SURFACE_FORMAT_P010 = 13, //!< No additional details 1678 }; 1679 1680 //! \name Initializations 1681 1682 //! \brief Explicit member initialization function 1683 AVP_SURFACE_STATE_CMD(); 1684 1685 static const size_t dwSize = 5; 1686 static const size_t byteSize = 20; 1687 }; 1688 1689 //! 1690 //! \brief AVP_SEGMENT_STATE 1691 //! \details 1692 //! When segmentation is enabled, this Segment State command is issued 1693 //! onceper segment. There can be maximum 8 segments specified to decode a 1694 //! given frame, so this Segment State Command can be issued maximum 8 1695 //! times. It is assumed that there is no gap in segment IDs. So, when the 1696 //! AVP PIC States specified that the number of active When segmentation 1697 //! is disabled, driver still sends out this command once for segment id = 1698 //! 0. HW needs to check the segmentation enable flag from AVP_PIC_STATE 1699 //! Command as well to distinguish from the case when segmentation is 1700 //! enabled for segment id = 0. Each segment can have its own specification 1701 //! of enabling any one of the 8 features defined in AV1 and their 1702 //! corresponding feature data. When a feature is not enabled, its feature 1703 //! data is defaulted to 0. When segmentation is not enabled, all the 1704 //! features are disabled and their corresponding feature data are set to 0. 1705 //! style="margin:0in 0in 8pt"> Segment State Command also provides other 1706 //! segement related parameters. style="margin:0in 0in 8pt"> It is assumed 1707 //! that HW is keeping a copy of the complete AV1 QM Matrix Tablefor all 1708 //! color components inside its internal memory, and Driver only needs to 1709 //! send the qm_level as index into this Table. 1710 //! 1711 struct AVP_SEGMENT_STATE_CMD 1712 { 1713 union 1714 { 1715 struct 1716 { 1717 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1718 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1719 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1720 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1721 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1722 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1723 }; 1724 uint32_t Value; 1725 } DW0; 1726 union 1727 { 1728 struct 1729 { 1730 uint32_t SegmentId : __CODEGEN_BITFIELD(0, 2); //!< Segment ID 1731 uint32_t Reserved35 : __CODEGEN_BITFIELD(3, 31); //!< Reserved 1732 }; 1733 uint32_t Value; 1734 } DW1; 1735 union 1736 { 1737 struct 1738 { 1739 uint32_t SegmentFeatureMask : __CODEGEN_BITFIELD(0, 7); //!< Segment Feature Mask 1740 uint32_t SegmentDeltaQindex : __CODEGEN_BITFIELD(8, 16); //!< Segment Delta Qindex 1741 uint32_t SegmentBlockSkipFlag : __CODEGEN_BITFIELD(17, 17); //!< Segment Block Skip Flag 1742 uint32_t SegmentBlockGlobalmvFlag : __CODEGEN_BITFIELD(18, 18); //!< Segment Block GlobalMV Flag 1743 uint32_t SegmentLosslessFlag : __CODEGEN_BITFIELD(19, 19); //!< Segment Lossless Flag 1744 uint32_t SegmentLumaYQmLevel : __CODEGEN_BITFIELD(20, 23); //!< Segment Luma Y QM Level 1745 uint32_t SegmentChromaUQmLevel : __CODEGEN_BITFIELD(24, 27); //!< Segment Chroma U QM Level 1746 uint32_t SegmentChromaVQmLevel : __CODEGEN_BITFIELD(28, 31); //!< Segment Chroma V QM Level 1747 }; 1748 uint32_t Value; 1749 } DW2; 1750 union 1751 { 1752 struct 1753 { 1754 uint32_t SegmentDeltaLoopFilterLevelLumaVertical : __CODEGEN_BITFIELD(0, 6); //!< Segment Delta Loop Filter Level Luma Vertical 1755 uint32_t SegmentDeltaLoopFilterLevelLumaHorizontal : __CODEGEN_BITFIELD(7, 13); //!< Segment Delta Loop Filter Level Luma Horizontal 1756 uint32_t SegmentDeltaLoopFilterLevelChromaU : __CODEGEN_BITFIELD(14, 20); //!< Segment Delta Loop Filter Level Chroma U 1757 uint32_t SegmentDeltaLoopFilterLevelChromaV : __CODEGEN_BITFIELD(21, 27); //!< Segment Delta Loop Filter Level Chroma V 1758 uint32_t SegmentReferenceFrame : __CODEGEN_BITFIELD(28, 30); //!< Segment Reference Frame 1759 uint32_t Reserved127 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 1760 }; 1761 uint32_t Value; 1762 } DW3; 1763 1764 //! \name Local enumerations 1765 1766 enum MEDIA_INSTRUCTION_COMMAND 1767 { 1768 MEDIA_INSTRUCTION_COMMAND_AVPSEGMENTSTATE = 50, //!< No additional details 1769 }; 1770 1771 //! \brief MEDIA_INSTRUCTION_OPCODE 1772 //! \details 1773 //! Codec/Engine Name = AVP = 3h 1774 enum MEDIA_INSTRUCTION_OPCODE 1775 { 1776 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1777 }; 1778 1779 enum PIPELINE_TYPE 1780 { 1781 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1782 }; 1783 1784 enum COMMAND_TYPE 1785 { 1786 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1787 }; 1788 1789 //! \name Initializations 1790 1791 //! \brief Explicit member initialization function 1792 AVP_SEGMENT_STATE_CMD(); 1793 1794 static const size_t dwSize = 4; 1795 static const size_t byteSize = 16; 1796 }; 1797 1798 //! 1799 //! \brief AVP_PIPE_BUF_ADDR_STATE 1800 //! \details 1801 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 1802 //! all AVP Commands. Each AVP command has assigned a media instruction 1803 //! command as defined in DWord 0, BitField 22:16. 1804 //! 1805 //! This state command provides the physical memory base addresses for all 1806 //! row store buffers, column store buffers (for tile column and in 1807 //! scalability mode), reconstructed output and reference frame buffers, and 1808 //! auxiliary data buffers (MV, segment map, etc.) that are required by the 1809 //! AV1 decoding and encoding process.This is a frame level state command 1810 //! and is shared by both encoding and decoding processes.AVP is a tile 1811 //! based pipeline and is a stateless pipeline, hence all sequence level, 1812 //! frame level, and segment level state commands must be resent to process 1813 //! each tile.Memory compression may be applicable to some of these buffers 1814 //! for BW saving.Note : there is no buffer to store the 16 QM table sets, 1815 //! they are implemented directly inside the HW pipeline. 1816 //! 1817 struct AVP_PIPE_BUF_ADDR_STATE_CMD 1818 { 1819 union 1820 { 1821 struct 1822 { 1823 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 1824 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 1825 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 1826 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 1827 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 1828 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 1829 }; 1830 uint32_t Value; 1831 } DW0; 1832 SPLITBASEADDRESS64BYTEALIGNED_CMD ReferenceFrameBufferBaseAddressRefaddr07[8]; //!< DW1..16, Reference Frame Buffer Base Address (RefAddr[0-7]) 1833 MEMORYADDRESSATTRIBUTES_CMD ReferenceFrameBufferBaseAddressAttributes; //!< DW17, Reference Frame Buffer Base Address Attributes 1834 SPLITBASEADDRESS4KBYTEALIGNED_CMD DecodedOutputFrameBufferAddress; //!< DW18..19, Decoded Output Frame Buffer Address 1835 MEMORYADDRESSATTRIBUTES_CMD DecodedOutputFrameBufferAddressAttributes; //!< DW20, Decoded Output Frame Buffer Address Attributes 1836 SPLITBASEADDRESS4KBYTEALIGNED_CMD FilmGrainInjectedOutputFrameBufferAddress; //!< DW21..22, Film Grain Injected Output Frame Buffer Address 1837 MEMORYADDRESSATTRIBUTES_CMD FilmGrainInjectedOutputFrameBufferAddressAttributes; //!< DW23, Film Grain Injected Output Frame Buffer Address Attributes 1838 SPLITBASEADDRESS4KBYTEALIGNED_CMD IntrabcDecodedOutputFrameBufferAddress; //!< DW24..25, IntraBC Decoded Output Frame Buffer Address 1839 MEMORYADDRESSATTRIBUTES_CMD IntrabcDecodedOutputFrameBufferAddressAttributes; //!< DW26, IntraBC Decoded Output Frame Buffer Address Attributes 1840 SPLITBASEADDRESS64BYTEALIGNED_CMD CdfTablesInitializationBufferAddress; //!< DW27..28, CDF Tables Initialization Buffer Address 1841 MEMORYADDRESSATTRIBUTES_CMD CdfTablesInitializationBufferAddressAttributes; //!< DW29, CDF Tables Initialization Buffer Address Attributes 1842 SPLITBASEADDRESS64BYTEALIGNED_CMD CdfTablesBackwardAdaptationBufferAddress; //!< DW30..31, CDF Tables Backward Adaptation Buffer Address 1843 MEMORYADDRESSATTRIBUTES_CMD CdfTablesBackwardAdaptationBufferAddressAttributes; //!< DW32, CDF Tables Backward Adaptation Buffer Address Attributes 1844 SPLITBASEADDRESS64BYTEALIGNED_CMD Av1SegmentIdReadBufferAddress; //!< DW33..34, AV1 Segment ID Read Buffer Address 1845 MEMORYADDRESSATTRIBUTES_CMD Av1SegmentIdReadBufferAddressAttributes; //!< DW35, AV1 Segment ID Read Buffer Address Attributes 1846 SPLITBASEADDRESS64BYTEALIGNED_CMD Av1SegmentIdWriteBufferAddress; //!< DW36..37, AV1 Segment ID Write Buffer Address 1847 MEMORYADDRESSATTRIBUTES_CMD Av1SegmentIdWriteBufferAddressAttributes; //!< DW38, AV1 Segment ID Write Buffer Address Attributes 1848 SPLITBASEADDRESS64BYTEALIGNED_CMD CollocatedMotionVectorTemporalBufferBaseAddressTmvaddr07[8]; //!< DW39..54, Collocated Motion Vector Temporal Buffer Base Address (TmvAddr[0-7]) 1849 MEMORYADDRESSATTRIBUTES_CMD CollocatedMotionVectorTemporalBufferBaseAddressAttributes; //!< DW55, Collocated Motion Vector Temporal Buffer Base Address Attributes 1850 SPLITBASEADDRESS64BYTEALIGNED_CMD CurrentFrameMotionVectorWriteBufferAddress; //!< DW56..57, Current Frame Motion Vector Write Buffer Address 1851 MEMORYADDRESSATTRIBUTES_CMD CurrentFrameMotionVectorWriteBufferAddressAttributes; //!< DW58, Current Frame Motion Vector Write Buffer Address Attributes 1852 SPLITBASEADDRESS64BYTEALIGNED_CMD FilmGrainSampleTemplateAddress; //!< DW59..60, Film Grain Sample Template Address 1853 MEMORYADDRESSATTRIBUTES_CMD FilmGrainSampleTemplateAddressAttributes; //!< DW61, Film Grain Sample Template Address Attributes 1854 SPLITBASEADDRESS64BYTEALIGNED_CMD BitstreamDecoderEncoderLineRowstoreReadWriteBufferAddress; //!< DW62..63, Bitstream Decoder/Encoder Line Rowstore Read/Write Buffer Address 1855 MEMORYADDRESSATTRIBUTES_CMD BitstreamDecoderEncoderLineRowstoreReadWriteBufferAddressAttributes; //!< DW64, Bitstream Decoder/Encoder Line Rowstore Read/Write Buffer Address Attributes 1856 SPLITBASEADDRESS64BYTEALIGNED_CMD BitstreamDecoderEncoderTileLineRowstoreReadWriteBufferAddress; //!< DW65..66, Bitstream Decoder/Encoder Tile Line Rowstore Read/Write Buffer Address 1857 MEMORYADDRESSATTRIBUTES_CMD BitstreamDecoderEncoderTileLineRowstoreReadWriteBufferAddressAttributes; //!< DW67, Bitstream Decoder/Encoder Tile Line Rowstore Read/Write Buffer Address Attributes 1858 SPLITBASEADDRESS64BYTEALIGNED_CMD IntraPredictionLineRowstoreReadWriteBufferAddress; //!< DW68..69, Intra Prediction Line Rowstore Read/Write Buffer Address 1859 MEMORYADDRESSATTRIBUTES_CMD IntraPredictionLineRowstoreReadWriteBufferAddressAttributes; //!< DW70, Intra Prediction Line Rowstore Read/Write Buffer Address Attributes 1860 SPLITBASEADDRESS64BYTEALIGNED_CMD IntraPredictionTileLineRowstoreReadWriteBufferAddress; //!< DW71..72, Intra Prediction Tile Line Rowstore Read/Write Buffer Address 1861 MEMORYADDRESSATTRIBUTES_CMD IntraPredictionTileLineRowstoreReadWriteBufferAddressAttributes; //!< DW73, Intra Prediction Tile Line Rowstore Read/Write Buffer Address Attributes 1862 SPLITBASEADDRESS64BYTEALIGNED_CMD SpatialMotionVectorLineReadWriteBufferAddress; //!< DW74..75, Spatial Motion Vector Line Read/Write Buffer Address 1863 MEMORYADDRESSATTRIBUTES_CMD SpatialMotionVectorLineReadWriteBufferAddressAttributes; //!< DW76, Spatial Motion Vector Line Read/Write Buffer Address Attributes 1864 SPLITBASEADDRESS64BYTEALIGNED_CMD SpatialMotionVectorCodingTileLineReadWriteBufferAddress; //!< DW77..78, Spatial Motion Vector Coding Tile Line Read/Write Buffer Address 1865 MEMORYADDRESSATTRIBUTES_CMD SpatialMotionVectorTileLineReadWriteBufferAddressAttributes; //!< DW79, Spatial Motion Vector Tile Line Read/Write Buffer Address Attributes 1866 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationMetaTileColumnReadWriteBufferAddress; //!< DW80..81, Loop Restoration Meta Tile Column Read/Write Buffer Address 1867 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationMetaTileColumnReadWriteBufferAddressAttributes; //!< DW82, Loop Restoration Meta Tile Column Read/Write Buffer Address Attributes 1868 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileReadWriteLineYBufferAddress; //!< DW83..84, Loop Restoration Filter Tile Read/Write Line Y Buffer Address 1869 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileReadWriteLineYBufferAddressAttributes; //!< DW85, Loop Restoration Filter Tile Read/Write Line Y Buffer Address Attributes 1870 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileReadWriteLineUBufferAddress; //!< DW86..87, Loop Restoration Filter Tile Read/Write Line U Buffer Address 1871 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileReadWriteLineUBufferAddressAttributes; //!< DW88, Loop Restoration Filter Tile Read/Write Line U Buffer Address Attributes 1872 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileReadWriteLineVBufferAddress; //!< DW89..90, Loop Restoration Filter Tile Read/Write Line V Buffer Address 1873 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileReadWriteLineVBufferAddressAttributes; //!< DW91, BitField: Loop Restoration Filter Tile Read/Write Line V Buffer Address Attributes 1874 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterLineReadWriteYBufferAddress; //!< DW92..93, Deblocker Filter Line Read/Write Y Buffer Address 1875 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterLineReadWriteYBufferAddressAttributes; //!< DW94, Deblocker Filter Line Read/Write Y Buffer Address Attributes 1876 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterLineReadWriteUBufferAddress; //!< DW95..96, Deblocker Filter Line Read/Write U Buffer Address 1877 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterLineReadWriteUBufferAddressAttributes; //!< DW97, Deblocker Filter Line Read/Write U Buffer Address Attributes 1878 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterLineReadWriteVBufferAddress; //!< DW98..99, Deblocker Filter Line Read/Write V Buffer Address 1879 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterLineReadWriteVBufferAddressAttributes; //!< DW100, Deblocker Filter Line Read/Write V Buffer Address Attributes 1880 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileLineReadWriteYBufferAddress; //!< DW101..102, Deblocker Filter Tile Line Read/Write Y Buffer Address 1881 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileLineReadWriteYBufferAddressAttributes; //!< DW103, Deblocker Filter Tile Line Read/Write Y Buffer Address Attributes 1882 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileLineReadWriteVBufferAddress; //!< DW104..105, Deblocker Filter Tile Line Read/Write V Buffer Address 1883 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileLineReadWriteVBufferAddressAttributes; //!< DW106, Deblocker Filter Tile Line Read/Write V Buffer Address Attributes 1884 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileLineReadWriteUBufferAddress; //!< DW107..108, Deblocker Filter Tile Line Read/Write U Buffer Address 1885 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileLineReadWriteUBufferAddressAttributes; //!< DW109, Deblocker Filter Tile Line Read/Write U Buffer Address Attributes 1886 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileColumnReadWriteYBufferAddress; //!< DW110..111, Deblocker Filter Tile Column Read/Write Y Buffer Address 1887 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileColumnReadWriteYBufferAddressAttributes; //!< DW112, Deblocker Filter Tile Column Read/Write Y Buffer Address Attributes 1888 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileColumnReadWriteUBufferAddress; //!< DW113..114, Deblocker Filter Tile Column Read/Write U Buffer Address 1889 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileColumnReadWriteUBufferAddressAttributes; //!< DW115, Deblocker Filter Tile Column Read/Write U Buffer Address Attributes 1890 SPLITBASEADDRESS64BYTEALIGNED_CMD DeblockerFilterTileColumnReadWriteVBufferAddress; //!< DW116..117, Deblocker Filter Tile Column Read/Write V Buffer Address 1891 MEMORYADDRESSATTRIBUTES_CMD DeblockerFilterTileColumnReadWriteVBufferAddressAttributes; //!< DW118, Deblocker Filter Tile Column Read/Write V Buffer Address Attributes 1892 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterLineReadWriteBufferAddress; //!< DW119..120, CDEF Filter Line Read/Write Buffer Address 1893 MEMORYADDRESSATTRIBUTES_CMD CdefFilterLineReadWriteBufferAddressAttributes; //!< DW121, CDEF Filter Line Read/Write Buffer Address Attributes 1894 uint32_t Reserved3904[6]; //!< Reserved 1895 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterTileLineReadWriteBufferAddress; //!< DW128..129, CDEF Filter Tile Line Read/Write Buffer Address 1896 MEMORYADDRESSATTRIBUTES_CMD CdefFilterTileLineReadWriteBufferAddressAttributes; //!< DW130, CDEF Filter Tile Line Read/Write Buffer Address Attributes 1897 uint32_t Reserved4192[6]; //!< Reserved 1898 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterTileColumnReadWriteBufferAddress; //!< DW137..138, CDEF Filter Tile Column Read/Write Buffer Address 1899 MEMORYADDRESSATTRIBUTES_CMD CdefFilterTileColumnReadWriteBufferAddressAttributes; //!< DW139, CDEF Filter Tile Column Read/Write Buffer Address Attributes 1900 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterMetaTileLineReadWriteBufferAddress; //!< DW140..141, CDEF Filter Meta Tile Line Read/Write Buffer Address 1901 MEMORYADDRESSATTRIBUTES_CMD CdefFilterMetaTileLineReadWriteBufferAddressAttributes; //!< DW142, CDEF Filter Meta Tile Line Read/Write Buffer Address Attributes 1902 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterMetaTileColumnReadWriteBufferAddress; //!< DW143..144, CDEF Filter Meta Tile Column Read/Write Buffer Address 1903 MEMORYADDRESSATTRIBUTES_CMD CdefFilterMetaTileColumnReadWriteBufferAddressAttributes; //!< DW145, CDEF Filter Meta Tile Column Read/Write Buffer Address Attributes 1904 SPLITBASEADDRESS64BYTEALIGNED_CMD CdefFilterTopLeftCornerReadWriteBufferAddress; //!< DW146..147, CDEF Filter Top-Left Corner Read/Write Buffer Address 1905 MEMORYADDRESSATTRIBUTES_CMD CdefFilterTopLeftCornerReadWriteBufferAddressAttributes; //!< DW148, CDEF Filter Top-Left Corner Read/Write Buffer Address Attributes 1906 SPLITBASEADDRESS64BYTEALIGNED_CMD SuperResTileColumnReadWriteYBufferAddress; //!< DW149..150, Super-Res Tile Column Read/Write Y Buffer Address 1907 MEMORYADDRESSATTRIBUTES_CMD SuperResTileColumnReadWriteYBufferAddressAttributes; //!< DW151, Super-Res Tile Column Read/Write Y Buffer Address Attributes 1908 SPLITBASEADDRESS64BYTEALIGNED_CMD SuperResTileColumnReadWriteUBufferAddress; //!< DW152..153, Super-Res Tile Column Read/Write U Buffer Address 1909 MEMORYADDRESSATTRIBUTES_CMD SuperResTileColumnReadWriteUBufferAddressAttributes; //!< DW154, Super-Res Tile Column Read/Write U Buffer Address Attributes 1910 SPLITBASEADDRESS64BYTEALIGNED_CMD SuperResTileColumnReadWriteVBufferAddress; //!< DW155..156, Super-Res Tile Column Read/Write V Buffer Address 1911 MEMORYADDRESSATTRIBUTES_CMD SuperResTileColumnReadWriteVBufferAddressAttributes; //!< DW157, Super-Res Tile Column Read/Write V Buffer Address Attributes 1912 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileColumnReadWriteYBufferAddress; //!< DW158..159, Loop Restoration Filter Tile Column Read/Write Y Buffer Address 1913 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileColumnReadWriteYBufferAddressAttributes; //!< DW160, Loop Restoration Filter Tile Column Read/Write Y Buffer Address Attributes 1914 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileColumnReadWriteUBufferAddress; //!< DW161..162, Loop Restoration Filter Tile Column Read/Write U Buffer Address 1915 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileColumnReadWriteUBufferAddressAttributes; //!< DW163, Loop Restoration Filter Tile Column Read/Write U Buffer Address Attributes 1916 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileColumnReadWriteVBufferAddress; //!< DW164..165, Loop Restoration Filter Tile Column Read/Write V Buffer Address 1917 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileColumnReadWriteVBufferAddressAttributes; //!< DW166, Loop Restoration Filter Tile Column Read/Write V Buffer Address Attributes 1918 uint32_t Reserved5344[3]; //!< Reserved 1919 SPLITBASEADDRESS64BYTEALIGNED_CMD LoopRestorationFilterTileColumnAlignmentReadWriteBufferAddress; //!< DW170..171, Loop Restoration Filter Tile Column Alignment Read/Write Buffer Address 1920 MEMORYADDRESSATTRIBUTES_CMD LoopRestorationFilterTileColumnAlignmentReadWriteBufferAddressAttributes;//!< DW172, Loop Restoration Filter Tile Column Alignment Read/Write Buffer Address Attributes 1921 SPLITBASEADDRESS64BYTEALIGNED_CMD FilmGrainTileColumnDataReadWriteBufferAddress; //!< DW173..174, Film Grain Tile Column Data Read/Write Buffer Address 1922 MEMORYADDRESSATTRIBUTES_CMD FilmGrainTileColumnDataReadWriteBufferAddressAttributes; //!< DW175, Film Grain Tile Column Data Read/Write Buffer Address Attributes 1923 SPLITBASEADDRESS64BYTEALIGNED_CMD DecodedFrameStatusErrorBufferBaseAddress; //!< DW176..177, Decoded Frame Status/Error Buffer Base Address 1924 MEMORYADDRESSATTRIBUTES_CMD DecodedFrameStatusErrorBufferBaseAddressAttributes; //!< DW178, Decoded Frame Status/Error Buffer Base Address Attributes 1925 SPLITBASEADDRESS64BYTEALIGNED_CMD DecodedBlockDataStreamoutBufferAddress; //!< DW179..180, Decoded Block Data Streamout Buffer Address 1926 MEMORYADDRESSATTRIBUTES_CMD DecodedBlockDataStreamoutBufferAddressAttributes; //!< DW181, Decoded Block Data Streamout Buffer Address Attributes 1927 uint32_t Reserved5824[3]; //!< Reserved 1928 uint32_t Reserved5920[3]; //!< Reserved 1929 SPLITBASEADDRESS64BYTEALIGNED_CMD OriginalUncompressedPictureSourceBufferAddress; //!< DW188..189, Original Uncompressed Picture Source Buffer Address 1930 MEMORYADDRESSATTRIBUTES_CMD OriginalUncompressedPictureSourceBufferAddressAttributes; //!< DW190, Original Uncompressed Picture Source Buffer Address Attributes 1931 SPLITBASEADDRESS64BYTEALIGNED_CMD DownscaledUncompressedPictureSourceBufferAddress; //!< DW191..192, Downscaled Uncompressed Picture Source Buffer Address 1932 MEMORYADDRESSATTRIBUTES_CMD DownscaledUncompressedPictureSourceBufferAddressAttributes; //!< DW193, Downscaled Uncompressed Picture Source Buffer Address Attributes 1933 SPLITBASEADDRESS64BYTEALIGNED_CMD TileSizeStreamoutBufferAddress; //!< DW194..195, Tile Size Streamout Buffer Address 1934 MEMORYADDRESSATTRIBUTES_CMD TileSizeStreamoutBufferAddressAttributes; //!< DW196, Tile Size Streamout Buffer Address Attributes 1935 SPLITBASEADDRESS64BYTEALIGNED_CMD TileStatisticsStreamoutBufferAddress; //!< DW197..198, Tile Statistics Streamout Buffer Address 1936 MEMORYADDRESSATTRIBUTES_CMD TileStatisticsStreamoutBufferAddressAttributes; //!< DW199, Tile Statistics Streamout Buffer Address Attributes 1937 SPLITBASEADDRESS64BYTEALIGNED_CMD CUStreamoutBufferAddress; //!< DW200..201, CU Streamout Buffer Address 1938 MEMORYADDRESSATTRIBUTES_CMD CUStreamoutBufferAddressAttributes; //!< DW202, CU Streamout Buffer Address Attributes 1939 SPLITBASEADDRESS64BYTEALIGNED_CMD SSELineReadWriteBufferAddress; //!< DW203..204, SSE Line Read/Write Buffer Address 1940 MEMORYADDRESSATTRIBUTES_CMD SSELineReadWriteBufferAddressAttributes; //!< DW205, SSE Line Read/Write Buffer Address Attributes 1941 SPLITBASEADDRESS64BYTEALIGNED_CMD SSETileLineReadWriteBufferAddress; //!< DW206..207, SSE Tile Line Read/Write Buffer Address 1942 MEMORYADDRESSATTRIBUTES_CMD SSETileLineReadWriteBufferAddressAttributes; //!< DW208, SSE Tile Line Read/Write Buffer Address Attributes 1943 SPLITBASEADDRESS64BYTEALIGNED_CMD PostCDEFpixelsBufferAddress; //!< DW209..210, PostCDEF pixels Buffer Address 1944 MEMORYADDRESSATTRIBUTES_CMD PostCDEFpixelsBufferAddressAttributes; //!< DW211, PostCDEF pixels Buffer Address Attributes 1945 SPLITBASEADDRESS64BYTEALIGNED_CMD AVP_PIPE_BUF_ADDR_STATE_DW212; 1946 MEMORYADDRESSATTRIBUTES_CMD AVP_PIPE_BUF_ADDR_STATE_DW214; 1947 1948 //! \name Local enumerations 1949 1950 enum MEDIA_INSTRUCTION_COMMAND 1951 { 1952 MEDIA_INSTRUCTION_COMMAND_AVPPIPEBUFADDRSTATE = 2, //!< No additional details 1953 }; 1954 1955 //! \brief MEDIA_INSTRUCTION_OPCODE 1956 //! \details 1957 //! Codec/Engine Name = AVP = 3h 1958 enum MEDIA_INSTRUCTION_OPCODE 1959 { 1960 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 1961 }; 1962 1963 enum PIPELINE_TYPE 1964 { 1965 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 1966 }; 1967 1968 enum COMMAND_TYPE 1969 { 1970 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1971 }; 1972 1973 //! \name Initializations 1974 1975 //! \brief Explicit member initialization function 1976 AVP_PIPE_BUF_ADDR_STATE_CMD(); 1977 1978 static const size_t dwSize = 215; 1979 static const size_t byteSize = 860; 1980 }; 1981 1982 //! 1983 //! \brief AVP_INLOOP_FILTER_STATE 1984 //! \details 1985 //! The AVP_INLOOP_FILTER_STATE command provides all the frame level syntax 1986 //! elements and derived parameters that are needed for the processing of 1987 //! all the post in-loop filters present in the AV1 codec, except the Luma 1988 //! and Chroma x0_qn which are tile based derived parameters. This includes 1989 //! the Deblocker, the CDEF (Constrained Directional Enhancement Filter), 1990 //! the HSRF (Horizontal-only Super-Resolution Filter), and the LRF (Loop 1991 //! Restoration Filter). These syntax elements can be changed in the 1992 //! bitstream from frame to frame. 1993 //! All Post In-Loop Filters are inherently frame-based filtering, but 1994 //! when implemented in a HW pipeline, the filtering process is performed in 1995 //! tile based and in a block by block fashion. In the addition to these 1996 //! frame and tile level states, there are additional syntax elements and 1997 //! derived parameters that are generated at SuperBlock level, and are not 1998 //! described here. 1999 //! Each of these 4 Post In-Loop Filters can be controlled independently 2000 //! and each can be enabled or disabled independently. Except the HSRF, all 2001 //! the other 3 filters have separate controls for each color plane as well. 2002 //! To disable a Post In-Loop Filter, its control parameter(s) are set to 0 2003 //! - the default state. 2004 //! This command should be issued once per tile, even if no post in-loop 2005 //! filter is enabled for decoding the current frame. When in frame lossless 2006 //! mode or when IntraBC is enabled, all the Post In-Loop Filters are 2007 //! disabled for all color planes, this command will provide the default 2008 //! values for all parameters. All syntax elements are then assumed a value 2009 //! of 0, except otherwise specified in each field of this State Command. 2010 //! When it is in monochrome video, no filter parameter for the two chroma 2011 //! planes is present in the bitstream. 2012 //! 2013 struct AVP_INLOOP_FILTER_STATE_CMD 2014 { 2015 union 2016 { 2017 struct 2018 { 2019 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 2020 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2021 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2022 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2023 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2024 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 2025 }; 2026 uint32_t Value; 2027 } DW0; 2028 union 2029 { 2030 struct 2031 { 2032 uint32_t LumaYDeblockerFilterLevelVertical : __CODEGEN_BITFIELD(0, 5); //!< Luma Y Deblocker Filter Level Vertical 2033 uint32_t LumaYDeblockerFilterLevelHorizontal : __CODEGEN_BITFIELD(6, 11); //!< Luma Y Deblocker Filter Level Horizontal 2034 uint32_t ChromaUDeblockerFilterLevel : __CODEGEN_BITFIELD(12, 17); //!< Chroma U Deblocker Filter Level 2035 uint32_t ChromaVDeblockerFilterLevel : __CODEGEN_BITFIELD(18, 23); //!< Chroma V Deblocker Filter Level 2036 uint32_t DeblockerFilterSharpnessLevel : __CODEGEN_BITFIELD(24, 26); //!< Deblocker Filter Sharpness Level 2037 uint32_t DeblockerFilterModeRefDeltaEnableFlag : __CODEGEN_BITFIELD(27, 27); //!< Deblocker Filter Mode Ref Delta Enable Flag 2038 uint32_t DeblockerDeltaLfResolution : __CODEGEN_BITFIELD(28, 29); //!< Deblocker Delta LF Resolution 2039 uint32_t DeblockerFilterDeltaLfMultiFlag : __CODEGEN_BITFIELD(30, 30); //!< Deblocker Filter Delta LF Multi Flag 2040 uint32_t DeblockerFilterDeltaLfPresentFlag : __CODEGEN_BITFIELD(31, 31); //!< Deblocker Filter Delta LF Present Flag 2041 }; 2042 uint32_t Value; 2043 } DW1; 2044 union 2045 { 2046 struct 2047 { 2048 uint32_t DeblockerFilterRefDeltas0 : __CODEGEN_BITFIELD(0, 6); //!< Deblocker Filter Ref Deltas[0] 2049 uint32_t Reserved71 : __CODEGEN_BITFIELD(7, 7); //!< Reserved 2050 uint32_t DeblockerFilterRefDeltas1 : __CODEGEN_BITFIELD(8, 14); //!< Deblocker Filter Ref Deltas[1] 2051 uint32_t Reserved79 : __CODEGEN_BITFIELD(15, 15); //!< Reserved 2052 uint32_t DeblockerFilterRefDeltas2 : __CODEGEN_BITFIELD(16, 22); //!< Deblocker Filter Ref Deltas[2] 2053 uint32_t Reserved87 : __CODEGEN_BITFIELD(23, 23); //!< Reserved 2054 uint32_t DeblockerFilterRefDeltas3 : __CODEGEN_BITFIELD(24, 30); //!< Deblocker Filter Ref Deltas[3] 2055 uint32_t Reserved95 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 2056 }; 2057 uint32_t Value; 2058 } DW2; 2059 union 2060 { 2061 struct 2062 { 2063 uint32_t DeblockerFilterRefDeltas4 : __CODEGEN_BITFIELD(0, 6); //!< Deblocker Filter Ref Deltas[4] 2064 uint32_t Reserved103 : __CODEGEN_BITFIELD(7, 7); //!< Reserved 2065 uint32_t DeblockerFilterRefDeltas5 : __CODEGEN_BITFIELD(8, 14); //!< Deblocker Filter Ref Deltas[5] 2066 uint32_t Reserved111 : __CODEGEN_BITFIELD(15, 15); //!< Reserved 2067 uint32_t DeblockerFilterRefDeltas6 : __CODEGEN_BITFIELD(16, 22); //!< Deblocker Filter Ref Deltas[6] 2068 uint32_t Reserved119 : __CODEGEN_BITFIELD(23, 23); //!< Reserved 2069 uint32_t DeblockerFilterRefDeltas7 : __CODEGEN_BITFIELD(24, 30); //!< Deblocker Filter Ref Deltas[7] 2070 uint32_t Reserved127 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 2071 }; 2072 uint32_t Value; 2073 } DW3; 2074 union 2075 { 2076 struct 2077 { 2078 uint32_t DeblockerFilterModeDeltas0 : __CODEGEN_BITFIELD(0, 6); //!< Deblocker Filter Mode Deltas[0] 2079 uint32_t Reserved135 : __CODEGEN_BITFIELD(7, 7); //!< Reserved 2080 uint32_t DeblockerFilterModeDeltas1 : __CODEGEN_BITFIELD(8, 14); //!< Deblocker Filter Mode Deltas[1] 2081 uint32_t Reserved143 : __CODEGEN_BITFIELD(15, 31); //!< Reserved 2082 }; 2083 uint32_t Value; 2084 } DW4; 2085 union 2086 { 2087 struct 2088 { 2089 uint32_t CdefYStrength0 : __CODEGEN_BITFIELD(0, 5); //!< CDEF Y Strength[0] 2090 uint32_t CdefYStrength1 : __CODEGEN_BITFIELD(6, 11); //!< CDEF Y Strength[1] 2091 uint32_t CdefYStrength2 : __CODEGEN_BITFIELD(12, 17); //!< CDEF Y Strength[2] 2092 uint32_t CdefYStrength3 : __CODEGEN_BITFIELD(18, 23); //!< CDEF Y Strength[3] 2093 uint32_t Reserved184 : __CODEGEN_BITFIELD(24, 27); //!< Reserved 2094 uint32_t CdefBits : __CODEGEN_BITFIELD(28, 29); //!< CDEF Bits 2095 uint32_t CdefFilterDampingFactorMinus3 : __CODEGEN_BITFIELD(30, 31); //!< CDEF Filter Damping Factor Minus3 2096 }; 2097 uint32_t Value; 2098 } DW5; 2099 union 2100 { 2101 struct 2102 { 2103 uint32_t CdefYStrength4 : __CODEGEN_BITFIELD(0, 5); //!< CDEF Y Strength[4] 2104 uint32_t CdefYStrength5 : __CODEGEN_BITFIELD(6, 11); //!< CDEF Y Strength[5] 2105 uint32_t CdefYStrength6 : __CODEGEN_BITFIELD(12, 17); //!< CDEF Y Strength[6] 2106 uint32_t CdefYStrength7 : __CODEGEN_BITFIELD(18, 23); //!< CDEF Y Strength[7] 2107 uint32_t Reserved216 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2108 }; 2109 uint32_t Value; 2110 } DW6; 2111 union 2112 { 2113 struct 2114 { 2115 uint32_t CdefUvStrength0 : __CODEGEN_BITFIELD(0, 5); //!< CDEF UV Strength[0] 2116 uint32_t CdefUvStrength1 : __CODEGEN_BITFIELD(6, 11); //!< CDEF UV Strength[1] 2117 uint32_t CdefUvStrength2 : __CODEGEN_BITFIELD(12, 17); //!< CDEF UV Strength[2] 2118 uint32_t CdefUvStrength3 : __CODEGEN_BITFIELD(18, 23); //!< CDEF UV Strength[3] 2119 uint32_t Reserved248 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2120 }; 2121 uint32_t Value; 2122 } DW7; 2123 union 2124 { 2125 struct 2126 { 2127 uint32_t CdefUvStrength4 : __CODEGEN_BITFIELD(0, 5); //!< CDEF UV Strength[4] 2128 uint32_t CdefUvStrength5 : __CODEGEN_BITFIELD(6, 11); //!< CDEF UV Strength[5] 2129 uint32_t CdefUvStrength6 : __CODEGEN_BITFIELD(12, 17); //!< CDEF UV Strength[6] 2130 uint32_t CdefUvStrength7 : __CODEGEN_BITFIELD(18, 23); //!< CDEF UV Strength[7] 2131 uint32_t Reserved280 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2132 }; 2133 uint32_t Value; 2134 } DW8; 2135 union 2136 { 2137 struct 2138 { 2139 uint32_t SuperResUpscaledFrameWidthMinus1 : __CODEGEN_BITFIELD(0, 15); //!< Super-Res Upscaled Frame Width Minus1 2140 uint32_t SuperResDenom : __CODEGEN_BITFIELD(16, 20); //!< Super-Res Denom 2141 uint32_t Reserved309 : __CODEGEN_BITFIELD(21, 31); //!< Reserved 2142 }; 2143 uint32_t Value; 2144 } DW9; 2145 union 2146 { 2147 struct 2148 { 2149 uint32_t FrameLoopRestorationFilterTypeForLumaY : __CODEGEN_BITFIELD(0, 1); //!< Frame Loop Restoration Filter Type for Luma Y 2150 uint32_t FrameLoopRestorationFilterTypeForChromaU : __CODEGEN_BITFIELD(2, 3); //!< Frame Loop Restoration Filter Type for Chroma U 2151 uint32_t FrameLoopRestorationFilterTypeForChromaV : __CODEGEN_BITFIELD(4, 5); //!< Frame Loop Restoration Filter Type for Chroma V 2152 uint32_t Reserved326 : __CODEGEN_BITFIELD(6, 7); //!< Reserved 2153 uint32_t LoopRestorationUnitSizeForLumaY : __CODEGEN_BITFIELD(8, 9); //!< Loop Restoration Unit Size for Luma Y 2154 uint32_t UseSameLoopRestorationUnitSizeForChromasUvFlag : __CODEGEN_BITFIELD(10, 10); //!< Use Same Loop Restoration Unit Size for Chromas UV Flag 2155 uint32_t Reserved331 : __CODEGEN_BITFIELD(11, 31); //!< Reserved 2156 }; 2157 uint32_t Value; 2158 } DW10; 2159 union 2160 { 2161 struct 2162 { 2163 uint32_t LumaPlaneXStepQn : __CODEGEN_BITFIELD(0, 15); //!< Luma Plane x_step_qn 2164 uint32_t Reserved368 : __CODEGEN_BITFIELD(16, 31); //!< Reserved (for higher precision of x_step_qn) 2165 }; 2166 uint32_t Value; 2167 } DW11; 2168 union 2169 { 2170 struct 2171 { 2172 uint32_t LumaPlaneX0Qn; //!< Luma Plane x0_qn 2173 }; 2174 uint32_t Value; 2175 } DW12; 2176 union 2177 { 2178 struct 2179 { 2180 uint32_t ChromaPlaneXStepQn : __CODEGEN_BITFIELD(0, 15); //!< Chroma Plane x_step_qn 2181 uint32_t Reserved432 : __CODEGEN_BITFIELD(16, 31); //!< Reserved 2182 }; 2183 uint32_t Value; 2184 } DW13; 2185 union 2186 { 2187 struct 2188 { 2189 uint32_t ChromaPlaneX0Qn; //!< Chroma Plane x0_qn 2190 }; 2191 uint32_t Value; 2192 } DW14; 2193 2194 //! \name Local enumerations 2195 2196 enum MEDIA_INSTRUCTION_COMMAND 2197 { 2198 MEDIA_INSTRUCTION_COMMAND_AVPINLOOPFILTERSTATE = 51, //!< No additional details 2199 }; 2200 2201 //! \brief MEDIA_INSTRUCTION_OPCODE 2202 //! \details 2203 //! Codec/Engine Name = AV1 = 3h 2204 enum MEDIA_INSTRUCTION_OPCODE 2205 { 2206 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2207 }; 2208 2209 enum PIPELINE_TYPE 2210 { 2211 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2212 }; 2213 2214 enum COMMAND_TYPE 2215 { 2216 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2217 }; 2218 2219 //! \name Initializations 2220 2221 //! \brief Explicit member initialization function 2222 AVP_INLOOP_FILTER_STATE_CMD(); 2223 2224 static const size_t dwSize = 15; 2225 static const size_t byteSize = 60; 2226 }; 2227 2228 //! 2229 //! \brief AVP_INTER_PRED_STATE 2230 //! \details 2231 //! The AVP Pipeline is selected with the Media Instruction Opcode "8h" for 2232 //! all AVP Commands. Each AVP command has assigned a media instruction 2233 //! command as defined in DWord 0, BitField 22:16. 2234 //! AVP supports a 8-reference frames display buffer. But at any given 2235 //! frame being decoded, only up to 7reference frames out of the 8 can be 2236 //! active. There are also further constraints on which of these 7frames can 2237 //! be used for forward and backward reference in the compound mode. 2238 //! To simplify the decoder command sequence programming, this command is 2239 //! issued once for each inter-coded tile as well as for each intra-coded 2240 //! tile (such as in a KEY_FRAME, a DELAY_KEY_FRAME, an INTRA_ONLY_FRAME). 2241 //! 2242 struct AVP_INTER_PRED_STATE_CMD 2243 { 2244 union 2245 { 2246 struct 2247 { 2248 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 2249 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2250 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2251 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2252 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2253 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 2254 }; 2255 uint32_t Value; 2256 } DW0; 2257 union 2258 { 2259 struct 2260 { 2261 uint32_t SavedOrderHintsForAllReferences00 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[0][0] 2262 uint32_t SavedOrderHintsForAllReferences01 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[0][1] 2263 uint32_t SavedOrderHintsForAllReferences02 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[0][2] 2264 uint32_t SavedOrderHintsForAllReferences03 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[0][3] 2265 }; 2266 uint32_t Value; 2267 } DW1; 2268 union 2269 { 2270 struct 2271 { 2272 uint32_t SavedOrderHintsForAllReferences04 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[0][4] 2273 uint32_t SavedOrderHintsForAllReferences05 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[0][5] 2274 uint32_t SavedOrderHintsForAllReferences06 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[0][6] 2275 uint32_t ActiveReferenceBitmaskForMotionFieldProjection : __CODEGEN_BITFIELD(24, 31); //!< Active Reference Bitmask for Motion Field Projection 2276 }; 2277 uint32_t Value; 2278 } DW2; 2279 union 2280 { 2281 struct 2282 { 2283 uint32_t SavedOrderHintsForAllReferences10 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[1][0] 2284 uint32_t SavedOrderHintsForAllReferences11 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[1][1] 2285 uint32_t SavedOrderHintsForAllReferences12 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[1][2] 2286 uint32_t SavedOrderHintsForAllReferences13 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[1][3] 2287 }; 2288 uint32_t Value; 2289 } DW3; 2290 union 2291 { 2292 struct 2293 { 2294 uint32_t SavedOrderHintsForAllReferences14 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[1][4] 2295 uint32_t SavedOrderHintsForAllReferences15 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[1][5] 2296 uint32_t SavedOrderHintsForAllReferences16 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[1][6] 2297 uint32_t Reserved152 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2298 }; 2299 uint32_t Value; 2300 } DW4; 2301 union 2302 { 2303 struct 2304 { 2305 uint32_t SavedOrderHintsForAllReferences20 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[2][0] 2306 uint32_t SavedOrderHintsForAllReferences21 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[2][1] 2307 uint32_t SavedOrderHintsForAllReferences22 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[2][2] 2308 uint32_t SavedOrderHintsForAllReferences23 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[2][3] 2309 }; 2310 uint32_t Value; 2311 } DW5; 2312 union 2313 { 2314 struct 2315 { 2316 uint32_t SavedOrderHintsForAllReferences24 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[2][4] 2317 uint32_t SavedOrderHintsForAllReferences25 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[2][5] 2318 uint32_t SavedOrderHintsForAllReferences26 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[2][6] 2319 uint32_t Reserved216 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2320 }; 2321 uint32_t Value; 2322 } DW6; 2323 union 2324 { 2325 struct 2326 { 2327 uint32_t SavedOrderHintsForAllReferences30 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[3][0] 2328 uint32_t SavedOrderHintsForAllReferences31 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[3][1] 2329 uint32_t SavedOrderHintsForAllReferences32 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[3][2] 2330 uint32_t SavedOrderHintsForAllReferences33 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[3][3] 2331 }; 2332 uint32_t Value; 2333 } DW7; 2334 union 2335 { 2336 struct 2337 { 2338 uint32_t SavedOrderHintsForAllReferences34 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[3][4] 2339 uint32_t SavedOrderHintsForAllReferences35 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[3][5] 2340 uint32_t SavedOrderHintsForAllReferences36 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[3][6] 2341 uint32_t Reserved280 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2342 }; 2343 uint32_t Value; 2344 } DW8; 2345 union 2346 { 2347 struct 2348 { 2349 uint32_t SavedOrderHintsForAllReferences40 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[4][0] 2350 uint32_t SavedOrderHintsForAllReferences41 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[4][1] 2351 uint32_t SavedOrderHintsForAllReferences42 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[4][2] 2352 uint32_t SavedOrderHintsForAllReferences43 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[4][3] 2353 }; 2354 uint32_t Value; 2355 } DW9; 2356 union 2357 { 2358 struct 2359 { 2360 uint32_t SavedOrderHintsForAllReferences44 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[4][4] 2361 uint32_t SavedOrderHintsForAllReferences45 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[4][5] 2362 uint32_t SavedOrderHintsForAllReferences46 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[4][6] 2363 uint32_t Reserved344 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2364 }; 2365 uint32_t Value; 2366 } DW10; 2367 union 2368 { 2369 struct 2370 { 2371 uint32_t SavedOrderHintsForAllReferences50 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[5][0] 2372 uint32_t SavedOrderHintsForAllReferences51 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[5][1] 2373 uint32_t SavedOrderHintsForAllReferences52 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[5][2] 2374 uint32_t SavedOrderHintsForAllReferences53 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[5][3] 2375 }; 2376 uint32_t Value; 2377 } DW11; 2378 union 2379 { 2380 struct 2381 { 2382 uint32_t SavedOrderHintsForAllReferences54 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[5][4] 2383 uint32_t SavedOrderHintsForAllReferences55 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[5][5] 2384 uint32_t SavedOrderHintsForAllReferences56 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[5][6] 2385 uint32_t Reserved408 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2386 }; 2387 uint32_t Value; 2388 } DW12; 2389 union 2390 { 2391 struct 2392 { 2393 uint32_t SavedOrderHintsForAllReferences60 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[6][0] 2394 uint32_t SavedOrderHintsForAllReferences61 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[6][1] 2395 uint32_t SavedOrderHintsForAllReferences62 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[6][2] 2396 uint32_t SavedOrderHintsForAllReferences63 : __CODEGEN_BITFIELD(24, 31); //!< Saved Order Hints for All References[6][3] 2397 }; 2398 uint32_t Value; 2399 } DW13; 2400 union 2401 { 2402 struct 2403 { 2404 uint32_t SavedOrderHintsForAllReferences64 : __CODEGEN_BITFIELD(0, 7); //!< Saved Order Hints for All References[6][4] 2405 uint32_t SavedOrderHintsForAllReferences65 : __CODEGEN_BITFIELD(8, 15); //!< Saved Order Hints for All References[6][5] 2406 uint32_t SavedOrderHintsForAllReferences66 : __CODEGEN_BITFIELD(16, 23); //!< Saved Order Hints for All References[6][6] 2407 uint32_t Reserved472 : __CODEGEN_BITFIELD(24, 31); //!< Reserved 2408 }; 2409 uint32_t Value; 2410 } DW14; 2411 2412 //! \name Local enumerations 2413 2414 enum MEDIA_INSTRUCTION_COMMAND 2415 { 2416 MEDIA_INSTRUCTION_COMMAND_AVPINTERPREDSTATE = 18, //!< No additional details 2417 }; 2418 2419 //! \brief MEDIA_INSTRUCTION_OPCODE 2420 //! \details 2421 //! Codec/Engine Name = AVP = 3h 2422 enum MEDIA_INSTRUCTION_OPCODE 2423 { 2424 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2425 }; 2426 2427 enum PIPELINE_TYPE 2428 { 2429 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2430 }; 2431 2432 enum COMMAND_TYPE 2433 { 2434 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2435 }; 2436 2437 //! \name Initializations 2438 2439 //! \brief Explicit member initialization function 2440 AVP_INTER_PRED_STATE_CMD(); 2441 2442 static const size_t dwSize = 15; 2443 static const size_t byteSize = 60; 2444 }; 2445 2446 //! 2447 //! \brief AVP_PAK_INSERT_OBJECT 2448 //! \details 2449 //! It is an encoder only command, operating at bitstream level, before and 2450 //! after SliceData compressed bitstream. It is setup by the header and tail 2451 //! present flags in the Slice State command. If these flags are set and no 2452 //! subsequent PAK_INSERT_OBJECT commands are issued, the pipeline will 2453 //! hang. 2454 //! 2455 //! The AVP_ PAK_ INSERT _OBJECT command supports both inline and indirect 2456 //! data payload, but only one can be active at any time. It is issued to 2457 //! insert a chunk of bits (payload) into the current compressed bitstream 2458 //! output buffer (specified in the HCP_PAK-BSE Object Base Address field of 2459 //! the HCP_IND_OBJ_BASE_ADDR_STATE command) starting at its current write 2460 //! pointer bit position. Hardware will keep track of this write pointer's 2461 //! byte position and the associated next bit insertion position index. 2462 //! 2463 //! It is a variable length command when the payload (data to be inserted) 2464 //! is presented as inline data within the command itself. The inline 2465 //! payload is a multiple of 32-bit (1 DW), as the data bus to the 2466 //! compressed bitstream output buffer is 32-bit wide. 2467 //! 2468 //! The payload data is required to be byte aligned on the left (first 2469 //! transmitted bit order) and may or may not be byte aligned on the right 2470 //! (last transmitted bits). The command will specify the bit offset of the 2471 //! last valid DW. Note that : Stitch Command is used if the beginning 2472 //! position of data is in bit position. When PAK Insert Command is used the 2473 //! beginning position must be in byte position. 2474 //! 2475 //! Multiple insertion commands can be issued back to back in a series. It 2476 //! is host software's responsibility to make sure their corresponding data 2477 //! will properly stitch together to form a valid bitstream. 2478 //! 2479 //! Internally, HCP hardware will keep track of the very last two bytes' 2480 //! (the very last byte can be a partial byte) values of the previous 2481 //! insertion. It is required that the next Insertion Object Command or the 2482 //! next PAK Object Command to perform the start code emulation sequence 2483 //! check and prevention 0x03 byte insertion with this end condition of the 2484 //! previous insertion. 2485 //! 2486 //! The payload data may have already been processed for start code 2487 //! emulation byte insertion, except the possibility of the last 2 bytes 2488 //! plus the very last partial byte (if any). Hence, when hardware 2489 //! performing the concatenation of multiple consecutive insertion commands, 2490 //! or concatenation of an insertion command and a PAK object command, it 2491 //! must check and perform the necessary start code emulation byte insert at 2492 //! the junction. 2493 //! 2494 //! Data to be inserted can be a valid NAL units or a partial NAL unit. It 2495 //! can be any encoded syntax elements bit data before the encoded Slice 2496 //! Data (PAK Object Command) of the current Slice - SPS NAL, PPS NAL, SEI 2497 //! NAL and Other Non-Slice NAL, Leading_Zero_8_bits (as many bytes as there 2498 //! is), Start Code , Slice Header. Any encoded syntax elements bit data 2499 //! after the encoded Slice Data (PAK Object Command) of the current Slice 2500 //! and prior to the next encoded Slice Data of the next Slice or prior to 2501 //! the end of the bitstream, whichever comes first Cabac_Zero_Word or 2502 //! Trailing_Zero_8bits (as many bytes as there is). 2503 //! 2504 //! Certain NAL unit has a minimum byte size requirement. As such the 2505 //! hardware will optionally (enabled by SLICE STATE Command) determines the 2506 //! number of CABAC_ZERO_WORD to be inserted to the end of the current NAL, 2507 //! based on the minimum byte size of a NAL and the actual bin count of the 2508 //! encoded Slice. Since prior to the CABAC_ZERO_WORD insertion, the RBSP or 2509 //! EBSP is already byte-aligned, so each CABAC_ZERO_WORD insertion is 2510 //! actually a 3-byte sequence 0x00 00 03. 2511 //! 2512 //! Context switch interrupt is not supported by this command. 2513 //! 2514 struct AVP_PAK_INSERT_OBJECT_CMD 2515 { 2516 union 2517 { 2518 struct 2519 { 2520 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< Dword Length 2521 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2522 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2523 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2524 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2525 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 2526 }; 2527 uint32_t Value; 2528 } DW0; 2529 union 2530 { 2531 struct 2532 { 2533 uint32_t Reserved0 : __CODEGEN_BITFIELD(0, 0); //!< Reserved 2534 uint32_t EndofsliceflagLastdstdatainsertcommandflag : __CODEGEN_BITFIELD(1, 1); //!< EndOfSliceFlag - LastDstDataInsertCommandFlag 2535 uint32_t LastheaderflagLastsrcheaderdatainsertcommandflag : __CODEGEN_BITFIELD(2, 2); //!< LastHeaderFlag - LastSrcHeaderDataInsertCommandFlag 2536 uint32_t Reserved3 : __CODEGEN_BITFIELD(3, 7); //!< EMULATIONFLAG_EMULATIONBYTEBITSINSERTENABLE 2537 uint32_t DatabitsinlastdwSrcdataendingbitinclusion50 : __CODEGEN_BITFIELD(8, 13); //!< DataBitsInLastDW - SrCDataEndingBitInclusion[5:0] 2538 uint32_t Reserved14 : __CODEGEN_BITFIELD(14, 15); //!< Slice Header Indicator 2539 uint32_t DatabyteoffsetSrcdatastartingbyteoffset10 : __CODEGEN_BITFIELD(16, 17); //!< DataByteOffset - SrcDataStartingByteOffset[1:0] 2540 uint32_t Reserved50 : __CODEGEN_BITFIELD(18, 30); //!< Reserved 2541 uint32_t IndirectPayloadEnable : __CODEGEN_BITFIELD(31, 31); //!< INDIRECT_PAYLOAD_ENABLE 2542 }; 2543 uint32_t Value; 2544 } DW1; 2545 2546 //! \name Local enumerations 2547 2548 enum MEDIA_INSTRUCTION_COMMAND 2549 { 2550 MEDIA_INSTRUCTION_COMMAND_AVPPAKINSERTOBJECT = 34, //!< No additional details 2551 }; 2552 2553 //! \brief MEDIA_INSTRUCTION_OPCODE 2554 //! \details 2555 //! Codec/Engine Name = HCP = 3h 2556 enum MEDIA_INSTRUCTION_OPCODE 2557 { 2558 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2559 }; 2560 2561 enum PIPELINE_TYPE 2562 { 2563 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2564 }; 2565 2566 enum COMMAND_TYPE 2567 { 2568 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2569 }; 2570 2571 //! \brief INDIRECT_PAYLOAD_ENABLE 2572 //! \details 2573 //! <p>Only one of these two payload modes can be active at any time.</p> 2574 //! <p>When Slice Size Conformance is enable the Payload(header) must be 2575 //! inline only so this bit set to MBZ.</p> 2576 enum INDIRECT_PAYLOAD_ENABLE 2577 { 2578 INDIRECT_PAYLOAD_ENABLE_INLINEPAYLOADISUSED = 0, //!< No additional details 2579 INDIRECT_PAYLOAD_ENABLE_INDIRECTPAYLOADISUSED = 1, //!< No additional details 2580 }; 2581 2582 //! \name Initializations 2583 2584 //! \brief Explicit member initialization function 2585 AVP_PAK_INSERT_OBJECT_CMD(); 2586 2587 static const size_t dwSize = 2; 2588 static const size_t byteSize = 8; 2589 }; 2590 2591 //! 2592 //! \brief AVP_FILM_GRAIN_STATE 2593 //! \details 2594 //! This is a AV1 Decoder only command. 2595 //! Film Grain Synthesis on the decoder side is an out of loop processing. 2596 //! 2597 struct AVP_FILM_GRAIN_STATE_CMD 2598 { 2599 union 2600 { 2601 struct 2602 { 2603 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 2604 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2605 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2606 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2607 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2608 uint32_t Type : __CODEGEN_BITFIELD(29, 31); //!< TYPE 2609 }; 2610 uint32_t Value; 2611 } DW0; 2612 union 2613 { 2614 struct 2615 { 2616 uint32_t GrainRandomSeed : __CODEGEN_BITFIELD(0, 15); //!< Grain Random Seed 2617 uint32_t McIdentityFlag : __CODEGEN_BITFIELD(16, 16); //!< MC Identity Flag 2618 uint32_t ClipToRestrictedRangeFlag : __CODEGEN_BITFIELD(17, 17); //!< Clip To Restricted Range Flag 2619 uint32_t Reserved50 : __CODEGEN_BITFIELD(18, 19); //!< Reserved MBZ 2620 uint32_t NumberOfLumaPoints : __CODEGEN_BITFIELD(20, 23); //!< Number of Luma Points 2621 uint32_t NumberOfChromaCbPoints : __CODEGEN_BITFIELD(24, 27); //!< Number of Chroma Cb Points 2622 uint32_t NumberOfChromaCrPoints : __CODEGEN_BITFIELD(28, 31); //!< Number of Chroma Cr Points 2623 }; 2624 uint32_t Value; 2625 } DW1; 2626 union 2627 { 2628 struct 2629 { 2630 uint32_t GrainScalingMinus8 : __CODEGEN_BITFIELD(0, 1); //!< Grain Scaling Minus8 2631 uint32_t ArCoeffLag : __CODEGEN_BITFIELD(2, 3); //!< AR Coeff Lag 2632 uint32_t ArCoeffShiftMinus6 : __CODEGEN_BITFIELD(4, 5); //!< AR Coeff Shift Minus6 2633 uint32_t GrainScaleShift : __CODEGEN_BITFIELD(6, 7); //!< Grain Scale Shift 2634 uint32_t GrainNoiseOverlapFlag : __CODEGEN_BITFIELD(8, 8); //!< Grain Noise Overlap Flag 2635 uint32_t Reserved73 : __CODEGEN_BITFIELD(9, 30); //!< Reserved MBZ 2636 uint32_t ChromaScalingFromLumaFlag : __CODEGEN_BITFIELD(31, 31); //!< Chroma Scaling From Luma Flag 2637 }; 2638 uint32_t Value; 2639 } DW2; 2640 uint32_t PointLumaValueI0To13[4]; //!< Point Luma Value[i=0 to 13] 2641 uint32_t PointLumaScalingI0To13[4]; //!< Point Luma Scaling[i=0 to 13] 2642 uint32_t PointCbValueI0To9[3]; //!< Point CB Value[i=0 to 9] 2643 uint32_t PointCbScalingI0To9[3]; //!< Point CB Scaling[i=0 to 9] 2644 uint32_t PointCrValueI0To9[3]; //!< Point CR Value[i=0 to 9] 2645 uint32_t PointCrScalingI0To9[3]; //!< Point CR Scaling[i=0 to 9] 2646 uint32_t ArCoeffLumaPlus128I023[6]; //!< AR Coeff Luma Plus128[i=0.. 23] 2647 uint32_t ArCoeffChromaCbPlus128I024[7]; //!< AR Coeff Chroma CB Plus128[i=0.. 24] 2648 uint32_t ArCoeffChromaCrPlus128I024[7]; //!< AR Coeff Chroma CR Plus128[i=0.. 24] 2649 union 2650 { 2651 struct 2652 { 2653 uint32_t CbMult : __CODEGEN_BITFIELD(0, 7); //!< CB Mult 2654 uint32_t CbLumaMult : __CODEGEN_BITFIELD(8, 15); //!< CB Luma Mult 2655 uint32_t CbOffset : __CODEGEN_BITFIELD(16, 24); //!< CB Offset 2656 uint32_t Reserved1401 : __CODEGEN_BITFIELD(25, 31); //!< Reserved MBZ 2657 }; 2658 uint32_t Value; 2659 } DW43; 2660 union 2661 { 2662 struct 2663 { 2664 uint32_t CrMult : __CODEGEN_BITFIELD(0, 7); //!< CR Mult 2665 uint32_t CrLumaMult : __CODEGEN_BITFIELD(8, 15); //!< CR Luma Mult 2666 uint32_t CrOffset : __CODEGEN_BITFIELD(16, 24); //!< CR Offset 2667 uint32_t Reserved1433 : __CODEGEN_BITFIELD(25, 31); //!< Reserved MBZ 2668 }; 2669 uint32_t Value; 2670 } DW44; 2671 2672 //! \name Local enumerations 2673 2674 enum MEDIA_INSTRUCTION_COMMAND 2675 { 2676 MEDIA_INSTRUCTION_COMMAND_AVPFILMGRAINSTATE = 52, //!< No additional details 2677 }; 2678 2679 //! \brief MEDIA_INSTRUCTION_OPCODE 2680 //! \details 2681 //! Codec/Engine Name = AV1 = 3h 2682 enum MEDIA_INSTRUCTION_OPCODE 2683 { 2684 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2685 }; 2686 2687 enum PIPELINE_TYPE 2688 { 2689 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2690 }; 2691 2692 enum TYPE 2693 { 2694 TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2695 }; 2696 2697 //! \name Initializations 2698 2699 //! \brief Explicit member initialization function 2700 AVP_FILM_GRAIN_STATE_CMD(); 2701 2702 static const size_t dwSize = 45; 2703 static const size_t byteSize = 180; 2704 }; 2705 2706 //! 2707 //! \brief AVP_PAK_OBJECT 2708 //! \details 2709 //! 2710 //! 2711 struct AVP_PAK_OBJECT_CMD 2712 { 2713 union 2714 { 2715 struct 2716 { 2717 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 2718 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2719 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2720 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2721 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2722 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 2723 }; 2724 uint32_t Value; 2725 } DW0; 2726 union 2727 { 2728 struct 2729 { 2730 uint32_t CurrentSbXAddr : __CODEGEN_BITFIELD(0, 15); //!< Current SB X Addr 2731 uint32_t CurrentSbYAddr : __CODEGEN_BITFIELD(16, 31); //!< Current SB Y Addr 2732 }; 2733 uint32_t Value; 2734 } DW1; 2735 union 2736 { 2737 struct 2738 { 2739 uint32_t SseClassid32X320 : __CODEGEN_BITFIELD(0, 3); //!< SSE ClassID 32x32_0 2740 uint32_t SseClassid32X321 : __CODEGEN_BITFIELD(4, 7); //!< SSE ClassID 32x32_1 2741 uint32_t SseClassid32X322 : __CODEGEN_BITFIELD(8, 11); //!< SSE ClassID 32x32_2 2742 uint32_t SseClassid32X323 : __CODEGEN_BITFIELD(12, 15); //!< SSE ClassID 32x32_3 2743 uint32_t SbforcezerocoeffTimeBudgetOverflowOccurred : __CODEGEN_BITFIELD(16, 16); //!< SBForceZeroCoeff/Time Budget Overflow Occurred 2744 uint32_t Reserved81 : __CODEGEN_BITFIELD(17, 23); //!< Reserved 2745 uint32_t CuCountMinus1 : __CODEGEN_BITFIELD(24, 29); //!< CU count minus1 2746 uint32_t Reserved94 : __CODEGEN_BITFIELD(30, 30); //!< Reserved 2747 uint32_t Lastsboftile : __CODEGEN_BITFIELD(31, 31); //!< LastSBofTile 2748 }; 2749 uint32_t Value; 2750 } DW2; 2751 union 2752 { 2753 struct 2754 { 2755 uint32_t SuperblockLevelDeltaQp : __CODEGEN_BITFIELD(0, 10); //!< SuperBlock Level Delta QP 2756 uint32_t Reserved107 : __CODEGEN_BITFIELD(11, 31); //!< Reserved 2757 }; 2758 uint32_t Value; 2759 } DW3; 2760 union 2761 { 2762 struct 2763 { 2764 uint32_t SuperblockLevelLumaYDeblockerDeltaFilterLevelVertical : __CODEGEN_BITFIELD(0, 6); //!< SuperBlock Level Luma Y Deblocker Delta Filter Level Vertical 2765 uint32_t Reserved135 : __CODEGEN_BITFIELD(7, 7); //!< Reserved 2766 uint32_t SuperblockLevelLumaYDeblockerDeltaFilterLevelHorizontal : __CODEGEN_BITFIELD(8, 14); //!< SuperBlock Level Luma Y Deblocker Delta Filter Level Horizontal 2767 uint32_t Reserved143 : __CODEGEN_BITFIELD(15, 15); //!< Reserved 2768 uint32_t SuperblockLevelChromaUDeblockerDeltaFilterLevel : __CODEGEN_BITFIELD(16, 22); //!< SuperBlock Level Chroma U Deblocker Delta Filter Level 2769 uint32_t Reserved151 : __CODEGEN_BITFIELD(23, 23); //!< Reserved 2770 uint32_t SuperblockLevelChromaVDeblockerDeltaFilterLevel : __CODEGEN_BITFIELD(24, 30); //!< SuperBlock Level Chroma V Deblocker Delta Filter Level 2771 uint32_t Reserved159 : __CODEGEN_BITFIELD(31, 31); //!< Reserved 2772 }; 2773 uint32_t Value; 2774 } DW4; 2775 2776 //! \name Local enumerations 2777 2778 enum MEDIA_INSTRUCTION_COMMAND 2779 { 2780 MEDIA_INSTRUCTION_COMMAND_AVPPAKOBJECT = 33, //!< No additional details 2781 }; 2782 2783 //! \brief MEDIA_INSTRUCTION_OPCODE 2784 //! \details 2785 //! Codec/Engine Name = AV1 = 3h 2786 enum MEDIA_INSTRUCTION_OPCODE 2787 { 2788 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAME = 3, //!< No additional details 2789 }; 2790 2791 enum PIPELINE_TYPE 2792 { 2793 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2794 }; 2795 2796 enum COMMAND_TYPE 2797 { 2798 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2799 }; 2800 2801 //! \name Initializations 2802 2803 //! \brief Explicit member initialization function 2804 AVP_PAK_OBJECT_CMD(); 2805 2806 static const size_t dwSize = 5; 2807 static const size_t byteSize = 20; 2808 }; 2809 2810 //! 2811 //! \brief AVP_VD_CONTROL_STATE 2812 //! \details 2813 //! For AVP, it is selected with the Media Instruction Opcode "3h". 2814 //! 2815 //! This command is used to modify the control of HCP pipe. It can be 2816 //! inserted anywhere within a frame. It can be inserted multiple times 2817 //! within a frame as well. 2818 //! 2819 //! This command is also used for AVP pipe. 2820 //! 2821 struct AVP_VD_CONTROL_STATE_CMD 2822 { 2823 union 2824 { 2825 struct 2826 { 2827 uint32_t DwordLength : __CODEGEN_BITFIELD(0, 11); //!< DWORD_LENGTH 2828 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15); //!< Reserved 2829 uint32_t MediaInstructionCommand : __CODEGEN_BITFIELD(16, 22); //!< MEDIA_INSTRUCTION_COMMAND 2830 uint32_t MediaInstructionOpcode : __CODEGEN_BITFIELD(23, 26); //!< MEDIA_INSTRUCTION_OPCODE 2831 uint32_t PipelineType : __CODEGEN_BITFIELD(27, 28); //!< PIPELINE_TYPE 2832 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31); //!< COMMAND_TYPE 2833 }; 2834 uint32_t Value; 2835 } DW0; 2836 VD_CONTROL_STATE_BODY_CMD VdControlStateBody; //!< DW1..2, VD Control State Body 2837 2838 //! \name Local enumerations 2839 2840 enum MEDIA_INSTRUCTION_COMMAND 2841 { 2842 MEDIA_INSTRUCTION_COMMAND_VDCONTROLSTATE = 10, //!< No additional details 2843 }; 2844 2845 //! \brief MEDIA_INSTRUCTION_OPCODE 2846 //! \details 2847 //! Codec/EngineName = AVP = 3h 2848 enum MEDIA_INSTRUCTION_OPCODE 2849 { 2850 MEDIA_INSTRUCTION_OPCODE_CODECENGINENAMEFORAVP = 3, //!< No additional details 2851 }; 2852 2853 enum PIPELINE_TYPE 2854 { 2855 PIPELINE_TYPE_UNNAMED2 = 2, //!< No additional details 2856 }; 2857 2858 enum COMMAND_TYPE 2859 { 2860 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2861 }; 2862 2863 //! \name Initializations 2864 2865 //! \brief Explicit member initialization function 2866 AVP_VD_CONTROL_STATE_CMD(); 2867 2868 static const size_t dwSize = 3; 2869 static const size_t byteSize = 12; 2870 }; 2871 2872 MEDIA_CLASS_DEFINE_END(mhw__vdbox__avp__xe_lpm_plus_base__v1__Cmd) 2873 }; 2874 } // namespace v1 2875 } // namespace xe_lpm_plus_base 2876 } // namespace avp 2877 } // namespace vdbox 2878 } // namespace mhw 2879 2880 #pragma pack() 2881 2882 #endif // __MHW_VDBOX_AVP_HWCMD_XE2_HPM_H__ 2883