1 /*
2 * Copyright (c) 2014-2018, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mhw_state_heap_g9.c
24 //! \brief This modules implements HW interface layer to be used on all platforms on all operating systems/DDIs, across MHW components.
25 //!
26 #include "mhw_state_heap_g9.h"
27 #include "mhw_cp_interface.h"
28 #include "mhw_render_hwcmd_g9_X.h"
29 #include "mhw_state_heap_hwcmd_g9_X.h"
30
MHW_STATE_HEAP_INTERFACE_G9_X(PMOS_INTERFACE pInputOSInterface,int8_t bDynamicMode)31 MHW_STATE_HEAP_INTERFACE_G9_X::MHW_STATE_HEAP_INTERFACE_G9_X(
32 PMOS_INTERFACE pInputOSInterface, int8_t bDynamicMode):
33 MHW_STATE_HEAP_INTERFACE_GENERIC(pInputOSInterface, bDynamicMode)
34 {
35 m_wBtIdxAlignment = m_mhwNumBindingTableEntryOffset;
36 m_wIdAlignment = (1 << m_mhwGenericOffsetShift);
37 m_wCurbeAlignment = (1 << m_mhwGenericOffsetShift);
38
39 m_dwSizeSurfaceState = MOS_ALIGN_CEIL(mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
40 m_dwSizeSurfaceStateAdv = MOS_ALIGN_CEIL(mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
41 m_dwMaxSurfaceStateSize = MOS_MAX(m_dwSizeSurfaceState, m_dwSizeSurfaceStateAdv);
42 m_wSizeOfInterfaceDescriptor = mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD::byteSize;
43 m_wSizeOfCmdInterfaceDescriptorData = MOS_ALIGN_CEIL(m_wSizeOfInterfaceDescriptor, m_wIdAlignment);
44 m_wSizeOfCmdSamplerState = mhw_state_heap_g9_X::SAMPLER_STATE_CMD::byteSize;
45
46 InitHwSizes();
47
48 }
49
~MHW_STATE_HEAP_INTERFACE_G9_X()50 MHW_STATE_HEAP_INTERFACE_G9_X::~MHW_STATE_HEAP_INTERFACE_G9_X()
51 {
52 MHW_FUNCTION_ENTER;
53 }
54
InitHwSizes()55 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G9_X::InitHwSizes()
56 {
57 m_HwSizes.dwSizeMediaObjectHeaderCmd = mhw_render_g9_X::MEDIA_OBJECT_CMD::byteSize;
58 m_HwSizes.dwSizeSurfaceState = MOS_ALIGN_CEIL(mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
59 m_HwSizes.dwSizeSurfaceStateAvs = MOS_ALIGN_CEIL(mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
60 m_HwSizes.dwMaxSizeSurfaceState = MOS_MAX(m_HwSizes.dwSizeSurfaceState, m_HwSizes.dwSizeSurfaceStateAvs);
61 m_HwSizes.dwSizeBindingTableState = mhw_state_heap_g9_X::BINDING_TABLE_STATE_CMD::byteSize;
62 m_HwSizes.dwSizeSamplerState = mhw_state_heap_g9_X::SAMPLER_STATE_CMD::byteSize;
63 m_HwSizes.dwSizeSamplerIndirectState = mhw_state_heap_g9_X::SAMPLER_INDIRECT_STATE_CMD::byteSize;
64 m_HwSizes.dwSizeSamplerStateVA = mhw_state_heap_g9_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD::byteSize; // MinMaxFilter, Erode, Dilate functions
65 m_HwSizes.dwSizeSamplerStateVAConvolve = mhw_state_heap_g9_X::SAMPLER_STATE_8x8_CONVOLVE_CMD::byteSize;
66 m_HwSizes.dwSizeSamplerStateTable8x8 = mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_CMD::byteSize - 16 * sizeof(uint32_t); // match old definitions to table size
67 m_HwSizes.dwSizeSampler8x8Table =
68 MOS_ALIGN_CEIL(m_HwSizes.dwSizeSamplerStateTable8x8, MHW_SAMPLER_STATE_ALIGN);
69 m_HwSizes.dwSizeSamplerStateAvs =
70 MOS_ALIGN_CEIL(mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_CMD::byteSize, MHW_SAMPLER_STATE_AVS_ALIGN_MEDIA);
71 m_HwSizes.dwSizeInterfaceDescriptor = mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD::byteSize;
72 m_HwSizes.dwSizeMediaWalkerBlock = 16;
73
74 return MOS_STATUS_SUCCESS;
75 }
76
SetInterfaceDescriptorEntry(PMHW_ID_ENTRY_PARAMS pParams)77 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G9_X::SetInterfaceDescriptorEntry(
78 PMHW_ID_ENTRY_PARAMS pParams)
79 {
80 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
81
82 MHW_FUNCTION_ENTER;
83
84 //------------------------------------
85 MHW_MI_CHK_NULL(pParams);
86 //------------------------------------
87
88 // Ensures that the Media ID base is correct
89 MHW_ASSERT(MOS_IS_ALIGNED(pParams->dwMediaIdOffset, m_wIdAlignment));
90
91 uint8_t *pStateHeapBase;
92 if (pParams->pGeneralStateHeap)
93 {
94 pStateHeapBase = (uint8_t*)pParams->pGeneralStateHeap->pvLockedHeap;
95 }
96 else
97 {
98 pStateHeapBase = (uint8_t*)(GetDSHPointer()->pvLockedHeap);
99 }
100
101 mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD *pInterfaceDescriptor;
102 pInterfaceDescriptor = (mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD *)
103 (pStateHeapBase + // State Heap Base
104 pParams->dwMediaIdOffset + // Offset to first Media ID
105 pParams->iMediaId * m_wSizeOfInterfaceDescriptor); // Offset to current ID
106 *pInterfaceDescriptor = mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD();
107
108 pInterfaceDescriptor->DW0.KernelStartPointer = pParams->dwKernelOffset >> MHW_KERNEL_OFFSET_SHIFT;
109 pInterfaceDescriptor->DW3.SamplerStatePointer = pParams->dwSamplerOffset >> MHW_SAMPLER_SHIFT;
110 pInterfaceDescriptor->DW3.SamplerCount = pParams->dwSamplerCount;
111 pInterfaceDescriptor->DW4.BindingTablePointer = MOS_ROUNDUP_SHIFT(pParams->dwBindingTableOffset, MHW_BINDING_TABLE_ID_SHIFT);
112 pInterfaceDescriptor->DW5.ConstantUrbEntryReadOffset = pParams->iCurbeOffset >> MHW_CURBE_SHIFT;
113 pInterfaceDescriptor->DW5.ConstantIndirectUrbEntryReadLength = MOS_ROUNDUP_SHIFT(pParams->iCurbeLength, MHW_CURBE_SHIFT);
114 pInterfaceDescriptor->DW6.GlobalBarrierEnable = pParams->bGlobalBarrierEnable;
115 pInterfaceDescriptor->DW6.BarrierEnable = pParams->bBarrierEnable;
116 pInterfaceDescriptor->DW6.NumberOfThreadsInGpgpuThreadGroup = pParams->dwNumberofThreadsInGPGPUGroup;
117 pInterfaceDescriptor->DW6.SharedLocalMemorySize = pParams->dwSharedLocalMemorySize;
118 pInterfaceDescriptor->DW7.CrossThreadConstantDataReadLength = pParams->iCrsThdConDataRdLn >> MHW_THRD_CON_DATA_RD_SHIFT;
119
120 return eStatus;
121 }
122
AddInterfaceDescriptorData(PMHW_ID_ENTRY_PARAMS pParams)123 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G9_X::AddInterfaceDescriptorData(
124 PMHW_ID_ENTRY_PARAMS pParams)
125 {
126 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
127
128 MHW_FUNCTION_ENTER;
129
130 //------------------------------------
131 MHW_MI_CHK_NULL(pParams);
132 //------------------------------------
133
134 // Ensures that the Media ID base is correct
135 MHW_ASSERT(MOS_IS_ALIGNED(pParams->dwMediaIdOffset, m_wIdAlignment));
136
137 uint32_t offset = pParams->dwMediaIdOffset + pParams->iMediaId * m_wSizeOfInterfaceDescriptor;
138
139 mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD *pInterfaceDescriptor;
140 pInterfaceDescriptor = (mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD *)MOS_AllocMemory(sizeof(mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD));
141 MHW_MI_CHK_NULL(pInterfaceDescriptor);
142 *pInterfaceDescriptor = mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD();
143
144 pInterfaceDescriptor->DW0.KernelStartPointer = pParams->dwKernelOffset >> MHW_KERNEL_OFFSET_SHIFT;
145 pInterfaceDescriptor->DW3.SamplerStatePointer = pParams->dwSamplerOffset >> MHW_SAMPLER_SHIFT;
146 pInterfaceDescriptor->DW3.SamplerCount = pParams->dwSamplerCount;
147 pInterfaceDescriptor->DW4.BindingTablePointer = MOS_ROUNDUP_SHIFT(pParams->dwBindingTableOffset, MHW_BINDING_TABLE_ID_SHIFT);
148 pInterfaceDescriptor->DW5.ConstantUrbEntryReadOffset = pParams->iCurbeOffset >> MHW_CURBE_SHIFT;
149 pInterfaceDescriptor->DW5.ConstantIndirectUrbEntryReadLength = MOS_ROUNDUP_SHIFT(pParams->iCurbeLength, MHW_CURBE_SHIFT);
150 pInterfaceDescriptor->DW6.GlobalBarrierEnable = pParams->bGlobalBarrierEnable;
151 pInterfaceDescriptor->DW6.BarrierEnable = pParams->bBarrierEnable;
152 pInterfaceDescriptor->DW6.NumberOfThreadsInGpgpuThreadGroup = pParams->dwNumberofThreadsInGPGPUGroup;
153 pInterfaceDescriptor->DW6.SharedLocalMemorySize = pParams->dwSharedLocalMemorySize;
154 pInterfaceDescriptor->DW7.CrossThreadConstantDataReadLength = pParams->iCrsThdConDataRdLn >> MHW_THRD_CON_DATA_RD_SHIFT;
155
156 // need to subtract memory block's offset in current state heap for AddData API
157 offset -= pParams->memoryBlock->GetOffset();
158 pParams->memoryBlock->AddData(pInterfaceDescriptor, offset,
159 sizeof(mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD));
160
161 MOS_SafeFreeMemory(pInterfaceDescriptor);
162
163 return eStatus;
164 }
165
SetSurfaceState(PMHW_KERNEL_STATE pKernelState,PMOS_COMMAND_BUFFER pCmdBuffer,uint32_t dwNumSurfaceStatesToSet,PMHW_RCS_SURFACE_PARAMS pParams)166 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G9_X::SetSurfaceState(
167 PMHW_KERNEL_STATE pKernelState,
168 PMOS_COMMAND_BUFFER pCmdBuffer,
169 uint32_t dwNumSurfaceStatesToSet,
170 PMHW_RCS_SURFACE_PARAMS pParams)
171 {
172 PMOS_INTERFACE pOsInterface;
173 uint8_t *pIndirectState = nullptr;
174 MHW_RESOURCE_PARAMS ResourceParams;
175 uint32_t uiIndirectStateOffset = 0, uiIndirectStateSize = 0;
176 PMHW_STATE_HEAP pStateHeap;
177 uint32_t dwSurfaceType = GFX3DSTATE_SURFACETYPE_NULL; // GFX3DSTATE_SURFACETYPE
178 uint32_t i; // Plane Index
179 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
180
181 MHW_FUNCTION_ENTER;
182
183 MHW_MI_CHK_NULL(pParams);
184 MHW_MI_CHK_NULL(pParams->psSurface);
185 MOS_UNUSED(dwNumSurfaceStatesToSet);
186
187 if (pParams->dwNumPlanes >= MHW_MAX_SURFACE_PLANES)
188 {
189 MHW_ASSERTMESSAGE("Invalid plane number provided");
190 eStatus = MOS_STATUS_INVALID_PARAMETER;
191 return eStatus;
192 }
193
194 pOsInterface = m_pOsInterface;
195 pStateHeap = &m_SurfaceStateHeap;
196
197 MHW_MI_CHK_NULL(pOsInterface);
198 MHW_MI_CHK_STATUS(pOsInterface->pfnGetIndirectStatePointer(pOsInterface, &pIndirectState));
199 MHW_MI_CHK_STATUS(pOsInterface->pfnGetIndirectState(pOsInterface, &uiIndirectStateOffset, &uiIndirectStateSize));
200
201 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
202 ResourceParams.dwLsbNum = 0; // MHW_STATE_HEAP_SURFACE_STATE_SHIFT
203
204 for ( i = 0; i < pParams->dwNumPlanes; i++)
205 {
206 MHW_ASSERT_INVALID_BINDING_TABLE_IDX(pParams->dwBindingTableOffset[i]);
207 MHW_MI_CHK_NULL(pKernelState);
208 uint32_t u32SurfaceOffsetInSsh =
209 pKernelState->dwSshOffset + pKernelState->dwBindingTableSize + // offset within SSH to start of surfaces for this kernel
210 (m_HwSizes.dwMaxSizeSurfaceState * pParams->dwBindingTableOffset[i]); // offset to the current surface
211 if (u32SurfaceOffsetInSsh + m_HwSizes.dwMaxSizeSurfaceState > uiIndirectStateOffset)
212 {
213 MHW_ASSERTMESSAGE("Location requested for surface state is outside the bounds of SSH");
214 return MOS_STATUS_INVALID_PARAMETER;
215 }
216 uint8_t *pLocationOfSurfaceInSsh = (uint8_t*)
217 (pIndirectState + u32SurfaceOffsetInSsh);
218
219 if (pParams->bUseAdvState)
220 {
221 mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD *pCmd =
222 (mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD*)pLocationOfSurfaceInSsh;
223 MHW_MI_CHK_NULL(pCmd);
224 *pCmd = mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD();
225
226 pCmd->DW1.Width = (pParams->dwWidthToUse[i] == 0) ?
227 pParams->psSurface->dwWidth - 1 : pParams->dwWidthToUse[i] - 1;
228 pCmd->DW1.Height = (pParams->dwHeightToUse[i] == 0) ?
229 pParams->psSurface->dwHeight - 1: pParams->dwHeightToUse[i] - 1;
230 pCmd->DW1.CrVCbUPixelOffsetVDirection = pParams->Direction;
231
232 pCmd->DW2.SurfacePitch = pParams->psSurface->dwPitch - 1;
233 pCmd->DW2.SurfaceFormat = pParams->ForceSurfaceFormat[i];
234 pCmd->DW2.InterleaveChroma = pParams->bInterleaveChroma;
235
236 if (IS_Y_MAJOR_TILE_FORMAT(pParams->psSurface->TileType))
237 {
238 pCmd->DW2.TileMode = mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD::TILE_MODE_TILEMODEYMAJOR;
239 }
240 else if (pParams->psSurface->TileType == MOS_TILE_LINEAR)
241 {
242 pCmd->DW2.TileMode = mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD::TILE_MODE_TILEMODELINEAR;
243 }
244 else if (pParams->psSurface->TileType == MOS_TILE_X)
245 {
246 pCmd->DW2.TileMode = mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD::TILE_MODE_TILEMODEXMAJOR;
247 }
248
249 if(pParams->psSurface->bCompressible)
250 {
251 MHW_MI_CHK_STATUS(pOsInterface->pfnGetMemoryCompressionMode(pOsInterface, &pParams->psSurface->OsResource, (PMOS_MEMCOMP_STATE) &pParams->psSurface->CompressionMode));
252
253 pCmd->DW2.MemoryCompressionEnable =
254 (pParams->psSurface->CompressionMode == MOS_MMC_DISABLED) ? 0 : 1;
255 pCmd->DW2.MemoryCompressionMode =
256 (pParams->psSurface->CompressionMode == MOS_MMC_VERTICAL) ? 1 : 0;
257 }
258
259 pCmd->DW5.SurfaceMemoryObjectControlState = pParams->dwCacheabilityControl;
260
261 pCmd->DW5.TiledResourceMode = Mhw_ConvertToTRMode(pParams->psSurface->TileType);
262
263 if (i == MHW_U_PLANE) // AVS U plane
264 {
265 // Lockoffset is the offset from base address of Y plane to the origin of U/V plane.
266 // So, We can get XOffsetforU by Lockoffset % pSurface->dwPitch, and get YOffsetForU by Lockoffset / pSurface->dwPitch
267 /*pCmd->DW0.XOffset = pParams->psSurface->UPlaneOffset.iXOffset >> 2;
268 pCmd->DW0.YOffset = pParams->psSurface->UPlaneOffset.iYOffset >> 2;
269
270 pCmd->DW3.XOffsetforU = ((uint32_t)pParams->psSurface->UPlaneOffset.iLockSurfaceOffset % pSurface->dwPitch);
271 pCmd->DW3.YOffsetforU = ((uint32_t)pParams->psSurface->UPlaneOffset.iLockSurfaceOffset / pSurface->dwPitch);*/
272
273 pCmd->DW3.YOffsetForUCb = pParams->psSurface->UPlaneOffset.iYOffset;
274 }
275 else if (i == MHW_V_PLANE) // AVS V plane
276 {
277 pCmd->DW0.XOffset = pParams->psSurface->VPlaneOffset.iXOffset >> 2;
278 pCmd->DW0.YOffset = pParams->psSurface->VPlaneOffset.iYOffset >> 2;
279
280 //pCmd->DW4.XOffsetforV = ((uint32_t)pParams->psSurface->UPlaneOffset.iLockSurfaceOffset % pSurface->dwPitch);
281 //pCmd->DW4.YOffsetforV = ((uint32_t)pParams->psSurface->VPlaneOffset.iLockSurfaceOffset / pSurface->dwPitch);
282 }
283 else // AVS/DNDI Y plane
284 {
285 pCmd->DW3.XOffsetForUCb = pParams->dwXOffset[MHW_U_PLANE];
286 pCmd->DW3.YOffsetForUCb = pParams->dwYOffset[MHW_U_PLANE];
287 pCmd->DW4.XOffsetForVCr = pParams->dwXOffset[MHW_V_PLANE];
288 pCmd->DW4.YOffsetForVCr = pParams->dwYOffset[MHW_V_PLANE];
289 }
290
291 // Temporary solution for Codec.
292 pCmd->DW3.YOffsetForUCb = pParams->psSurface->UPlaneOffset.iYOffset;
293
294 ResourceParams.presResource = &pParams->psSurface->OsResource;
295 ResourceParams.dwOffset =
296 pParams->psSurface->dwOffset + pParams->dwBaseAddrOffset[i];
297 ResourceParams.pdwCmd = &(pCmd->DW6.Value);
298 ResourceParams.dwLocationInCmd = 6;
299 ResourceParams.bIsWritable = pParams->bIsWritable;
300 ResourceParams.dwOffsetInSSH =
301 uiIndirectStateOffset +
302 pKernelState->dwSshOffset +
303 pKernelState->dwBindingTableSize +
304 (pParams->dwBindingTableOffset[i] * m_dwMaxSurfaceStateSize);
305 ResourceParams.HwCommandType = MOS_SURFACE_STATE_ADV;
306
307 MHW_MI_CHK_STATUS(m_pfnAddResourceToCmd(
308 pOsInterface,
309 pCmdBuffer,
310 &ResourceParams));
311 }
312 else // 1D, 2D Surface
313 {
314 mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD *pCmd =
315 (mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD*)pLocationOfSurfaceInSsh;
316
317 mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD CmdInit;
318 // Add additional defaults specific to media
319 CmdInit.DW0.SurfaceHorizontalAlignment = 1;
320 CmdInit.DW0.SurfaceVerticalAlignment = 1;
321 CmdInit.DW7.ShaderChannelSelectAlpha = CmdInit.SHADER_CHANNEL_SELECT_ALPHA_ALPHA;
322 CmdInit.DW7.ShaderChannelSelectBlue = CmdInit.SHADER_CHANNEL_SELECT_BLUE_BLUE;
323 CmdInit.DW7.ShaderChannelSelectGreen = CmdInit.SHADER_CHANNEL_SELECT_GREEN_GREEN;
324 CmdInit.DW7.ShaderChannelSelectRed = CmdInit.SHADER_CHANNEL_SELECT_RED_RED;
325 *pCmd = CmdInit;
326
327 MHW_MI_CHK_STATUS(Mhw_SurfaceFormatToType(
328 pParams->ForceSurfaceFormat[i],
329 pParams->psSurface,
330 &dwSurfaceType));
331
332 pCmd->DW0.SurfaceType = dwSurfaceType;
333 pCmd->DW0.VerticalLineStride = pParams->bVertLineStride;
334 pCmd->DW0.VerticalLineStrideOffset = pParams->bVertLineStrideOffs;
335 pCmd->DW0.MediaBoundaryPixelMode = pParams->MediaBoundaryPixelMode;
336 pCmd->DW0.SurfaceFormat = pParams->ForceSurfaceFormat[i];
337
338 if (IS_Y_MAJOR_TILE_FORMAT(pParams->psSurface->TileType))
339 {
340 pCmd->DW0.TileMode = mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD::TILE_MODE_YMAJOR;
341 }
342 else if (pParams->psSurface->TileType == MOS_TILE_LINEAR)
343 {
344 pCmd->DW0.TileMode = mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD::TILE_MODE_LINEAR;
345 }
346 else if (pParams->psSurface->TileType == MOS_TILE_X)
347 {
348 pCmd->DW0.TileMode = mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD::TILE_MODE_XMAJOR;
349 }
350
351 pCmd->DW1.MemoryObjectControlState = pParams->dwCacheabilityControl;
352
353 pCmd->DW2.Width = (pParams->dwWidthToUse[i] == 0) ?
354 pParams->psSurface->dwWidth : pParams->dwWidthToUse[i];
355 pCmd->DW2.Height = (pParams->dwHeightToUse[i] == 0) ?
356 pParams->psSurface->dwHeight : pParams->dwHeightToUse[i];
357 pCmd->DW3.SurfacePitch = (pParams->dwPitchToUse[i] == 0) ?
358 pParams->psSurface->dwPitch : pParams->dwPitchToUse[i];
359
360 if(pParams->psSurface->bCompressible)
361 {
362 MHW_MI_CHK_STATUS(pOsInterface->pfnGetMemoryCompressionMode(pOsInterface, &pParams->psSurface->OsResource, (PMOS_MEMCOMP_STATE) &pParams->psSurface->CompressionMode));
363
364 pCmd->DW7.MemoryCompressionEnable =
365 (pParams->psSurface->CompressionMode == MOS_MMC_DISABLED) ? 0 : 1;
366 pCmd->DW7.MemoryCompressionMode =
367 (pParams->psSurface->CompressionMode == MOS_MMC_VERTICAL) ? 1 : 0;
368 }
369
370 pCmd->DW3.SurfacePitch--; // both for 1D & 2D surface
371 pCmd->DW3.Depth = pParams->psSurface->dwDepth;
372
373 if (dwSurfaceType == GFX3DSTATE_SURFACETYPE_BUFFER)
374 {
375 if (pCmd->DW0.TileMode)
376 {
377 MHW_ASSERTMESSAGE("1D surfaces should not be tiled!");
378 eStatus = MOS_STATUS_INVALID_PARAMETER;
379 return eStatus;
380 }
381 }
382 else // 2D Surface
383 {
384 pCmd->DW2.Width--;
385 pCmd->DW2.Height--;
386 pCmd->DW3.Depth--;
387 pCmd->DW5.XOffset = pParams->dwXOffset[i] >> 2;
388 pCmd->DW5.YOffset = pParams->dwYOffset[i] >> 2;
389 pCmd->DW5.TiledResourceMode = Mhw_ConvertToTRMode(pParams->psSurface->TileType);
390 }
391
392 ResourceParams.presResource = &pParams->psSurface->OsResource;
393 ResourceParams.dwOffset =
394 pParams->psSurface->dwOffset + pParams->dwBaseAddrOffset[i];
395 ResourceParams.pdwCmd = (pCmd->DW8_9.Value);
396 ResourceParams.dwLocationInCmd = 8;
397 ResourceParams.bIsWritable = pParams->bIsWritable;
398
399 ResourceParams.dwOffsetInSSH =
400 uiIndirectStateOffset +
401 pKernelState->dwSshOffset +
402 pKernelState->dwBindingTableSize +
403 (pParams->dwBindingTableOffset[i] * m_dwMaxSurfaceStateSize);
404 ResourceParams.HwCommandType = MOS_SURFACE_STATE;
405
406 MHW_MI_CHK_STATUS(m_pfnAddResourceToCmd(
407 pOsInterface,
408 pCmdBuffer,
409 &ResourceParams));
410 }
411 }
412
413 return eStatus;
414 }
415
SetSurfaceStateEntry(PMHW_SURFACE_STATE_PARAMS pParams)416 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G9_X::SetSurfaceStateEntry(
417 PMHW_SURFACE_STATE_PARAMS pParams)
418 {
419
420 if (!pParams)
421 return MOS_STATUS_INVALID_PARAMETER;
422
423 uint32_t TileMode = (pParams->bTiledSurface) ? ((pParams->bTileWalk == 0) ? 2 /*x-tile*/: 3 /*y-tile*/) : 0; /*linear*/
424
425 if (pParams->bUseAdvState)
426 {
427 // Obtain the Pointer to the Surface state from SSH Buffer
428 mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD* pSurfaceStateAdv =
429 (mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD*) pParams->pSurfaceState;
430 MHW_MI_CHK_NULL(pSurfaceStateAdv);
431
432 // Initialize Surface State
433 *pSurfaceStateAdv = mhw_state_heap_g9_X::MEDIA_SURFACE_STATE_CMD();
434
435 pSurfaceStateAdv->DW0.Rotation = pParams->RotationMode;
436 pSurfaceStateAdv->DW0.XOffset = pParams->iXOffset >> 2;
437 pSurfaceStateAdv->DW0.YOffset = pParams->iYOffset >> 2;
438 pSurfaceStateAdv->DW1.Width = pParams->dwWidth - 1;
439 pSurfaceStateAdv->DW1.Height = pParams->dwHeight - 1;
440 pSurfaceStateAdv->DW1.CrVCbUPixelOffsetVDirection = pParams->UVPixelOffsetVDirection & 3;
441 pSurfaceStateAdv->DW2.CrVCbUPixelOffsetVDirectionMsb = pParams->UVPixelOffsetVDirection >> 2;
442 pSurfaceStateAdv->DW2.CrVCbUPixelOffsetUDirection = pParams->UVPixelOffsetUDirection;
443 pSurfaceStateAdv->DW2.SurfaceFormat = pParams->dwFormat;
444 pSurfaceStateAdv->DW2.InterleaveChroma = pParams->bInterleaveChroma;
445 pSurfaceStateAdv->DW2.SurfacePitch = pParams->dwPitch - 1;
446 pSurfaceStateAdv->DW2.HalfPitchForChroma = pParams->bHalfPitchChroma;
447 pSurfaceStateAdv->DW2.TileMode = TileMode;
448 pSurfaceStateAdv->DW2.MemoryCompressionEnable = pParams->bCompressionEnabled;
449 pSurfaceStateAdv->DW2.MemoryCompressionMode = pParams->bCompressionMode;
450 pSurfaceStateAdv->DW3.XOffsetForUCb = pParams->dwXOffsetForU;
451 pSurfaceStateAdv->DW3.YOffsetForUCb = pParams->dwYOffsetForU;
452 pSurfaceStateAdv->DW4.XOffsetForVCr = pParams->dwXOffsetForV;
453 pSurfaceStateAdv->DW4.YOffsetForVCr = pParams->dwYOffsetForV;
454 pSurfaceStateAdv->DW5.VerticalLineStride = pParams->bVerticalLineStride;
455 pSurfaceStateAdv->DW5.VerticalLineStrideOffset = pParams->bVerticalLineStrideOffset;
456 pSurfaceStateAdv->DW5.SurfaceMemoryObjectControlState = pParams->dwCacheabilityControl;
457
458 // Return offset and pointer for patching
459 pParams->pdwCmd = &(pSurfaceStateAdv->DW6.Value);
460 pParams->dwLocationInCmd = 6;
461 }
462 else // not AVS
463 {
464 // Obtain the Pointer to the Surface state from SSH Buffer
465 mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD* pSurfaceState =
466 (mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD*) pParams->pSurfaceState;
467 MHW_MI_CHK_NULL(pSurfaceState);
468
469 // Initialize Surface State
470 *pSurfaceState = mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD();
471
472 pSurfaceState->DW0.SurfaceType = pParams->SurfaceType3D;
473 pSurfaceState->DW0.SurfaceFormat = pParams->dwFormat;
474 pSurfaceState->DW0.TileMode = TileMode;
475 pSurfaceState->DW0.VerticalLineStride = pParams->bVerticalLineStride;
476 pSurfaceState->DW0.VerticalLineStrideOffset = pParams->bVerticalLineStrideOffset;
477 pSurfaceState->DW0.SurfaceHorizontalAlignment= 1;
478 pSurfaceState->DW0.SurfaceVerticalAlignment = 1;
479
480 pSurfaceState->DW1.MemoryObjectControlState = pParams->dwCacheabilityControl;
481 if (pParams->SurfaceType3D == GFX3DSTATE_SURFACETYPE_BUFFER)
482 { // Buffer resources - use original width/height/pitch/depth
483 pSurfaceState->DW2.Width = pParams->dwWidth;
484 pSurfaceState->DW2.Height = pParams->dwHeight;
485 pSurfaceState->DW3.SurfacePitch = pParams->dwPitch;
486 pSurfaceState->DW3.Depth = pParams->dwDepth;
487 }
488 else
489 {
490 pSurfaceState->DW1.SurfaceQpitch = pParams->dwQPitch >> 2;
491 pSurfaceState->DW2.Width = pParams->dwWidth - 1;
492 pSurfaceState->DW2.Height = pParams->dwHeight - 1;
493 pSurfaceState->DW3.SurfacePitch = pParams->dwPitch - 1;
494 pSurfaceState->DW3.Depth = pParams->dwDepth - 1;
495 }
496 pSurfaceState->DW4.RenderTargetAndSampleUnormRotation = pParams->RotationMode;
497 pSurfaceState->DW5.XOffset = pParams->iXOffset >> 2; // In multiples of 4 (low two bits missing).
498 pSurfaceState->DW5.YOffset = pParams->iYOffset >> 2; // For S3D, the Yoffset of right-view surface in rerder target may be non-zero
499 pSurfaceState->DW6.Obj1.SeparateUvPlaneEnable = pParams->bSeperateUVPlane;
500 pSurfaceState->DW6.Obj1.XOffsetForUOrUvPlane = pParams->dwXOffsetForU;
501 pSurfaceState->DW6.Obj1.YOffsetForUOrUvPlane = pParams->dwYOffsetForU;
502
503 pSurfaceState->DW7.MemoryCompressionEnable = pParams->bCompressionEnabled;
504 pSurfaceState->DW7.MemoryCompressionMode = pParams->bCompressionMode;
505
506 pSurfaceState->DW7.ShaderChannelSelectAlpha = mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_ALPHA_ALPHA;
507 pSurfaceState->DW7.ShaderChannelSelectBlue = mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_BLUE_BLUE;
508 pSurfaceState->DW7.ShaderChannelSelectGreen = mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_GREEN_GREEN;
509 pSurfaceState->DW7.ShaderChannelSelectRed = mhw_state_heap_g9_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_RED_RED;
510
511 pSurfaceState->DW10_11.Obj3.XOffsetForVPlane = pParams->dwXOffsetForV;
512 pSurfaceState->DW10_11.Obj3.YOffsetForVPlane = pParams->dwYOffsetForV;
513
514 // Return offset and pointer for patching
515 pParams->pdwCmd = (uint32_t *)&(pSurfaceState->DW8_9.SurfaceBaseAddress);
516 pParams->dwLocationInCmd = 8;
517 }
518 return MOS_STATUS_SUCCESS;
519 }
520
521 //! \brief Initialize sampler states for Gen9
522 //! \details Initializes sampler states
523 //! \param PMHW_STATE_HEAP_INTERFACE pStateHeapInterface
524 //! [in] State heap interface
525 //! \param void *pSamplerStates
526 //! [in] Pointer to sampler states to reset
527 //! \param int32_t iSamplers
528 //! [in] Number of sampler entries to reset
529 //! \return MOS_STATUS
530 //! MOS_STATUS_SUCCESS if success, else fail reason
531 //!
InitSamplerStates(void * pSamplerStates,int32_t iSamplers)532 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G9_X::InitSamplerStates(
533 void *pSamplerStates,
534 int32_t iSamplers)
535 {
536 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
537
538 MHW_FUNCTION_ENTER;
539
540 MHW_MI_CHK_NULL(pSamplerStates);
541
542 mhw_state_heap_g9_X::SAMPLER_STATE_CMD SamplerStateInit;
543 // Add additional defaults specific to media
544 SamplerStateInit.DW0.MinModeFilter = SamplerStateInit.MIN_MODE_FILTER_LINEAR;
545 SamplerStateInit.DW0.MagModeFilter = SamplerStateInit.MAG_MODE_FILTER_LINEAR;
546 SamplerStateInit.DW0.TextureBorderColorMode = SamplerStateInit.TEXTURE_BORDER_COLOR_MODE_8BIT;
547 SamplerStateInit.DW0.SamplerDisable = true;
548 SamplerStateInit.DW1.ShadowFunction = SamplerStateInit.SHADOW_FUNCTION_PREFILTEROPNEVER;
549 SamplerStateInit.DW3.TczAddressControlMode = SamplerStateInit.TCZ_ADDRESS_CONTROL_MODE_CLAMP;
550 SamplerStateInit.DW3.TcyAddressControlMode = SamplerStateInit.TCY_ADDRESS_CONTROL_MODE_CLAMP;
551 SamplerStateInit.DW3.TcxAddressControlMode = SamplerStateInit.TCX_ADDRESS_CONTROL_MODE_CLAMP;
552 SamplerStateInit.DW3.RAddressMinFilterRoundingEnable = true;
553 SamplerStateInit.DW3.RAddressMagFilterRoundingEnable = true;
554 SamplerStateInit.DW3.VAddressMinFilterRoundingEnable = true;
555 SamplerStateInit.DW3.VAddressMagFilterRoundingEnable = true;
556 SamplerStateInit.DW3.UAddressMinFilterRoundingEnable = true;
557 SamplerStateInit.DW3.UAddressMagFilterRoundingEnable = true;
558
559 // Initialize Media Sampler States
560 uint8_t *pu8SamplerState = (uint8_t*)pSamplerStates;
561
562 for (; iSamplers > 0; iSamplers--)
563 {
564 MOS_SecureMemcpy(pu8SamplerState, SamplerStateInit.byteSize, &SamplerStateInit, SamplerStateInit.byteSize);
565 pu8SamplerState += SamplerStateInit.byteSize;
566 }
567
568 return eStatus;
569 }
570
571 //!
572 //! \brief Load Sampler 8X8 State Table for Gen9
573 //! \details Load Sampler 8x8 State Table
574 //! \param [in] void *pTable
575 //! Pointer to 8x8 table in GSH to load
576 //! \param [in] PMHW_SAMPLER_AVS_TABLE_PARAM pMhwSamplerAvsTableParam
577 //! Pointer to 8x8 sampler state params
578 //! \return MOS_STATUS
579 //!
LoadSamplerAvsTable(void * pvTable,PMHW_SAMPLER_AVS_TABLE_PARAM pMhwSamplerAvsTableParam)580 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G9_X::LoadSamplerAvsTable(
581 void *pvTable,
582 PMHW_SAMPLER_AVS_TABLE_PARAM pMhwSamplerAvsTableParam)
583 {
584 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
585
586 MHW_FUNCTION_ENTER;
587
588 MHW_MI_CHK_NULL(pvTable);
589 MHW_MI_CHK_NULL(pMhwSamplerAvsTableParam);
590
591 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_CMD *pSampler8x8Avs =
592 (mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_CMD*)pvTable;
593
594 // DW0 ~ DW15 are for sampler state and programmed in other function, so no need to setup for it here.
595
596 uint32_t u32ConvolveTableNum =
597 sizeof(pSampler8x8Avs->FilterCoefficient016) / sizeof(pSampler8x8Avs->FilterCoefficient016[0]);
598
599 // DW16 ~ DW151 setting for table coefficients (DW0 ~ DW7) * 17
600 for (uint32_t u32CoeffTableIdx = 0; u32CoeffTableIdx < u32ConvolveTableNum; u32CoeffTableIdx++)
601 {
602 PMHW_AVS_COEFFICIENT_PARAM pCoeffParam = &pMhwSamplerAvsTableParam->paMhwAvsCoeffParam[u32CoeffTableIdx];
603 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_COEFFICIENTS_CMD *pCoeffTable =
604 &pSampler8x8Avs->FilterCoefficient016[u32CoeffTableIdx];
605 MHW_MI_CHK_NULL(pCoeffParam);
606 MHW_MI_CHK_NULL(pCoeffTable);
607
608 pCoeffTable->DW0.Table0XFilterCoefficientN0 = pCoeffParam->ZeroXFilterCoefficient[0];
609 pCoeffTable->DW0.Table0YFilterCoefficientN0 = pCoeffParam->ZeroYFilterCoefficient[0];
610 pCoeffTable->DW0.Table0XFilterCoefficientN1 = pCoeffParam->ZeroXFilterCoefficient[1];
611 pCoeffTable->DW0.Table0YFilterCoefficientN1 = pCoeffParam->ZeroYFilterCoefficient[1];
612
613 pCoeffTable->DW1.Table0XFilterCoefficientN2 = pCoeffParam->ZeroXFilterCoefficient[2];
614 pCoeffTable->DW1.Table0YFilterCoefficientN2 = pCoeffParam->ZeroYFilterCoefficient[2];
615 pCoeffTable->DW1.Table0XFilterCoefficientN3 = pCoeffParam->ZeroXFilterCoefficient[3];
616 pCoeffTable->DW1.Table0YFilterCoefficientN3 = pCoeffParam->ZeroYFilterCoefficient[3];
617
618 pCoeffTable->DW2.Table0XFilterCoefficientN4 = pCoeffParam->ZeroXFilterCoefficient[4];
619 pCoeffTable->DW2.Table0YFilterCoefficientN4 = pCoeffParam->ZeroYFilterCoefficient[4];
620 pCoeffTable->DW2.Table0XFilterCoefficientN5 = pCoeffParam->ZeroXFilterCoefficient[5];
621 pCoeffTable->DW2.Table0YFilterCoefficientN5 = pCoeffParam->ZeroYFilterCoefficient[5];
622
623 pCoeffTable->DW3.Table0XFilterCoefficientN6 = pCoeffParam->ZeroXFilterCoefficient[6];
624 pCoeffTable->DW3.Table0YFilterCoefficientN6 = pCoeffParam->ZeroYFilterCoefficient[6];
625 pCoeffTable->DW3.Table0XFilterCoefficientN7 = pCoeffParam->ZeroXFilterCoefficient[7];
626 pCoeffTable->DW3.Table0YFilterCoefficientN7 = pCoeffParam->ZeroYFilterCoefficient[7];
627
628 pCoeffTable->DW4.Table1XFilterCoefficientN2 = pCoeffParam->OneXFilterCoefficient[0];
629 pCoeffTable->DW4.Table1XFilterCoefficientN3 = pCoeffParam->OneXFilterCoefficient[1];
630 pCoeffTable->DW5.Table1XFilterCoefficientN4 = pCoeffParam->OneXFilterCoefficient[2];
631 pCoeffTable->DW5.Table1XFilterCoefficientN5 = pCoeffParam->OneXFilterCoefficient[3];
632
633 pCoeffTable->DW6.Table1YFilterCoefficientN2 = pCoeffParam->OneYFilterCoefficient[0];
634 pCoeffTable->DW6.Table1YFilterCoefficientN3 = pCoeffParam->OneYFilterCoefficient[1];
635 pCoeffTable->DW7.Table1YFilterCoefficientN4 = pCoeffParam->OneYFilterCoefficient[2];
636 pCoeffTable->DW7.Table1YFilterCoefficientN5 = pCoeffParam->OneYFilterCoefficient[3];
637 }
638
639 // DW152 ~ DW153 setting for table control
640 pSampler8x8Avs->DW152.TransitionAreaWith8Pixels = pMhwSamplerAvsTableParam->byteTransitionArea8Pixels; // 3-bits
641 pSampler8x8Avs->DW152.TransitionAreaWith4Pixels = pMhwSamplerAvsTableParam->byteTransitionArea4Pixels; // 3-bits
642 pSampler8x8Avs->DW152.MaxDerivative8Pixels = pMhwSamplerAvsTableParam->byteMaxDerivative8Pixels;
643 pSampler8x8Avs->DW152.MaxDerivative4Pixels = pMhwSamplerAvsTableParam->byteMaxDerivative4Pixels;
644 pSampler8x8Avs->DW152.DefaultSharpnessLevel = pMhwSamplerAvsTableParam->byteDefaultSharpnessLevel;
645
646 pSampler8x8Avs->DW153.RgbAdaptive = pMhwSamplerAvsTableParam->bEnableRGBAdaptive;
647 pSampler8x8Avs->DW153.AdaptiveFilterForAllChannels = pMhwSamplerAvsTableParam->bAdaptiveFilterAllChannels;
648 pSampler8x8Avs->DW153.BypassYAdaptiveFiltering = pMhwSamplerAvsTableParam->bBypassYAdaptiveFiltering;
649 pSampler8x8Avs->DW153.BypassXAdaptiveFiltering = pMhwSamplerAvsTableParam->bBypassXAdaptiveFiltering;
650
651 u32ConvolveTableNum =
652 sizeof(pSampler8x8Avs->FilterCoefficient1731) / sizeof(pSampler8x8Avs->FilterCoefficient1731[0]);
653 // DW160 ~ DW279 setting for extra table coefficients (DW0 ~ DW7) * 15
654 for (uint32_t u32CoeffTableIdx = 0; u32CoeffTableIdx < u32ConvolveTableNum; u32CoeffTableIdx++)
655 {
656 PMHW_AVS_COEFFICIENT_PARAM pCoeffParamExtra = &pMhwSamplerAvsTableParam->paMhwAvsCoeffParamExtra[u32CoeffTableIdx];
657 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_COEFFICIENTS_CMD *pCoeffTableExtra =
658 &pSampler8x8Avs->FilterCoefficient1731[u32CoeffTableIdx];
659 MHW_MI_CHK_NULL(pCoeffParamExtra);
660 MHW_MI_CHK_NULL(pCoeffTableExtra);
661
662 pCoeffTableExtra->DW0.Table0XFilterCoefficientN0 = pCoeffParamExtra->ZeroXFilterCoefficient[0];
663 pCoeffTableExtra->DW0.Table0YFilterCoefficientN0 = pCoeffParamExtra->ZeroYFilterCoefficient[0];
664 pCoeffTableExtra->DW0.Table0XFilterCoefficientN1 = pCoeffParamExtra->ZeroXFilterCoefficient[1];
665 pCoeffTableExtra->DW0.Table0YFilterCoefficientN1 = pCoeffParamExtra->ZeroYFilterCoefficient[1];
666
667 pCoeffTableExtra->DW1.Table0XFilterCoefficientN2 = pCoeffParamExtra->ZeroXFilterCoefficient[2];
668 pCoeffTableExtra->DW1.Table0YFilterCoefficientN2 = pCoeffParamExtra->ZeroYFilterCoefficient[2];
669 pCoeffTableExtra->DW1.Table0XFilterCoefficientN3 = pCoeffParamExtra->ZeroXFilterCoefficient[3];
670 pCoeffTableExtra->DW1.Table0YFilterCoefficientN3 = pCoeffParamExtra->ZeroYFilterCoefficient[3];
671
672 pCoeffTableExtra->DW2.Table0XFilterCoefficientN4 = pCoeffParamExtra->ZeroXFilterCoefficient[4];
673 pCoeffTableExtra->DW2.Table0YFilterCoefficientN4 = pCoeffParamExtra->ZeroYFilterCoefficient[4];
674 pCoeffTableExtra->DW2.Table0XFilterCoefficientN5 = pCoeffParamExtra->ZeroXFilterCoefficient[5];
675 pCoeffTableExtra->DW2.Table0YFilterCoefficientN5 = pCoeffParamExtra->ZeroYFilterCoefficient[5];
676
677 pCoeffTableExtra->DW3.Table0XFilterCoefficientN6 = pCoeffParamExtra->ZeroXFilterCoefficient[6];
678 pCoeffTableExtra->DW3.Table0YFilterCoefficientN6 = pCoeffParamExtra->ZeroYFilterCoefficient[6];
679 pCoeffTableExtra->DW3.Table0XFilterCoefficientN7 = pCoeffParamExtra->ZeroXFilterCoefficient[7];
680 pCoeffTableExtra->DW3.Table0YFilterCoefficientN7 = pCoeffParamExtra->ZeroYFilterCoefficient[7];
681
682 pCoeffTableExtra->DW4.Table1XFilterCoefficientN2 = pCoeffParamExtra->OneXFilterCoefficient[0];
683 pCoeffTableExtra->DW4.Table1XFilterCoefficientN3 = pCoeffParamExtra->OneXFilterCoefficient[1];
684 pCoeffTableExtra->DW5.Table1XFilterCoefficientN4 = pCoeffParamExtra->OneXFilterCoefficient[2];
685 pCoeffTableExtra->DW5.Table1XFilterCoefficientN5 = pCoeffParamExtra->OneXFilterCoefficient[3];
686
687 pCoeffTableExtra->DW6.Table1YFilterCoefficientN2 = pCoeffParamExtra->OneYFilterCoefficient[0];
688 pCoeffTableExtra->DW6.Table1YFilterCoefficientN3 = pCoeffParamExtra->OneYFilterCoefficient[1];
689 pCoeffTableExtra->DW7.Table1YFilterCoefficientN4 = pCoeffParamExtra->OneYFilterCoefficient[2];
690 pCoeffTableExtra->DW7.Table1YFilterCoefficientN5 = pCoeffParamExtra->OneYFilterCoefficient[3];
691 }
692
693 return eStatus;
694 }
695
696 //!
697 //! \brief Set Sampler State for Gen9
698 //! \details Set sampler state according to sampler type
699 //! \param PMHW_STATE_HEAP_INTERFACE pStateHeapInterface
700 //! [in] State heap interface
701 //! \param void *pSamplerBase
702 //! [in] Pointer to sampler state base in GSH
703 //! \param int32_t iSamplerIndex
704 //! [in] Sampler index to setup
705 //! \param PMHW_SAMPLER_STATE_PARAM pParam
706 //! [in] Sampler State param
707 //! \return MOS_STATUS
708 //!
SetSamplerState(void * pSampler,PMHW_SAMPLER_STATE_PARAM pParam)709 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G9_X::SetSamplerState(
710 void *pSampler,
711 PMHW_SAMPLER_STATE_PARAM pParam)
712 {
713 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
714
715 MHW_FUNCTION_ENTER;
716
717 MHW_MI_CHK_NULL(pParam);
718
719 if (pParam->pKernelState)
720 {
721 PMHW_KERNEL_STATE pKernelState;
722 uint32_t dwCurrSampler;
723 uint32_t dwNumSampler;
724
725 mhw_state_heap_g9_X::SAMPLER_STATE_CMD Cmd;
726 Cmd.DW0.MinModeFilter = Cmd.MIN_MODE_FILTER_LINEAR;
727 Cmd.DW0.MagModeFilter = Cmd.MAG_MODE_FILTER_LINEAR;
728 Cmd.DW0.TextureBorderColorMode = Cmd.TEXTURE_BORDER_COLOR_MODE_8BIT;
729 Cmd.DW1.ShadowFunction = Cmd.SHADOW_FUNCTION_PREFILTEROPNEVER;
730 Cmd.DW3.TczAddressControlMode = Cmd.TCZ_ADDRESS_CONTROL_MODE_CLAMP;
731 Cmd.DW3.TcyAddressControlMode = Cmd.TCY_ADDRESS_CONTROL_MODE_CLAMP;
732 Cmd.DW3.TcxAddressControlMode = Cmd.TCX_ADDRESS_CONTROL_MODE_CLAMP;
733 Cmd.DW3.RAddressMinFilterRoundingEnable = true;
734 Cmd.DW3.RAddressMagFilterRoundingEnable = true;
735 Cmd.DW3.VAddressMinFilterRoundingEnable = true;
736 Cmd.DW3.VAddressMagFilterRoundingEnable = true;
737 Cmd.DW3.UAddressMinFilterRoundingEnable = true;
738 Cmd.DW3.UAddressMagFilterRoundingEnable = true;
739 Cmd.DW0.SamplerDisable = false;
740
741 dwNumSampler = pParam->pKernelState->KernelParams.iSamplerCount;
742
743 for (dwCurrSampler = 0; dwCurrSampler < dwNumSampler; dwCurrSampler++)
744 {
745 if (pParam[dwCurrSampler].bInUse)
746 {
747 pKernelState = pParam[dwCurrSampler].pKernelState;
748
749 MHW_MI_CHK_NULL(pKernelState);
750
751 MHW_MI_CHK_STATUS(pKernelState->m_dshRegion.AddData(
752 &Cmd,
753 pKernelState->dwSamplerOffset + dwCurrSampler * Cmd.byteSize,
754 sizeof(Cmd)));
755 }
756 }
757 }
758 else if (pParam->bInUse)
759 {
760 MHW_MI_CHK_NULL(pSampler);
761
762 if (pParam->SamplerType == MHW_SAMPLER_TYPE_3D)
763 {
764 mhw_state_heap_g9_X::SAMPLER_STATE_CMD *pUnormSampler =
765 (mhw_state_heap_g9_X::SAMPLER_STATE_CMD*)pSampler;
766
767 mhw_state_heap_g9_X::SAMPLER_STATE_CMD UnormSamplerInit;
768
769 // Add additional defaults specific to media
770 UnormSamplerInit.DW0.MinModeFilter = UnormSamplerInit.MIN_MODE_FILTER_LINEAR;
771 UnormSamplerInit.DW0.MagModeFilter = UnormSamplerInit.MAG_MODE_FILTER_LINEAR;
772 UnormSamplerInit.DW0.TextureBorderColorMode = UnormSamplerInit.TEXTURE_BORDER_COLOR_MODE_8BIT;
773 UnormSamplerInit.DW0.SamplerDisable = false;
774 UnormSamplerInit.DW1.ShadowFunction = UnormSamplerInit.SHADOW_FUNCTION_PREFILTEROPNEVER;
775 UnormSamplerInit.DW3.TczAddressControlMode = UnormSamplerInit.TCZ_ADDRESS_CONTROL_MODE_CLAMP;
776 UnormSamplerInit.DW3.TcyAddressControlMode = UnormSamplerInit.TCY_ADDRESS_CONTROL_MODE_CLAMP;
777 UnormSamplerInit.DW3.TcxAddressControlMode = UnormSamplerInit.TCX_ADDRESS_CONTROL_MODE_CLAMP;
778 UnormSamplerInit.DW3.RAddressMinFilterRoundingEnable = true;
779 UnormSamplerInit.DW3.RAddressMagFilterRoundingEnable = true;
780 UnormSamplerInit.DW3.VAddressMinFilterRoundingEnable = true;
781 UnormSamplerInit.DW3.VAddressMagFilterRoundingEnable = true;
782 UnormSamplerInit.DW3.UAddressMinFilterRoundingEnable = true;
783 UnormSamplerInit.DW3.UAddressMagFilterRoundingEnable = true;
784
785 *pUnormSampler = UnormSamplerInit;
786
787 if (pParam->Unorm.SamplerFilterMode == MHW_SAMPLER_FILTER_NEAREST)
788 {
789 pUnormSampler->DW0.MinModeFilter = pUnormSampler->MIN_MODE_FILTER_NEAREST;
790 pUnormSampler->DW0.MagModeFilter = pUnormSampler->MAG_MODE_FILTER_NEAREST;
791 }
792 else if (pParam->Unorm.SamplerFilterMode == MHW_SAMPLER_FILTER_BILINEAR)
793 {
794 pUnormSampler->DW0.MinModeFilter = pUnormSampler->MIN_MODE_FILTER_LINEAR;
795 pUnormSampler->DW0.MagModeFilter = pUnormSampler->MAG_MODE_FILTER_LINEAR;
796 }
797 else
798 {
799 pUnormSampler->DW0.MinModeFilter = pParam->Unorm.MinFilter;
800 pUnormSampler->DW0.MagModeFilter = pParam->Unorm.MagFilter;
801 }
802
803 pUnormSampler->DW3.TcxAddressControlMode = pParam->Unorm.AddressU;
804 pUnormSampler->DW3.TcyAddressControlMode = pParam->Unorm.AddressV;
805 pUnormSampler->DW3.TczAddressControlMode = pParam->Unorm.AddressW;
806
807 if (pParam->Unorm.bBorderColorIsValid)
808 {
809 mhw_state_heap_g9_X::SAMPLER_INDIRECT_STATE_CMD *pUnormSamplerBorderColor =
810 (mhw_state_heap_g9_X::SAMPLER_INDIRECT_STATE_CMD*)pParam->Unorm.pIndirectState;
811
812 mhw_state_heap_g9_X::SAMPLER_INDIRECT_STATE_CMD UnormSamplerBorderColorInit;
813 *pUnormSamplerBorderColor = UnormSamplerBorderColorInit;
814
815 // Since the structure is a union between float, uint, and int, can use any to set the state DW
816 pUnormSamplerBorderColor->DW0.Obj0.BorderColorRed = pParam->Unorm.BorderColorRedU;
817 pUnormSamplerBorderColor->DW1.BorderColorGreen = pParam->Unorm.BorderColorGreenU;
818 pUnormSamplerBorderColor->DW2.BorderColorBlue = pParam->Unorm.BorderColorBlueU;
819 pUnormSamplerBorderColor->DW3.BorderColorAlpha = pParam->Unorm.BorderColorAlphaU;
820
821 pUnormSampler->DW2.IndirectStatePointer = pParam->Unorm.IndirectStateOffset >> MHW_SAMPLER_INDIRECT_SHIFT;
822 }
823
824 if (pParam->Unorm.bChromaKeyEnable)
825 {
826 pUnormSampler->DW1.ChromakeyEnable = true;
827 pUnormSampler->DW1.ChromakeyIndex = pParam->Unorm.ChromaKeyIndex;
828 pUnormSampler->DW1.ChromakeyMode = pParam->Unorm.ChromaKeyMode;
829 }
830 }
831 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_AVS)
832 {
833 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_CMD *pSamplerState8x8 =
834 (mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_CMD*)pSampler;
835
836 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_CMD SamplerState8x8Init;
837 // Add additional defaults specific to media
838 SamplerState8x8Init.DW0.GainFactor = 0;
839 SamplerState8x8Init.DW0.R3XCoefficient = 0;
840 SamplerState8x8Init.DW0.R3CCoefficient = 0;
841 SamplerState8x8Init.DW2.GlobalNoiseEstimation = 0;
842 SamplerState8x8Init.DW2.R5XCoefficient = 0;
843 SamplerState8x8Init.DW2.R5CxCoefficient = 0;
844 SamplerState8x8Init.DW2.R5XCoefficient = 0;
845 SamplerState8x8Init.DW3.SinAlpha = 101;
846 SamplerState8x8Init.DW3.CosAlpha = 79;
847 SamplerState8x8Init.DW4.ShuffleOutputwritebackForSample8X8 = 1;
848 SamplerState8x8Init.DW5.DiamondAlpha = 100;
849 SamplerState8x8Init.DW5.DiamondDu = 0;
850 SamplerState8x8Init.DW7.InvMarginVyl = 3300;
851 SamplerState8x8Init.DW8.InvMarginVyu = 1600;
852 SamplerState8x8Init.DW10.S0L = MOS_BITFIELD_VALUE((uint32_t)-5, 11);
853 SamplerState8x8Init.DW10.YSlope2 = 31;
854 SamplerState8x8Init.DW12.YSlope1 = 31;
855 SamplerState8x8Init.DW14.S0U = 256;
856 SamplerState8x8Init.DW15.S1U = 113;
857 SamplerState8x8Init.DW15.S2U = MOS_BITFIELD_VALUE((uint32_t)-179, 11);
858
859 *pSamplerState8x8 = SamplerState8x8Init;
860
861 // Set STE Params
862 pSamplerState8x8->DW3.SkinToneTunedIefEnable = pParam->Avs.bEnableSTDE;
863 if (pParam->Avs.bEnableSTDE)
864 {
865 pSamplerState8x8->DW5.Skindetailfactor = pParam->Avs.bSkinDetailFactor;
866 pSamplerState8x8->DW4.VyStdEnable = true;
867 }
868
869 if (pParam->Avs.bEnableIEF && pParam->Avs.wIEFFactor > 0)
870 {
871 pSamplerState8x8->DW0.GainFactor = pParam->Avs.wIEFFactor;
872 pSamplerState8x8->DW0.R3XCoefficient = pParam->Avs.wR3xCoefficient;
873 pSamplerState8x8->DW0.R3CCoefficient = pParam->Avs.wR3cCoefficient;
874 pSamplerState8x8->DW2.R5XCoefficient = pParam->Avs.wR5xCoefficient;
875 pSamplerState8x8->DW2.R5CxCoefficient = pParam->Avs.wR5cxCoefficient;
876 pSamplerState8x8->DW2.R5CCoefficient = pParam->Avs.wR5cCoefficient;
877 }
878
879 if (pParam->Avs.bEnableAVS)
880 {
881 pSamplerState8x8->DW0.GainFactor = pParam->Avs.GainFactor;
882 pSamplerState8x8->DW0.StrongEdgeThreshold = pParam->Avs.StrongEdgeThr;
883 pSamplerState8x8->DW0.WeakEdgeThreshold = pParam->Avs.WeakEdgeThr;
884 pSamplerState8x8->DW2.GlobalNoiseEstimation = pParam->Avs.GlobalNoiseEstm;
885 pSamplerState8x8->DW2.StrongEdgeWeight = pParam->Avs.StrongEdgeWght;
886 pSamplerState8x8->DW2.RegularWeight = pParam->Avs.RegularWght;
887 pSamplerState8x8->DW2.NonEdgeWeight = pParam->Avs.NonEdgeWght;
888 pSamplerState8x8->DW3.Enable8TapFilter = pParam->Avs.EightTapAFEnable;
889
890 //pSamplerState8x8->DW3.IEFBypass = pParam->pAVSParam.BypassIEF; This should be done through Kernel Gen8+
891 pSamplerState8x8->DW0.R3XCoefficient = pParam->Avs.wR3xCoefficient;
892 pSamplerState8x8->DW0.R3CCoefficient = pParam->Avs.wR3cCoefficient;
893 pSamplerState8x8->DW2.R5XCoefficient = pParam->Avs.wR5xCoefficient;
894 pSamplerState8x8->DW2.R5CxCoefficient = pParam->Avs.wR5cxCoefficient;
895 pSamplerState8x8->DW2.R5CCoefficient = pParam->Avs.wR5cCoefficient;
896
897 if (pParam->Avs.AdditionalOverridesUsed)
898 {
899 pSamplerState8x8->DW10.YSlope2 = pParam->Avs.YSlope2;
900 pSamplerState8x8->DW10.S0L = pParam->Avs.S0L;
901 pSamplerState8x8->DW12.YSlope1 = pParam->Avs.YSlope1;
902 pSamplerState8x8->DW15.S2U = pParam->Avs.S2U;
903 pSamplerState8x8->DW15.S1U = pParam->Avs.S1U;
904 }
905
906 // For HDC Direct Write, set Writeback same as Original Sample_8x8
907 if (pParam->Avs.bHdcDwEnable)
908 {
909 pSamplerState8x8->DW4.ShuffleOutputwritebackForSample8X8 = 0;
910 }
911
912 if (pParam->Avs.pMhwSamplerAvsTableParam)
913 {
914 MHW_MI_CHK_STATUS(LoadSamplerAvsTable(pSamplerState8x8, pParam->Avs.pMhwSamplerAvsTableParam));
915 }
916 else
917 {
918 MHW_ASSERTMESSAGE("Invalid sampler params for avs 8x8 table \n");
919 eStatus = MOS_STATUS_INVALID_PARAMETER;
920 return eStatus;
921 }
922 }
923 }
924 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_CONV)
925 {
926 uint32_t u32ConvolveTableNum;
927
928 if ( pParam->Convolve.ui8ConvolveType == 0 )
929 { // 2D convolve, 2048: size of CONV for Gen9+
930 // how many tables need to be filled = total_bytes_of_tables / bytes_per_table
931 // = (total_sizeof_convolve - sizeof_DW0_to_DW15) / size_per_table
932 u32ConvolveTableNum = 62; // (2048 - 16*4) / 32
933 }
934 else if ( pParam->Convolve.ui8ConvolveType == 1 )
935 { // 1D convolve, 128: size of 1D CONV for Gen9+.
936 u32ConvolveTableNum = 2; // (128 - 16*4) / 32
937 }
938 else
939 { // 1P convolve, 1024 size of CONV for Gen8.
940 u32ConvolveTableNum = 30; // (1024 - 16*4) / 32
941 }
942
943 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_CONVOLVE_CMD *pSamplerConvolve =
944 (mhw_state_heap_g9_X::SAMPLER_STATE_8x8_CONVOLVE_CMD*)pSampler;
945
946 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_CONVOLVE_CMD SamplerConvolveInit;
947 *pSamplerConvolve = SamplerConvolveInit;
948
949 auto ConvolveTableEntries =
950 sizeof(pSamplerConvolve->FilterCoefficient300310) / sizeof(pSamplerConvolve->FilterCoefficient300310[0]);
951 if (ConvolveTableEntries < u32ConvolveTableNum)
952 {
953 MHW_ASSERTMESSAGE("Incorrect number of convolve entries requested!");
954 return MOS_STATUS_INVALID_PARAMETER;
955 }
956
957 pSamplerConvolve->DW0.Height = pParam->Convolve.ui8Height;
958 pSamplerConvolve->DW0.Width = pParam->Convolve.ui8Width;
959 pSamplerConvolve->DW0.ScaleDownValue = pParam->Convolve.ui8ScaledDownValue;
960 pSamplerConvolve->DW0.SizeOfTheCoefficient = pParam->Convolve.ui8SizeOfTheCoefficient;
961 pSamplerConvolve->DW0.MsbHeight = pParam->Convolve.ui8MSBHeight;
962 pSamplerConvolve->DW0.MsbWidth = pParam->Convolve.ui8MSBWidth;
963
964 for (uint32_t i = 0; i < u32ConvolveTableNum; i++)
965 {
966 pSamplerConvolve->FilterCoefficient300310[i].DW0.FilterCoefficient00 = pParam->Convolve.CoeffTable[i].wFilterCoeff[0];
967 pSamplerConvolve->FilterCoefficient300310[i].DW0.FilterCoefficient01 = pParam->Convolve.CoeffTable[i].wFilterCoeff[1];
968 pSamplerConvolve->FilterCoefficient300310[i].DW1.FilterCoefficient02 = pParam->Convolve.CoeffTable[i].wFilterCoeff[2];
969 pSamplerConvolve->FilterCoefficient300310[i].DW1.FilterCoefficient03 = pParam->Convolve.CoeffTable[i].wFilterCoeff[3];
970 pSamplerConvolve->FilterCoefficient300310[i].DW2.FilterCoefficient04 = pParam->Convolve.CoeffTable[i].wFilterCoeff[4];
971 pSamplerConvolve->FilterCoefficient300310[i].DW2.FilterCoefficient05 = pParam->Convolve.CoeffTable[i].wFilterCoeff[5];
972 pSamplerConvolve->FilterCoefficient300310[i].DW3.FilterCoefficient06 = pParam->Convolve.CoeffTable[i].wFilterCoeff[6];
973 pSamplerConvolve->FilterCoefficient300310[i].DW3.FilterCoefficient07 = pParam->Convolve.CoeffTable[i].wFilterCoeff[7];
974 pSamplerConvolve->FilterCoefficient300310[i].DW4.FilterCoefficient08 = pParam->Convolve.CoeffTable[i].wFilterCoeff[8];
975 pSamplerConvolve->FilterCoefficient300310[i].DW4.FilterCoefficient09 = pParam->Convolve.CoeffTable[i].wFilterCoeff[9];
976 pSamplerConvolve->FilterCoefficient300310[i].DW5.FilterCoefficient010 = pParam->Convolve.CoeffTable[i].wFilterCoeff[10];
977 pSamplerConvolve->FilterCoefficient300310[i].DW5.FilterCoefficient011 = pParam->Convolve.CoeffTable[i].wFilterCoeff[11];
978 pSamplerConvolve->FilterCoefficient300310[i].DW6.FilterCoefficient012 = pParam->Convolve.CoeffTable[i].wFilterCoeff[12];
979 pSamplerConvolve->FilterCoefficient300310[i].DW6.FilterCoefficient013 = pParam->Convolve.CoeffTable[i].wFilterCoeff[13];
980 pSamplerConvolve->FilterCoefficient300310[i].DW7.FilterCoefficient014 = pParam->Convolve.CoeffTable[i].wFilterCoeff[14];
981 pSamplerConvolve->FilterCoefficient300310[i].DW7.FilterCoefficient015 = pParam->Convolve.CoeffTable[i].wFilterCoeff[15];
982 }
983 }
984 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_MISC)
985 {
986 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD *pSamplerMisc =
987 (mhw_state_heap_g9_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD*)pSampler;
988
989 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD SamplerMiscInit;
990 *pSamplerMisc = SamplerMiscInit;
991
992 pSamplerMisc->DW0.HeightOfTheKernel = pParam->Misc.byteHeight;
993 pSamplerMisc->DW0.WidthOfTheKernel = pParam->Misc.byteWidth;
994 pSamplerMisc->DW0.BitMask16ForRow0150 = pParam->Misc.wRow[0];
995 pSamplerMisc->DW1.BitMask16ForRow1150 = pParam->Misc.wRow[1];
996 pSamplerMisc->DW1.BitMask16ForRow2150 = pParam->Misc.wRow[2];
997 pSamplerMisc->DW2.BitMask16ForRow3150 = pParam->Misc.wRow[3];
998 pSamplerMisc->DW2.BitMask16ForRow4150 = pParam->Misc.wRow[4];
999 pSamplerMisc->DW3.BitMask16ForRow5150 = pParam->Misc.wRow[5];
1000 pSamplerMisc->DW3.BitMask16ForRow6150 = pParam->Misc.wRow[6];
1001 pSamplerMisc->DW4.BitMask16ForRow7150 = pParam->Misc.wRow[7];
1002 pSamplerMisc->DW4.BitMask16ForRow8150 = pParam->Misc.wRow[8];
1003 pSamplerMisc->DW5.BitMask16ForRow9150 = pParam->Misc.wRow[9];
1004 pSamplerMisc->DW5.BitMask16ForRow10150 = pParam->Misc.wRow[10];
1005 pSamplerMisc->DW6.BitMask16ForRow11150 = pParam->Misc.wRow[11];
1006 pSamplerMisc->DW6.BitMask16ForRow12150 = pParam->Misc.wRow[12];
1007 pSamplerMisc->DW7.BitMask16ForRow13150 = pParam->Misc.wRow[13];
1008 pSamplerMisc->DW7.BitMask16ForRow14150 = pParam->Misc.wRow[14];
1009 }
1010 else
1011 {
1012 MHW_ASSERTMESSAGE("Invalid sampler type '%d'", pParam->SamplerType);
1013 eStatus = MOS_STATUS_INVALID_PARAMETER;
1014 return eStatus;
1015 }
1016 }
1017
1018 eStatus = MOS_STATUS_SUCCESS;
1019
1020 return eStatus;
1021 }
1022
AddSamplerStateData(uint32_t samplerOffset,MemoryBlock * memoryBlock,PMHW_SAMPLER_STATE_PARAM pParam)1023 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G9_X::AddSamplerStateData(
1024 uint32_t samplerOffset,
1025 MemoryBlock *memoryBlock,
1026 PMHW_SAMPLER_STATE_PARAM pParam)
1027 {
1028 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1029
1030 MHW_MI_CHK_NULL(memoryBlock);
1031 MHW_MI_CHK_NULL(pParam);
1032
1033 if (pParam->SamplerType == MHW_SAMPLER_TYPE_3D)
1034 {
1035 mhw_state_heap_g9_X::SAMPLER_STATE_CMD unormSampler;
1036 mhw_state_heap_g9_X::SAMPLER_INDIRECT_STATE_CMD indirectState;
1037
1038 pParam->Unorm.pIndirectState = &indirectState;
1039
1040 MHW_MI_CHK_STATUS(SetSamplerState(&unormSampler, pParam));
1041
1042 // Add indirect state to heap if necessary
1043 if (pParam->Unorm.bBorderColorIsValid)
1044 {
1045 // adjust unormSampler->DW2.IndirectStatePointer
1046 // to include memoryBlock's offset from base of state heap
1047 unormSampler.DW2.IndirectStatePointer =
1048 (pParam->Unorm.IndirectStateOffset + memoryBlock->GetOffset())
1049 >> MHW_SAMPLER_INDIRECT_SHIFT;
1050
1051 MHW_MI_CHK_STATUS(memoryBlock->AddData(
1052 &indirectState,
1053 pParam->Unorm.IndirectStateOffset,
1054 sizeof(mhw_state_heap_g9_X::SAMPLER_INDIRECT_STATE_CMD)));
1055 }
1056
1057 // Add sampler state data to heap
1058 MHW_MI_CHK_STATUS(memoryBlock->AddData(
1059 &unormSampler,
1060 samplerOffset,
1061 sizeof(mhw_state_heap_g9_X::SAMPLER_STATE_CMD)));
1062 }
1063 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_AVS)
1064 {
1065 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_CMD samplerState8x8;
1066
1067 MHW_MI_CHK_STATUS(SetSamplerState(&samplerState8x8, pParam));
1068
1069 // this should work to load SamplerAvsTable as well since the
1070 // coefficients are part of SAMPLER_STATE_8x8_AVS_CMD
1071 // Add sampler data to heap
1072 MHW_MI_CHK_STATUS(memoryBlock->AddData(
1073 &samplerState8x8,
1074 samplerOffset,
1075 sizeof(mhw_state_heap_g9_X::SAMPLER_STATE_8x8_AVS_CMD)));
1076 }
1077 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_CONV)
1078 {
1079 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_CONVOLVE_CMD samplerConvolve;
1080
1081 MHW_MI_CHK_STATUS(SetSamplerState(&samplerConvolve, pParam));
1082
1083 MHW_MI_CHK_STATUS(memoryBlock->AddData(
1084 &samplerConvolve,
1085 samplerOffset,
1086 sizeof(mhw_state_heap_g9_X::SAMPLER_STATE_8x8_CONVOLVE_CMD)));
1087 }
1088 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_MISC)
1089 {
1090 mhw_state_heap_g9_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD samplerMisc;
1091
1092 MHW_MI_CHK_STATUS(SetSamplerState(&samplerMisc, pParam));
1093
1094 MHW_MI_CHK_STATUS(memoryBlock->AddData(
1095 &samplerMisc,
1096 samplerOffset,
1097 sizeof(mhw_state_heap_g9_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD)));
1098
1099 }
1100 else
1101 {
1102 MHW_ASSERTMESSAGE("Invalid sampler type '%d'", pParam->SamplerType);
1103 eStatus = MOS_STATUS_INVALID_PARAMETER;
1104 }
1105
1106 return eStatus;
1107 }
1108
SetInterfaceDescriptor(uint32_t dwNumIdsToSet,PMHW_INTERFACE_DESCRIPTOR_PARAMS pParams)1109 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G9_X::SetInterfaceDescriptor(
1110 uint32_t dwNumIdsToSet,
1111 PMHW_INTERFACE_DESCRIPTOR_PARAMS pParams)
1112 {
1113 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1114
1115 MHW_FUNCTION_ENTER;
1116 MHW_MI_CHK_NULL(pParams);
1117
1118 for (uint32_t dwCurrId = 0; dwCurrId < dwNumIdsToSet; dwCurrId++)
1119 {
1120 PMHW_KERNEL_STATE pKernelState = pParams[dwCurrId].pKernelState;
1121
1122 MHW_MI_CHK_NULL(pKernelState);
1123
1124 mhw_state_heap_g9_X::INTERFACE_DESCRIPTOR_DATA_CMD cmd;
1125
1126 cmd.DW0.KernelStartPointer =
1127 (pKernelState->m_ishRegion.GetOffset() +
1128 pKernelState->dwKernelBinaryOffset +
1129 pParams[dwCurrId].dwKernelStartOffset) >>
1130 MHW_KERNEL_OFFSET_SHIFT;
1131 cmd.DW3.SamplerStatePointer =
1132 (pKernelState->m_dshRegion.GetOffset() +
1133 pKernelState->dwSamplerOffset +
1134 pParams[dwCurrId].dwSamplerOffset) >>
1135 MHW_SAMPLER_SHIFT;
1136 cmd.DW3.SamplerCount = (pKernelState->KernelParams.iSamplerCount - 1) / 4 + 1;
1137 cmd.DW4.BindingTablePointer = MOS_ROUNDUP_SHIFT(
1138 (pKernelState->dwSshOffset +
1139 pParams[dwCurrId].dwBtOffset),
1140 MHW_BINDING_TABLE_ID_SHIFT);
1141 cmd.DW5.ConstantIndirectUrbEntryReadLength = MOS_ROUNDUP_SHIFT(
1142 pParams->pKernelState->KernelParams.iCurbeLength,
1143 MHW_CURBE_SHIFT);
1144 cmd.DW6.NumberOfThreadsInGpgpuThreadGroup = 1;
1145
1146 uint32_t idOffsetInIdSpace =
1147 pKernelState->dwIdOffset +
1148 (pParams[dwCurrId].dwIdIdx * m_wSizeOfCmdInterfaceDescriptorData);
1149 MHW_MI_CHK_STATUS(pKernelState->m_dshRegion.AddData(
1150 &cmd,
1151 idOffsetInIdSpace,
1152 cmd.byteSize));
1153 }
1154 return eStatus;
1155 }
1156