1 /*
2 * Copyright (c) 2022-2024, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mhw_sfc_cmdpar.h
24 //! \brief MHW command parameters
25 //! \details
26 //!
27
28 #ifndef __MHW_SFC_CMDPAR_H__
29 #define __MHW_SFC_CMDPAR_H__
30
31 #include "mhw_sfc.h"
32 #include "mhw_cmdpar.h"
33
34 namespace mhw
35 {
36 namespace sfc
37 {
38 static constexpr uint32_t MHW_SFC_MAX_WIDTH = 16 * 1024;
39 static constexpr uint32_t MHW_SFC_MAX_HEIGHT = 16 * 1024;
40
41 static constexpr uint32_t MHW_SFC_OUTPUT_MIN_WIDTH = 32;
42 static constexpr uint32_t MHW_SFC_OUTPUT_MIN_HEIGHT = 32;
43
44 static constexpr uint32_t MHW_SFC_MAX_PIPE_NUM = 4;
45
46 enum MHW_SFC_INDEX
47 {
48 MHW_SFC_INDEX_0 = 0,
49 MHW_SFC_INDEX_1 = 1,
50 MHW_SFC_INDEX_2 = 2,
51 MHW_SFC_INDEX_3 = 3
52 };
53
54 enum SFC_PIPE_MODE
55 {
56 SFC_PIPE_MODE_VDBOX = 0,
57 SFC_PIPE_MODE_VEBOX = 1,
58 SFC_PIPE_MODE_HCP = 2,
59 SFC_PIPE_MODE_AVP = 5
60 };
61
62 enum VD_VE_ORDER_MODE
63 {
64 LCU_16_16_HEVC = 0,
65 LCU_32_32_HEVC = 1,
66 LCU_64_64_HEVC = 2,
67 LCU_64_64_VP9 = 3, //should use 3 for VP9
68 LCU_64_64_SHIFT_AV1 = 0,
69 LCU_128_128_SHIFT_AV1 = 1,
70 LCU_64_64_NOSHIFT_AV1 = 2,
71 LCU_128_128_NOSHIFT_AV1 = 3,
72 };
73
_MHW_PAR_T(SFC_LOCK)74 struct _MHW_PAR_T(SFC_LOCK)
75 {
76 uint8_t sfcPipeMode = 0; //!< SFC Pipe Mode
77 uint32_t dwGaClientId = 0; // Ga Client Id
78 bool bOutputToMemory = false; // Write Vebox or Vdbox o/p to memory
79 };
80
_MHW_PAR_T(SFC_STATE)81 struct _MHW_PAR_T(SFC_STATE)
82 {
83 uint8_t sfcPipeMode = 0; //!< SFC Pipe Mode: VD-to-SFC or VE-to-SFC
84 uint32_t dwVDVEInputOrderingMode = 0;
85 uint32_t dwInputChromaSubSampling = 0; // Chroma subsampling at SFC input
86 float fAlphaPixel = 0.0; // Alpha pixel
87 float fChromaSubSamplingXSiteOffset = 0.0f; // Chroma siting X offset
88 float fChromaSubSamplingYSiteOffset = 0.0f; // Chroma siting Y offset
89 uint32_t dwChromaDownSamplingMode = 0; // Chroma Downsampling Mode
90 uint32_t dwChromaDownSamplingVerticalCoef = 0; // Chomra Downsampling Vertical Coef
91 uint32_t dwChromaDownSamplingHorizontalCoef = 0; // Chomra Downsampling Horizontal Coef
92
93 uint32_t dwOutputFrameHeight = 0; // Output Frame Height
94 uint32_t dwOutputFrameWidth = 0; // Output Frame Width
95 MOS_FORMAT OutputFrameFormat = Format_Any; // Output Frame Format
96 uint32_t dwInputFrameHeight = 0; // Input Frame Height
97 uint32_t dwInputFrameWidth = 0; // Input Frame Width
98 MOS_FORMAT InputFrameFormat = Format_Any; // Input Frame Format
99
100 // Scaling parameters
101 uint32_t dwAVSFilterMode = 0; // Bilinear, 5x5 or 8x8
102 uint32_t dwSourceRegionHeight = 0; // Source/Crop region height
103 uint32_t dwSourceRegionWidth = 0; // Source/Crop region width
104 uint32_t dwSourceRegionVerticalOffset = 0; // Source/Crop region vertical offset
105 uint32_t dwSourceRegionHorizontalOffset = 0; // Source/Crop region horizontal offset
106 uint32_t dwScaledRegionHeight = 0; // Scaled region height
107 uint32_t dwScaledRegionWidth = 0; // Scaled region width
108 uint32_t dwScaledRegionVerticalOffset = 0; // Scaled region vertical offset
109 uint32_t dwScaledRegionHorizontalOffset = 0; // Scaled region horizontal offset
110 uint32_t dwTargetRectangleStartHorizontalOffset = 0; // Target rectangle start horizontal offset
111 uint32_t dwTargetRectangleEndHorizontalOffset = 0; // Target rectangle end horizontal offset
112 uint32_t dwTargetRectangleStartVerticalOffset = 0; // Target rectangle start vertical offset
113 uint32_t dwTargetRectangleEndVerticalOffset = 0; // Target rectangle end vertical offset
114 bool bRectangleEnabled = false; // Target rectangle enabled
115 float fAVSXScalingRatio = 0.0f; // X Scaling Ratio
116 float fAVSYScalingRatio = 0.0f; // Y Scaling Ratio
117 bool bBypassXAdaptiveFilter = false; // If true, X direction will use Default Sharpness level to blend
118 // b/w smooth and sharp filters rather than the calculated value
119 bool bBypassYAdaptiveFilter = false; // If true, Y direction will use Default Sharpness level to blend
120 // b/w smooth and sharp filters rather than the calculated value
121 bool bRGBAdaptive = false; // If true, Enable the RGB Adaptive filter
122 // IEF params
123 bool bIEFEnable = false; // IEF Filter enable
124 bool bSkinToneTunedIEFEnable = false; // Skin Tone Tuned IEF enable
125 bool bAVSChromaUpsamplingEnable = false; // Up sample chroma prior to IEF filter
126 bool b8tapChromafiltering = false; // This bit enables 8 tap filtering for Chroma Channels
127
128 // Rotation Params
129 MHW_ROTATION RotationMode = MHW_ROTATION_IDENTITY; // Rotation mode -- 0, 90, 180 or 270
130 uint32_t dwMirrorType = 0; // Mirror Type -- vert/horiz
131 bool bMirrorEnable = false; // Mirror mode -- enable/disable
132
133 // ColorFill params
134 bool bColorFillEnable = false; // ColorFill enable
135 float fColorFillYRPixel = 0.0f; // ColorFill Y/R pixel
136 float fColorFillUGPixel = 0.0f; // ColorFill U/G pixel
137 float fColorFillVBPixel = 0.0f; // ColorFill V/B pixel
138 float fColorFillAPixel = 0.0f; // ColorFill A pixel
139
140 // CSC Params
141 bool bCSCEnable = false; // YUV->RGB/YUV->YUV CSC enable
142 bool bRGBASwapEnable = false; // R, B Channel Swap enable
143 bool bInputColorSpace = false; //0: YUV color space, 1:RGB color space
144 bool isFullRgbG10P709 = false; // Whether output colorspace is COLOR_SPACE_RGB_FULL_G10_NONE_P709
145 // Memory compression Enable Flag
146 bool bMMCEnable = false; // Flag used to decide whether sfc output should be compressed
147 MOS_RESOURCE_MMC_MODE MMCMode = MOS_MMC_DISABLED; // Memory compression mode
148
149 // Resources used by SFC
150 PMOS_RESOURCE pOsResOutputSurface = nullptr; // Output Frame written by SFC
151 PMOS_RESOURCE pOsResAVSLineBuffer = nullptr; // AVS Line buffer used by SFC
152 PMOS_RESOURCE pOsResIEFLineBuffer = nullptr; // IEF Line buffer used by SFC
153
154 uint32_t dwOutputSurfaceOffset = 0; // Output Frame offset (page based offset)
155 uint16_t wOutputSurfaceUXOffset = 0; // Output Frame offset (page internal U offset for X axis)
156 uint16_t wOutputSurfaceUYOffset = 0; // Output Frame offset (page internal U offset for Y axis)
157 uint16_t wOutputSurfaceVXOffset = 0; // Output Frame offset (page internal V offset for X axis)
158 uint16_t wOutputSurfaceVYOffset = 0; // Output Frame offset (page internal V offset for Y axis)
159
160 // HCP-SFC pipe only for scalability and more input/output color format
161 uint32_t engineMode = 0; //!< 0 - single, 1 - left most column, 2 - right most column, 3 - middle column
162 uint32_t inputBitDepth = 0; //!< 0 - 8bit, 1 - 10bit, 2 - 12bit
163 uint32_t tileType = 0; //!< virtual tile = 1, another tile = 0
164 uint32_t srcStartX = 0; //!< Source surface column horizontal start position in pixel
165 uint32_t srcEndX = 0; //!< Source surface column horizontal end position in pixel
166 uint32_t dstStartX = 0; //!< Destination surface column horizontal start position in pixel
167 uint32_t dstEndX = 0; //!< Destination surface column horizontal end position in pixel
168
169 // Histogram stream out
170 PMOS_SURFACE histogramSurface = nullptr; //!< Histogram stream out buffer
171 // Row Store and Column Store Scratch buffer
172 PMOS_RESOURCE resAvsLineBuffer = nullptr; // AVS Row Store buffer used by SFC
173 PMOS_RESOURCE resIefLineBuffer = nullptr; // IEF Row Store buffer used by SFC
174 PMOS_RESOURCE resSfdLineBuffer = nullptr; // SFD Row Store buffer used by SFC
175 PMOS_RESOURCE resAvsLineTileBuffer = nullptr; // AVS Column Store buffer used by SFC
176 PMOS_RESOURCE resIefLineTileBuffer = nullptr; // IEF Column Store buffer used by SFC
177 PMOS_RESOURCE resSfdLineTileBuffer = nullptr; // SFD Column Store buffer used by SFC
178
179 uint32_t ditheringEn = 0; //!< 0 - disable, 1 - enable.
180
181 // Interlaced Scaling parameters
182 uint32_t iScalingType = 0;
183 uint32_t inputFrameDataFormat = 0; // Input frame data format -- Progressive, Interleaved, Field mode
184 uint32_t outputFrameDataFormat = 0; // Output frame data format -- Progressive, Interleaved, Field mode
185 uint32_t topBottomField = 0; // Top/Bottom field -- Top field, Bottom field
186 uint32_t topBottomFieldFirst = 0; // Top/Bottom field first
187 uint32_t outputSampleType = 0; // Output sample type
188 uint32_t bottomFieldVerticalScalingOffset = 0; // Bottom field vertical scaling offset
189 PMOS_RESOURCE tempFieldResource = nullptr; // Temp filed surface
190
191 PMOS_RESOURCE sfcIndirectState = nullptr;
192
193 PMOS_RESOURCE pOsResAVSLineBufferSplit[MHW_SFC_MAX_PIPE_NUM] = {}; //!< AVS Line buffer used by SFC
194 PMOS_RESOURCE pOsResIEFLineBufferSplit[MHW_SFC_MAX_PIPE_NUM] = {}; //!< IEF Line buffer used by SFC
195 PMHW_SFC_OUT_SURFACE_PARAMS pOutSurface = nullptr;
196 uint32_t av1TileRowNumber = 0;
197 uint32_t av1TileColumnNumber = 0;
198 bool isDemosaicEnabled = false; //!< Enable Demosaic
199 };
200
_MHW_PAR_T(SFC_AVS_STATE)201 struct _MHW_PAR_T(SFC_AVS_STATE)
202 {
203 uint8_t sfcPipeMode = 0; //!< SFC Pipe Mode
204 uint32_t dwInputHorizontalSiting = 0;
205 uint32_t dwInputVerticalSitting = 0;
206 uint32_t dwAVSFilterMode = 0; // Bilinear, 5x5 or 8x8
207 };
208
_MHW_PAR_T(SFC_IEF_STATE)209 struct _MHW_PAR_T(SFC_IEF_STATE)
210 {
211 uint8_t sfcPipeMode = 0; //!< SFC Pipe Mode
212
213 // IEF params
214 bool bSkinDetailFactor = false; // Skin Detail Factor
215 bool bVYSTDEnable = false; // Enable STD in VY subspace
216 bool bIEFEnable = false; // Enable IEF
217 uint8_t StrongEdgeWeight = 0;
218 uint8_t RegularWeight = 0;
219 uint8_t StrongEdgeThreshold = 0;
220 uint32_t dwGainFactor = 0;
221 uint32_t dwR5xCoefficient = 0;
222 uint32_t dwR5cxCoefficient = 0;
223 uint32_t dwR5cCoefficient = 0;
224 uint32_t dwR3xCoefficient = 0;
225 uint32_t dwR3cCoefficient = 0;
226
227 // CSC params
228 bool bCSCEnable = false; // Enable CSC transform
229 float *pfCscCoeff = nullptr; // [3x3] CSC Coeff matrix
230 float *pfCscInOffset = nullptr; // [3x1] CSC Input Offset matrix
231 float *pfCscOutOffset = nullptr; // [3x1] CSC Output Offset matrix
232 };
233
_MHW_PAR_T(SFC_AVS_CHROMA_Coeff_Table)234 struct _MHW_PAR_T(SFC_AVS_CHROMA_Coeff_Table)
235 {
236 uint8_t sfcPipeMode = 0; //!< SFC Pipe Mode
237 SFC_AVS_CHROMA_FILTER_COEFF ChromaTable[NUM_HW_POLYPHASE_TABLES] = {};
238 };
239
_MHW_PAR_T(SFC_AVS_LUMA_Coeff_Table)240 struct _MHW_PAR_T(SFC_AVS_LUMA_Coeff_Table)
241 {
242 uint8_t sfcPipeMode = 0; //!< SFC Pipe Mode
243 SFC_AVS_LUMA_FILTER_COEFF LumaTable[NUM_HW_POLYPHASE_TABLES] = {};
244 };
245
_MHW_PAR_T(SFC_FRAME_START)246 struct _MHW_PAR_T(SFC_FRAME_START)
247 {
248 uint8_t sfcPipeMode = 0; //!< SFC Pipe Mode
249 };
250
251 } // namespace sfc
252 } // namespace mhw
253
254 #endif // __MHW_SFC_CMDPAR_H__
255