xref: /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/gen9/hw/mhw_render_g9_X.h (revision ba62d9d3abf0e404f2022b4cd7a85e107f48596f)
1 /*
2 * Copyright (c) 2014-2020, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file     mhw_render_g9_X.h
24 //! \brief    Defines functions for constructing  render engine commands on Gen9-based platforms
25 //!
26 
27 #ifndef __MHW_RENDER_G9_X_H__
28 #define __MHW_RENDER_G9_X_H__
29 
30 #include "mhw_render_generic.h"
31 #include "mhw_render_hwcmd_g9_X.h"
32 #include "mhw_state_heap_g9.h"
33 
34 class MhwRenderInterfaceG9 : public MhwRenderInterfaceGeneric<mhw_render_g9_X>
35 {
36 public:
MhwRenderInterfaceG9(MhwMiInterface * miInterface,PMOS_INTERFACE osInterface,MEDIA_SYSTEM_INFO * gtSystemInfo,uint8_t newStateHeapManagerRequested)37     MhwRenderInterfaceG9(
38         MhwMiInterface          *miInterface,
39         PMOS_INTERFACE          osInterface,
40         MEDIA_SYSTEM_INFO       *gtSystemInfo,
41         uint8_t                 newStateHeapManagerRequested) :
42         MhwRenderInterfaceGeneric(miInterface, osInterface, gtSystemInfo, newStateHeapManagerRequested)
43     {
44         MHW_FUNCTION_ENTER;
45 
46         if (gtSystemInfo == nullptr)
47         {
48             MHW_ASSERTMESSAGE("Invalid input pointer provided");
49             return;
50         }
51 
52 #if (_DEBUG || _RELEASE_INTERNAL)
53         if (gtSystemInfo->EUCount > 24)
54         {
55             if (m_osInterface->bSimIsActive)
56             {
57                 m_hwCaps.dwMaxThreads = (48 * 7);
58             }
59         }
60 #endif
61 
62         // SLM     URB     DC      RO     Rest
63         // 0      256      0       0      512 (KB chunks based on GT2)
64         m_l3CacheCntlRegisterValueDefault = 0x80000040;
65 
66         InitMmioRegisters();
67     }
68 
~MhwRenderInterfaceG9()69     virtual ~MhwRenderInterfaceG9() { MHW_FUNCTION_ENTER; }
70 
71     MOS_STATUS AddMediaVfeCmd(
72         PMOS_COMMAND_BUFFER             cmdBuffer,
73         PMHW_VFE_PARAMS                 params);
74 
75     MOS_STATUS AddPipelineSelectCmd(
76         PMOS_COMMAND_BUFFER             cmdBuffer,
77         bool                            gpGpuPipe);
78 
79     MOS_STATUS AddMediaObject(
80         PMOS_COMMAND_BUFFER             cmdBuffer,
81         PMHW_BATCH_BUFFER               batchBuffer,
82         PMHW_MEDIA_OBJECT_PARAMS        params);
83 
84     MOS_STATUS AddMediaObjectWalkerCmd(
85         PMOS_COMMAND_BUFFER             cmdBuffer,
86         PMHW_WALKER_PARAMS              params);
87 
88     MOS_STATUS AddPaletteLoadCmd(
89         PMOS_COMMAND_BUFFER             cmdBuffer,
90         PMHW_PALETTE_PARAMS             params);
91 
92     MOS_STATUS AddGpgpuCsrBaseAddrCmd(
93         PMOS_COMMAND_BUFFER             cmdBuffer,
94         PMOS_RESOURCE                   csrResource);
95 
96     MOS_STATUS EnableL3Caching(
97         PMHW_RENDER_ENGINE_L3_CACHE_SETTINGS    cacheSettings);
98 
99     MOS_STATUS SetL3Cache(
100         PMOS_COMMAND_BUFFER             cmdBuffer );
101 
GetL3CacheConfig()102     MHW_RENDER_ENGINE_L3_CACHE_CONFIG* GetL3CacheConfig() { return &m_l3CacheConfig; }
103 
GetMmioRegisters()104     virtual PMHW_MI_MMIOREGISTERS GetMmioRegisters()
105     {
106         return &m_mmioRegisters;
107     }
108 
109     //!
110     //! \brief    Get AVS sampler state Inc unit
111     //! \details  Get AVS sampler state Inc unit
112     //! \return   [out] uint32_t
113     //!           AVS sampler unit.
GetSamplerStateAVSIncUnit()114     virtual uint32_t GetSamplerStateAVSIncUnit() { return MHW_SAMPLER_STATE_AVS_INC_G9; }
115 
116     //!
117     //! \brief    Get Conv sampler state Inc unit
118     //! \details  Get Conv sampler state Inc unit
119     //! \return   [out] uint32_t
120     //!           Conv sampler unit.
GetSamplerStateConvIncUnit()121     virtual uint32_t GetSamplerStateConvIncUnit() { return MHW_SAMPLER_STATE_CONV_INC_G9; }
122 
123     //!
124     //! \brief    Get the sampler height and width align unit
125     //! \details  NV12 format needs the width and height to be a multiple of some unit
126     //! \param    [in] bool
127     //!           true if AVS sampler, false otherwise
128     //! \param    [in, out] uint32_t
129     //!           weight align unit
130     //! \param    [in, out] uint32_t
131     //!           height align unit
GetSamplerResolutionAlignUnit(bool isAVSSampler,uint32_t & widthAlignUnit,uint32_t & heightAlignUnit)132     virtual void GetSamplerResolutionAlignUnit(bool isAVSSampler, uint32_t &widthAlignUnit, uint32_t &heightAlignUnit)
133     {
134         // NV12 format width need to be a multiple of 2, while height need be
135         // a multiple of 4. Since already post PV, just keep the old logic to
136         // enable 2 plane NV12 when the width or Height is not a multiple of 4.
137         widthAlignUnit  = MHW_SAMPLER_WIDTH_ALIGN_UNIT_G9;
138         heightAlignUnit = MHW_SAMPLER_HEIGHT_ALIGN_UNIT_G9;
139     }
140 
141 private:
142     //! \brief Mmio registers address
143     MHW_MI_MMIOREGISTERS    m_mmioRegisters = {};
144     void InitMmioRegisters();
145 };
146 
147 #endif
148