1 /* 2 * Copyright (c) 2221, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_mmio_common.h 24 //! \brief Define the MMIO registers access of common platform 25 //! \details 26 //! 27 28 #ifndef __MHW_MMIO_COMMON_H__ 29 #define __MHW_MMIO_COMMON_H__ 30 31 #include <stdint.h> 32 33 // CS register offsets 34 static constexpr uint32_t CS_GENERAL_PURPOSE_REGISTER0_LO_OFFSET = 0x2600; 35 static constexpr uint32_t CS_GENERAL_PURPOSE_REGISTER0_HI_OFFSET = 0x2604; 36 static constexpr uint32_t CS_GENERAL_PURPOSE_REGISTER4_LO_OFFSET = 0x2620; 37 static constexpr uint32_t CS_GENERAL_PURPOSE_REGISTER4_HI_OFFSET = 0x2624; 38 static constexpr uint32_t CS_GENERAL_PURPOSE_REGISTER11_LO_OFFSET = 0x2658; 39 static constexpr uint32_t CS_GENERAL_PURPOSE_REGISTER11_HI_OFFSET = 0x265C; 40 static constexpr uint32_t CS_GENERAL_PURPOSE_REGISTER12_LO_OFFSET = 0x2660; 41 static constexpr uint32_t CS_GENERAL_PURPOSE_REGISTER12_HI_OFFSET = 0x2664; 42 43 // Vebox register offsets 44 // Used in Commen MI 45 static constexpr uint32_t GP_REGISTER0_LO_OFFSET = 0x1C8600; 46 static constexpr uint32_t GP_REGISTER0_HI_OFFSET = 0x1C8604; 47 static constexpr uint32_t GP_REGISTER4_LO_OFFSET = 0x1C8620; 48 static constexpr uint32_t GP_REGISTER4_HI_OFFSET = 0x1C8624; 49 static constexpr uint32_t GP_REGISTER11_LO_OFFSET = 0x1C8658; 50 static constexpr uint32_t GP_REGISTER11_HI_OFFSET = 0x1C865C; 51 static constexpr uint32_t GP_REGISTER12_LO_OFFSET = 0x1C8660; 52 static constexpr uint32_t GP_REGISTER12_HI_OFFSET = 0x1C8664; 53 54 //VEBOX 55 static constexpr uint32_t WATCHDOG_COUNT_CTRL_OFFSET_RCS = 0x2178; 56 static constexpr uint32_t WATCHDOG_COUNT_THRESTHOLD_OFFSET_RCS = 0x217C; 57 58 static constexpr uint32_t WATCHDOG_COUNT_CTRL_OFFSET_VCS0 = 0x1C0178; 59 static constexpr uint32_t WATCHDOG_COUNT_THRESTHOLD_OFFSET_VCS0 = 0x1C017C; 60 61 static constexpr uint32_t WATCHDOG_COUNT_CTRL_OFFSET_VCS1 = 0x1C4178; 62 static constexpr uint32_t WATCHDOG_COUNT_THRESTHOLD_OFFSET_VCS1 = 0x1C417C; 63 64 static constexpr uint32_t WATCHDOG_COUNT_CTRL_OFFSET_VECS = 0x1C8178; 65 static constexpr uint32_t WATCHDOG_COUNT_THRESTHOLD_OFFSET_VECS = 0x1C817C; 66 67 68 #endif //__MHW_MMIO_COMMON_H__ 69