1 /*
2 * Copyright (c) 2022, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 //!
24 //! \file media_sku_wa_lnl.cpp
25 //!
26
27 #include "igfxfmid.h"
28 #include "linux_system_info.h"
29 #include "skuwa_factory.h"
30 #include "linux_skuwa_debug.h"
31 #include "linux_media_skuwa.h"
32 #include "media_user_setting_specific.h"
33
34 static constexpr uint32_t singleVeboxSubSliceNumMax = 24;
35
36 //extern template class DeviceInfoFactory<GfxDeviceInfo>;
37 typedef DeviceInfoFactory<LinuxDeviceInit> DeviceInit;
38
39 static struct LinuxCodecInfo lnlCodecInfo =
40 {
41 .avcDecoding = 1,
42 .mpeg2Decoding = 1,
43 .vp8Decoding = 1,
44 .vc1Decoding = 0,
45 .jpegDecoding = 1,
46 .avcEncoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
47 .mpeg2Encoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
48 .hevcDecoding = 1,
49 .hevcEncoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
50 .jpegEncoding = 1,
51 .avcVdenc = 1,
52 .vp9Decoding = 1,
53 .hevc10Decoding = 1,
54 .vp9b10Decoding = 1,
55 .hevc10Encoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
56 .hevc12Encoding = 0,
57 .vp8Encoding = 0,
58 .hevcVdenc = 1,
59 .vp9Vdenc = 1,
60 .adv0Decoding = 1,
61 .adv1Decoding = 1,
62 };
63
InitLnlMediaSkuExt(struct GfxDeviceInfo * devInfo,MediaFeatureTable * skuTable,struct LinuxDriverInfo * drvInfo,MediaUserSettingSharedPtr userSettingPtr)64 static bool InitLnlMediaSkuExt(struct GfxDeviceInfo *devInfo,
65 MediaFeatureTable *skuTable,
66 struct LinuxDriverInfo *drvInfo,
67 MediaUserSettingSharedPtr userSettingPtr)
68 {
69 if ((devInfo == nullptr) || (skuTable == nullptr) || (drvInfo == nullptr))
70 {
71 DEVINFO_ERROR("null ptr is passed\n");
72 return false;
73 }
74
75 if (drvInfo->hasBsd)
76 {
77 LinuxCodecInfo *codecInfo = &lnlCodecInfo;
78
79 MEDIA_WR_SKU(skuTable, FtrAVCVLDLongDecoding, codecInfo->avcDecoding);
80 MEDIA_WR_SKU(skuTable, FtrMPEG2VLDDecoding, codecInfo->mpeg2Decoding);
81 MEDIA_WR_SKU(skuTable, FtrIntelVP8VLDDecoding, codecInfo->vp8Decoding);
82 MEDIA_WR_SKU(skuTable, FtrVC1VLDDecoding, codecInfo->vc1Decoding);
83 MEDIA_WR_SKU(skuTable, FtrIntelJPEGDecoding, codecInfo->jpegDecoding);
84 MEDIA_WR_SKU(skuTable, FtrEncodeAVC, codecInfo->avcEncoding);
85 MEDIA_WR_SKU(skuTable, FtrEncodeMPEG2, codecInfo->mpeg2Encoding);
86 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMainDecoding, codecInfo->hevcDecoding);
87 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10Decoding, codecInfo->hevc10Decoding);
88 MEDIA_WR_SKU(skuTable, FtrIntelVVCVLDDecodingMain10, 1);
89 MEDIA_WR_SKU(skuTable, FtrIntelVVCVLDDecodingMultilayerMain10, 0);
90
91 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC, codecInfo->hevcEncoding);
92 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC10bit, codecInfo->hevc10Encoding);
93 MEDIA_WR_SKU(skuTable, FtrEncodeJPEG, codecInfo->jpegEncoding);
94 MEDIA_WR_SKU(skuTable, FtrEncodeAVCVdenc, codecInfo->avcVdenc);
95 MEDIA_WR_SKU(skuTable, FtrVP9VLDDecoding, codecInfo->vp9Decoding);
96 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile0Decoding8bit420, codecInfo->vp9Decoding);
97 MEDIA_WR_SKU(skuTable, FtrVP9VLD10bProfile2Decoding, codecInfo->vp9b10Decoding);
98 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile2Decoding, codecInfo->vp9b10Decoding);
99 MEDIA_WR_SKU(skuTable, FtrIntelAV1VLDDecoding8bit420, codecInfo->adv0Decoding);
100 MEDIA_WR_SKU(skuTable, FtrIntelAV1VLDDecoding10bit420, codecInfo->adv1Decoding);
101
102 /* HEVC VDENC */
103 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain, codecInfo->hevcVdenc);
104 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10, codecInfo->hevcVdenc);
105
106 /* Vp9 VDENC */
107 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc, codecInfo->vp9Vdenc);
108
109 /* HEVC Main8/10bit-422/444 Decoding. Currently it is enabled. */
110 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD42210bitDecoding, 1);
111 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD4448bitDecoding, 1);
112 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD44410bitDecoding, 1);
113
114 /* SFC Histogram Streamout. */
115 MEDIA_WR_SKU(skuTable, FtrSFCHistogramStreamOut, 1);
116
117 /* Subset buffer for realtile decoding. */
118 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDDecodingSubsetBuffer, 1);
119
120 /* HEVC Main8/10bit-420/422/444 Scc Decoding. Currently it is enabled. */
121 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain8bit420SCC, 1);
122 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10bit420SCC, 1);
123 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain8bit444SCC, 1);
124 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10bit444SCC, 1);
125
126 /* HEVC VDENC Main8/10 422/444 Encoding. */
127 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain444, codecInfo->hevcVdenc);
128 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain422, codecInfo->hevcVdenc);
129 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit422, codecInfo->hevcVdenc);
130 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit444, codecInfo->hevcVdenc);
131
132 /* HEVC 12bit Decoding. Currently it is enabled */
133 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain12bit420Decoding, 1);
134 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain12bit422Decoding, 1);
135 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain12bit444Decoding, 1);
136
137 /* VP9 8 bit 444 */
138 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile1Decoding8bit444, 1);
139 /* VP9 10 Bit 444*/
140 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile3Decoding10bit444, 1);
141 /* VP9 12 bit 420/444 */
142 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile2Decoding12bit420, 1);
143 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile3Decoding12bit444, 1);
144
145 /* VP9 VDENC 8Bit 444 */
146 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc8bit444, codecInfo->vp9Vdenc);
147 /* VP9 VDENC 10Bit 420/444 */
148 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc10bit420, codecInfo->vp9Vdenc);
149 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc10bit444, codecInfo->vp9Vdenc);
150
151 /* AV1 VDENC 8/10Bit 420 */
152 MEDIA_WR_SKU(skuTable, FtrEncodeAV1Vdenc, 1);
153 MEDIA_WR_SKU(skuTable, FtrEncodeAV1Vdenc10bit420, 1);
154 }
155
156 MEDIA_WR_SKU(skuTable, FtrEnableProtectedHuc, drvInfo->hasProtectedHuc);
157 MEDIA_WR_SKU(skuTable, FtrEnableMediaKernels, drvInfo->hasHuc);
158 MEDIA_WR_SKU(skuTable, FtrVERing, drvInfo->hasVebox);
159 MEDIA_WR_SKU(skuTable, FtrPPGTT, drvInfo->hasPpgtt);
160 MEDIA_WR_SKU(skuTable, FtrEDram, devInfo->hasERAM);
161
162 /* Virtual VDBOX ring is used on MTL */
163 MEDIA_WR_SKU(skuTable, FtrVcs2, 0);
164
165 MEDIA_WR_SKU(skuTable, FtrSingleVeboxSlice, 1);
166 if (devInfo->SubSliceCount >= singleVeboxSubSliceNumMax)
167 {
168 MEDIA_WR_SKU(skuTable, FtrSingleVeboxSlice, 0);
169 }
170
171 MEDIA_WR_SKU(skuTable, FtrSFCPipe, 1);
172 MEDIA_WR_SKU(skuTable, FtrHCP2SFCPipe, 1);
173 MEDIA_WR_SKU(skuTable, FtrSSEUPowerGating, 1);
174 MEDIA_WR_SKU(skuTable, FtrSSEUPowerGatingControlByUMD, 1);
175
176 MEDIA_WR_SKU(skuTable, FtrPerCtxtPreemptionGranularityControl, 1);
177
178 /* It is disabled by default. It can be enabled based on HW */
179 MEDIA_WR_SKU(skuTable, FtrMemoryCompression, 0);
180 MEDIA_WR_SKU(skuTable, FtrHcpDecMemoryCompression, 0);
181 MEDIA_WR_SKU(skuTable, Ftr10bitDecMemoryCompression, 0);
182
183 MEDIA_WR_SKU(skuTable, FtrCCSNode, 1);
184
185 MEDIA_WR_SKU(skuTable, FtrVpP010Output, 1);
186 MEDIA_WR_SKU(skuTable, FtrVp10BitSupport, 1);
187 MEDIA_WR_SKU(skuTable, FtrVp16BitSupport, 1);
188
189 MEDIA_WR_SKU(skuTable, FtrContextBasedScheduling, 1);
190 MEDIA_WR_SKU(skuTable, FtrSfcScalability, 1);
191
192 MEDIA_WR_SKU(skuTable, FtrSWMediaReset, 1);
193 MEDIA_WR_SKU(skuTable, FtrGucSubmission, 1);
194
195 MEDIA_WR_SKU(skuTable, FtrTileY, 0);
196 MEDIA_WR_SKU(skuTable, FtrLinearCCS, 1);
197 MEDIA_WR_SKU(skuTable, FtrFlatPhysCCS, 1);
198
199 MEDIA_WR_SKU(skuTable, FtrWithSlimVdbox, 0);
200
201 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 1);
202 MEDIA_WR_SKU(skuTable, FtrHDR, 1);
203 MEDIA_WR_SKU(skuTable, FtrDisableRenderTargetWidthAdjust, 1);
204
205 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
206 // Disable MMC for all components if set reg key
207 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
208 MOS_UserFeature_ReadValue_ID(
209 nullptr,
210 __MEDIA_USER_FEATURE_VALUE_DISABLE_MMC_ID,
211 &userFeatureData,
212 (MOS_CONTEXT_HANDLE)nullptr);
213 if (userFeatureData.bData)
214 {
215 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 0);
216 }
217
218 // Create uncompressible surface by default
219 MEDIA_WR_SKU(skuTable, FtrCompressibleSurfaceDefault, 0);
220
221 bool compressibleSurfaceEnable = false;
222
223 ReadUserSetting(userSettingPtr,
224 compressibleSurfaceEnable,
225 "Enable Compressible Surface Creation",
226 MediaUserSetting::Group::Device);
227
228 #ifdef _MMC_SUPPORTED
229 if (compressibleSurfaceEnable)
230 {
231 MEDIA_WR_SKU(skuTable, FtrCompressibleSurfaceDefault, 1);
232 }
233 #endif
234
235 //Disable LocalMemory for all iGraphics
236 MEDIA_WR_SKU(skuTable, FtrLocalMemory, 0);
237
238 MEDIA_WR_SKU(skuTable, FtrConditionalBatchBuffEnd, 1);
239 MEDIA_WR_SKU(skuTable, FtrUseSwSwizzling, 0);
240 MEDIA_WR_SKU(skuTable, FtrMemoryRemapSupport, 1);
241
242
243 MEDIA_WR_SKU(skuTable, FtrAV1VLDLSTDecoding, 1);
244 MEDIA_WR_SKU(skuTable, FtrMediaIPSeparation , 1);
245 MEDIA_WR_SKU(skuTable, FtrXe2Compression , 1);
246 if (!compressibleSurfaceEnable)
247 {
248 MEDIA_WR_SKU(skuTable, FtrXe2Compression , 0);
249 }
250
251 return true;
252 }
253
InitLnlMediaWaExt(struct GfxDeviceInfo * devInfo,MediaWaTable * waTable,struct LinuxDriverInfo * drvInfo)254 static bool InitLnlMediaWaExt(struct GfxDeviceInfo *devInfo,
255 MediaWaTable *waTable,
256 struct LinuxDriverInfo *drvInfo)
257 {
258 if ((devInfo == nullptr) || (waTable == nullptr) || (drvInfo == nullptr))
259 {
260 DEVINFO_ERROR("null ptr is passed\n");
261 return false;
262 }
263
264 MEDIA_WR_WA(waTable, WaForceGlobalGTT, !drvInfo->hasPpgtt);
265 MEDIA_WR_WA(waTable, WaMidBatchPreemption, 0);
266 MEDIA_WR_WA(waTable, WaArbitraryNumMbsInSlice, 1);
267
268 MEDIA_WR_WA(waTable, WaSFC270DegreeRotation, 0);
269
270 MEDIA_WR_WA(waTable, WaEnableYV12BugFixInHalfSliceChicken7, 1);
271
272 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
273 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
274 MOS_UserFeature_ReadValue_ID(
275 nullptr,
276 __MEDIA_USER_FEATURE_VALUE_AUX_TABLE_16K_GRANULAR_ID,
277 &userFeatureData,
278 (MOS_CONTEXT_HANDLE)nullptr);
279
280 MEDIA_WR_WA(waTable, Wa16KInputHeightNV12Planar420, 1);
281
282 /*software wa to disable calculate the UV offset by gmmlib
283 CPU blt call will add/remove padding on the platform*/
284 MEDIA_WR_WA(waTable, WaDisableGmmLibOffsetInDeriveImage, 1);
285
286 /* Turn off MMC for codec, need to remove once turn it on */
287 MEDIA_WR_WA(waTable, WaDisableCodecMmc, 0);
288
289 /* Turn off MMC for VPP, need to remove once turn it on */
290 MEDIA_WR_WA(waTable, WaDisableVPMmc, 0);
291
292 MEDIA_WR_WA(waTable, WaDisableSetObjectCapture, 1);
293
294 MEDIA_WR_WA(waTable, Wa_Vp9UnalignedHeight, 1);
295
296 MEDIA_WR_WA(waTable, Wa_15013355402, 1);
297
298 MEDIA_WR_WA(waTable, Wa_15014143531, 1);
299
300 MEDIA_WR_WA(waTable, Wa_16021867713, 1);
301
302 return true;
303 }
304
305
306 static struct LinuxDeviceInit lnlDeviceInit =
307 {
308 .productFamily = IGFX_LUNARLAKE,
309 .InitMediaFeature = InitLnlMediaSkuExt,
310 .InitMediaWa = InitLnlMediaWaExt,
311 };
312
313 static bool lnlDeviceRegister = DeviceInfoFactory<LinuxDeviceInit>::
314 RegisterDevice(IGFX_LUNARLAKE, &lnlDeviceInit);
315