1 /*
2 * Copyright (c) 2022-2023, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 //!
24 //! \file media_sku_wa_mtl.cpp
25 //!
26
27 #include "igfxfmid.h"
28 #include "linux_system_info.h"
29 #include "skuwa_factory.h"
30 #include "linux_skuwa_debug.h"
31 #include "linux_media_skuwa.h"
32 #include "media_user_setting_specific.h"
33
34 static constexpr uint32_t singleVeboxSubSliceNumMax = 24;
35
36 //extern template class DeviceInfoFactory<GfxDeviceInfo>;
37 typedef DeviceInfoFactory<LinuxDeviceInit> DeviceInit;
38
39 static struct LinuxCodecInfo mtlCodecInfo =
40 {
41 .avcDecoding = 1,
42 .mpeg2Decoding = 1,
43 .vp8Decoding = 1,
44 .vc1Decoding = 0,
45 .jpegDecoding = 1,
46 .avcEncoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
47 .mpeg2Encoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
48 .hevcDecoding = 1,
49 .hevcEncoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
50 .jpegEncoding = 1,
51 .avcVdenc = 1,
52 .vp9Decoding = 1,
53 .hevc10Decoding = 1,
54 .vp9b10Decoding = 1,
55 .hevc10Encoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
56 .hevc12Encoding = 0,
57 .vp8Encoding = 0,
58 .hevcVdenc = 1,
59 .vp9Vdenc = 1,
60 .adv0Decoding = 1,
61 .adv1Decoding = 1,
62 };
63
InitMtlMediaSkuExt(struct GfxDeviceInfo * devInfo,MediaFeatureTable * skuTable,struct LinuxDriverInfo * drvInfo,MediaUserSettingSharedPtr userSettingPtr)64 static bool InitMtlMediaSkuExt(struct GfxDeviceInfo *devInfo,
65 MediaFeatureTable *skuTable,
66 struct LinuxDriverInfo *drvInfo,
67 MediaUserSettingSharedPtr userSettingPtr)
68 {
69 if ((devInfo == nullptr) || (skuTable == nullptr) || (drvInfo == nullptr))
70 {
71 DEVINFO_ERROR("null ptr is passed\n");
72 return false;
73 }
74
75 if (drvInfo->hasBsd)
76 {
77 LinuxCodecInfo *codecInfo = &mtlCodecInfo;
78
79 MEDIA_WR_SKU(skuTable, FtrAVCVLDLongDecoding, codecInfo->avcDecoding);
80 MEDIA_WR_SKU(skuTable, FtrMPEG2VLDDecoding, codecInfo->mpeg2Decoding);
81 MEDIA_WR_SKU(skuTable, FtrIntelVP8VLDDecoding, codecInfo->vp8Decoding);
82 MEDIA_WR_SKU(skuTable, FtrVC1VLDDecoding, codecInfo->vc1Decoding);
83 MEDIA_WR_SKU(skuTable, FtrIntelJPEGDecoding, codecInfo->jpegDecoding);
84 MEDIA_WR_SKU(skuTable, FtrEncodeAVC, codecInfo->avcEncoding);
85 MEDIA_WR_SKU(skuTable, FtrEncodeMPEG2, codecInfo->mpeg2Encoding);
86 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMainDecoding, codecInfo->hevcDecoding);
87 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10Decoding, codecInfo->hevc10Decoding);
88
89 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC, codecInfo->hevcEncoding);
90 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC10bit, codecInfo->hevc10Encoding);
91 MEDIA_WR_SKU(skuTable, FtrEncodeJPEG, codecInfo->jpegEncoding);
92 MEDIA_WR_SKU(skuTable, FtrEncodeAVCVdenc, codecInfo->avcVdenc);
93 MEDIA_WR_SKU(skuTable, FtrVP9VLDDecoding, codecInfo->vp9Decoding);
94 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile0Decoding8bit420, codecInfo->vp9Decoding);
95 MEDIA_WR_SKU(skuTable, FtrVP9VLD10bProfile2Decoding, codecInfo->vp9b10Decoding);
96 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile2Decoding, codecInfo->vp9b10Decoding);
97 MEDIA_WR_SKU(skuTable, FtrIntelAV1VLDDecoding8bit420, codecInfo->adv0Decoding);
98 MEDIA_WR_SKU(skuTable, FtrIntelAV1VLDDecoding10bit420, codecInfo->adv1Decoding);
99
100 /* HEVC VDENC */
101 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain, codecInfo->hevcVdenc);
102 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10, codecInfo->hevcVdenc);
103
104 /* Vp9 VDENC */
105 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc, codecInfo->vp9Vdenc);
106
107 /* HEVC Main8/10bit-422/444 Decoding. Currently it is enabled. */
108 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD42210bitDecoding, 1);
109 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD4448bitDecoding, 1);
110 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD44410bitDecoding, 1);
111
112 /* SFC Histogram Streamout. */
113 MEDIA_WR_SKU(skuTable, FtrSFCHistogramStreamOut, 1);
114
115 /* Subset buffer for realtile decoding. */
116 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDDecodingSubsetBuffer, 1);
117
118 /* HEVC Main8/10bit-420/422/444 Scc Decoding. Currently it is enabled. */
119 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain8bit420SCC, 1);
120 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10bit420SCC, 1);
121 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain8bit444SCC, 1);
122 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10bit444SCC, 1);
123
124 /* HEVC VDENC Main8/10 422/444 Encoding. */
125 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain444, codecInfo->hevcVdenc);
126 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain422, codecInfo->hevcVdenc);
127 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit422, codecInfo->hevcVdenc);
128 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit444, codecInfo->hevcVdenc);
129
130 /* HEVC 12bit Decoding. Currently it is enabled */
131 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain12bit420Decoding, 1);
132 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain12bit422Decoding, 1);
133 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain12bit444Decoding, 1);
134
135 /* VP9 8 bit 444 */
136 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile1Decoding8bit444, 1);
137 /* VP9 10 Bit 444*/
138 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile3Decoding10bit444, 1);
139 /* VP9 12 bit 420/444 */
140 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile2Decoding12bit420, 1);
141 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile3Decoding12bit444, 1);
142
143 /* VP9 VDENC 8Bit 444 */
144 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc8bit444, codecInfo->vp9Vdenc);
145 /* VP9 VDENC 10Bit 420/444 */
146 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc10bit420, codecInfo->vp9Vdenc);
147 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc10bit444, codecInfo->vp9Vdenc);
148
149 /* AV1 VDENC 8/10Bit 420 */
150 MEDIA_WR_SKU(skuTable, FtrEncodeAV1Vdenc, 1);
151 MEDIA_WR_SKU(skuTable, FtrEncodeAV1Vdenc10bit420, 1);
152 }
153 MEDIA_WR_SKU(skuTable, FtrEnableProtectedHuc, drvInfo->hasProtectedHuc);
154 MEDIA_WR_SKU(skuTable, FtrEnableMediaKernels, drvInfo->hasHuc);
155 MEDIA_WR_SKU(skuTable, FtrVERing, drvInfo->hasVebox);
156 MEDIA_WR_SKU(skuTable, FtrPPGTT, drvInfo->hasPpgtt);
157 MEDIA_WR_SKU(skuTable, FtrEDram, devInfo->hasERAM);
158
159 /* Virtual VDBOX ring is used on MTL */
160 MEDIA_WR_SKU(skuTable, FtrVcs2, 0);
161
162 MEDIA_WR_SKU(skuTable, FtrSingleVeboxSlice, 1);
163 if (devInfo->SubSliceCount >= singleVeboxSubSliceNumMax)
164 {
165 MEDIA_WR_SKU(skuTable, FtrSingleVeboxSlice, 0);
166 }
167
168 MEDIA_WR_SKU(skuTable, FtrSFCPipe, 1);
169 MEDIA_WR_SKU(skuTable, FtrHCP2SFCPipe, 1);
170 MEDIA_WR_SKU(skuTable, FtrSSEUPowerGating, 1);
171 MEDIA_WR_SKU(skuTable, FtrSSEUPowerGatingControlByUMD, 1);
172
173 MEDIA_WR_SKU(skuTable, FtrPerCtxtPreemptionGranularityControl, 1);
174
175 /* It is disabled by default. It can be enabled based on HW */
176 MEDIA_WR_SKU(skuTable, FtrMemoryCompression, 0);
177 MEDIA_WR_SKU(skuTable, FtrHcpDecMemoryCompression, 0);
178 MEDIA_WR_SKU(skuTable, Ftr10bitDecMemoryCompression, 0);
179
180 #if (_DEBUG || _RELEASE_INTERNAL)
181 uint32_t value = 0;
182 ReadUserSettingForDebug(
183 userSettingPtr,
184 value,
185 __MEDIA_USER_FEATURE_VALUE_ENABLE_MEDIA_CCS,
186 MediaUserSetting::Group::Device);
187
188 /* MEDIA_CSS default value is 1 */
189 if (value > 1)
190 value = 1;
191
192 MEDIA_WR_SKU(skuTable, FtrCCSNode, (uint8_t)value);
193 #else
194 MEDIA_WR_SKU(skuTable, FtrCCSNode, 1);
195 #endif
196
197 MEDIA_WR_SKU(skuTable, FtrVpP010Output, 1);
198 MEDIA_WR_SKU(skuTable, FtrVp10BitSupport, 1);
199 MEDIA_WR_SKU(skuTable, FtrVp16BitSupport, 1);
200
201 MEDIA_WR_SKU(skuTable, FtrContextBasedScheduling, 1);
202 MEDIA_WR_SKU(skuTable, FtrSfcScalability, 1);
203
204 MEDIA_WR_SKU(skuTable, FtrSWMediaReset, 1);
205 MEDIA_WR_SKU(skuTable, FtrGucSubmission, 1);
206
207 MEDIA_WR_SKU(skuTable, FtrTileY, 0);
208 MEDIA_WR_SKU(skuTable, FtrLinearCCS, 1);
209 MEDIA_WR_SKU(skuTable, FtrFlatPhysCCS, 0);
210
211 MEDIA_WR_SKU(skuTable, FtrWithSlimVdbox, 0);
212
213 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 1);
214 MEDIA_WR_SKU(skuTable, Ftr1MGranularAuxTable, 1);
215 MEDIA_WR_SKU(skuTable, FtrHDR, 1);
216
217 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
218 // Disable MMC for all components if set reg key
219 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
220 MOS_UserFeature_ReadValue_ID(
221 nullptr,
222 __MEDIA_USER_FEATURE_VALUE_DISABLE_MMC_ID,
223 &userFeatureData,
224 (MOS_CONTEXT_HANDLE)nullptr);
225 if (userFeatureData.bData)
226 {
227 MEDIA_WR_SKU(skuTable, FtrE2ECompression, 0);
228 }
229
230 // Create uncompressible surface by default
231 MEDIA_WR_SKU(skuTable, FtrCompressibleSurfaceDefault, 0);
232
233 bool compressibleSurfaceEnable = false;
234
235 ReadUserSetting(userSettingPtr,
236 compressibleSurfaceEnable,
237 "Enable Compressible Surface Creation",
238 MediaUserSetting::Group::Device);
239
240 #ifdef _MMC_SUPPORTED
241 if (compressibleSurfaceEnable)
242 {
243 MEDIA_WR_SKU(skuTable, FtrCompressibleSurfaceDefault, 1);
244 }
245 #endif
246 //Disable LocalMemory for all iGraphics
247 MEDIA_WR_SKU(skuTable, FtrLocalMemory, 0);
248
249 MEDIA_WR_SKU(skuTable, FtrConditionalBatchBuffEnd, 1);
250 MEDIA_WR_SKU(skuTable, FtrUseSwSwizzling, 1);
251 MEDIA_WR_SKU(skuTable, FtrMemoryRemapSupport, 1);
252
253
254 MEDIA_WR_SKU(skuTable, FtrAV1VLDLSTDecoding, 1);
255 MEDIA_WR_SKU(skuTable, FtrMediaIPSeparation , 1);
256
257 return true;
258 }
259
InitMtlMediaWaExt(struct GfxDeviceInfo * devInfo,MediaWaTable * waTable,struct LinuxDriverInfo * drvInfo)260 static bool InitMtlMediaWaExt(struct GfxDeviceInfo *devInfo,
261 MediaWaTable *waTable,
262 struct LinuxDriverInfo *drvInfo)
263 {
264 if ((devInfo == nullptr) || (waTable == nullptr) || (drvInfo == nullptr))
265 {
266 DEVINFO_ERROR("null ptr is passed\n");
267 return false;
268 }
269
270 MEDIA_WR_WA(waTable, WaForceGlobalGTT, !drvInfo->hasPpgtt);
271 MEDIA_WR_WA(waTable, WaMidBatchPreemption, 0);
272 MEDIA_WR_WA(waTable, WaArbitraryNumMbsInSlice, 1);
273
274 MEDIA_WR_WA(waTable, WaSFC270DegreeRotation, 0);
275
276 MEDIA_WR_WA(waTable, WaEnableYV12BugFixInHalfSliceChicken7, 1);
277
278 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
279 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
280 MOS_UserFeature_ReadValue_ID(
281 nullptr,
282 __MEDIA_USER_FEATURE_VALUE_AUX_TABLE_16K_GRANULAR_ID,
283 &userFeatureData,
284 (MOS_CONTEXT_HANDLE)nullptr);
285
286 MEDIA_WR_WA(waTable, Wa16KInputHeightNV12Planar420, 1);
287
288 /*software wa to disable calculate the UV offset by gmmlib
289 CPU blt call will add/remove padding on the platform*/
290 MEDIA_WR_WA(waTable, WaDisableGmmLibOffsetInDeriveImage, 1);
291
292
293
294 /* Turn off MMC for codec, need to remove once turn it on */
295 MEDIA_WR_WA(waTable, WaDisableCodecMmc, 0);
296
297 /* Turn off MMC for VPP, need to remove once turn it on */
298 MEDIA_WR_WA(waTable, WaDisableVPMmc, 0);
299
300 MEDIA_WR_WA(waTable, WaDisableSetObjectCapture, 1);
301
302 MEDIA_WR_WA(waTable, Wa_Vp9UnalignedHeight, 1);
303
304 MEDIA_WR_WA(waTable, Wa_AvcUnalignedHeight, 1);
305
306 MEDIA_WR_WA(waTable, Wa_15013355402, 1);
307
308 MEDIA_WR_WA(waTable, Wa_16021867713, 1);
309
310 return true;
311 }
312
313
314 static struct LinuxDeviceInit mtlDeviceInit =
315 {
316 .productFamily = IGFX_METEORLAKE,
317 .InitMediaFeature = InitMtlMediaSkuExt,
318 .InitMediaWa = InitMtlMediaWaExt,
319 };
320
321 static bool mtlDeviceRegister = DeviceInfoFactory<LinuxDeviceInit>::
322 RegisterDevice(IGFX_METEORLAKE, &mtlDeviceInit);
323
InitArlMediaSku(struct GfxDeviceInfo * devInfo,MediaFeatureTable * skuTable,struct LinuxDriverInfo * drvInfo,MediaUserSettingSharedPtr userSettingPtr)324 static bool InitArlMediaSku(struct GfxDeviceInfo *devInfo,
325 MediaFeatureTable * skuTable,
326 struct LinuxDriverInfo *drvInfo,
327 MediaUserSettingSharedPtr userSettingPtr)
328 {
329 if (!InitMtlMediaSkuExt(devInfo, skuTable, drvInfo, userSettingPtr))
330 {
331 return false;
332 }
333
334 return true;
335 }
336
InitArlMediaWa(struct GfxDeviceInfo * devInfo,MediaWaTable * waTable,struct LinuxDriverInfo * drvInfo)337 static bool InitArlMediaWa(struct GfxDeviceInfo *devInfo,
338 MediaWaTable * waTable,
339 struct LinuxDriverInfo * drvInfo)
340 {
341 if (!InitMtlMediaWaExt(devInfo, waTable, drvInfo))
342 {
343 return false;
344 }
345
346 return true;
347 }
348
349 static struct LinuxDeviceInit arlDeviceInit =
350 {
351 .productFamily = (uint32_t)IGFX_ARROWLAKE,
352 .InitMediaFeature = InitArlMediaSku,
353 .InitMediaWa = InitArlMediaWa,
354 };
355
356 static bool arlDeviceRegister = DeviceInfoFactory<LinuxDeviceInit>::
357 RegisterDevice((uint32_t)IGFX_ARROWLAKE, &arlDeviceInit);
358